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9058979 Semiconductor integrated circuit having a switch, an electrically-conductive electrode line and an electrically-conductive virtual line  
A semiconductor integrated circuit including: a circuit block having an internal voltage line; an annular rail line forming a closed annular line around the circuit block and supplied with one of...
9030231 Heterogeneous programmable device and configuration software adapted therefor  
A method of configuring a programmable integrated circuit device with a user logic design includes analyzing the user logic design to identify unidirectional logic paths within the user logic...
9024656 Nonvolatile logic circuit architecture and method of operation  
Magnetoelectronic (ME) logic circuits and methods of operating the same are disclosed. Microsystems of different circuits made from different types of ME devices can be constructed and employed in...
9024657 Architectural floorplan for a structured ASIC manufactured on a 28 NM CMOS process lithographic node or smaller  
A floorplan for a Structured ASIC chip is shown having a core region containing memory and VCLB logic cells surrounded by a plurality of IO connection fabrics that include a first IO connection...
9018979 Universal digital block interconnection and channel routing  
A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs...
9018977 User registers implemented with routing circuits in a configurable IC  
Some embodiments of the invention provide a configurable integrated circuit (“IC”). The configurable IC includes a set of configurable logic circuits for configurably performing a set of...
9018978 Runtime loading of configuration data in a configurable IC  
A novel configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations is provided. During the operation of the IC, each particular...
9013208 Method and apparatus for clocking  
Aspects of the disclosure provide a clock gate circuit for generating a clock signal. The clock gate circuit includes a multiplexer and a logic module coupled to the multiplexer. The multiplexer...
9007095 Efficient non-integral multi-height standard cell placement  
An integrated circuit including a first portion of a first cell library including a first plurality of rows, each of the first plurality of rows having a first row height and the first portion...
9007093 Programmable logic device  
A PLD in which a configuration memory is formed using a nonvolatile memory with a small number of transistors and in which the area of a region where the configuration memory is disposed is...
9000802 Systems and methods for interfacing between hard logic and soft logic in a hybrid integrated device  
Systems and methods are disclosed for interfacing between hard logic elements and soft logic elements implemented on an integrated device. In particular, a configurable interface is provided that...
9000801 Implementation of related clocks  
An integrated circuit (IC) that includes multiple clock domains is provided. Each clock domain operates at a user specified data rate, and the data rates of at least two of the clock domains are...
8994404 Semiconductor device and structure  
A 3D device, including: a first layer including first transistors, the first transistors interconnected by a first layer of interconnection; a second layer including second transistors, the second...
8996906 Clock management block  
A novel integrated circuit (IC) that configurably distributes clocks from multiple clock sources to multiple sets of circuits is described. The IC includes multiple clock sources and multiple...
8994400 Nonvolatile latch circuit and logic circuit, and semiconductor device using the same  
To provide a novel nonvolatile latch circuit and a semiconductor device using the nonvolatile latch circuit, a nonvolatile latch circuit includes a latch portion having a loop structure where an...
8990740 Method and system for a run-time reconfigurable computer architecture  
A reconfigurable computer architecture is disclosed. The reconfigurable computer architecture has a plurality of logic elements, a plurality of connection switching elements, and a plurality of...
8988104 Multiple-time configurable non-volatile look-up-table  
Innovative Non-Volatile Look-Up-Table (NV-LUT) has been constructed by Single Gate Logic Non-Volatile Memory (SGLNVM) devices processed with the standard CMOS logic process. One of a pair of...
8981814 Permutable switching network with enhanced interconnectivity for multicasting signals  
In one embodiment, the integrated circuit has a L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors. The integrated circuit can be used in electronic...
8981813 Method and apparatus for facilitating communication between programmable logic circuit and application specific integrated circuit with clock adjustment  
A logic processing device, containing an application specific integrated circuit (“ASIC”) and field programmable gate array (“FPGA”), capable of automatically interfacing between ASIC and FPGA is...
8975916 Self-modulated voltage reference  
A self-modulated voltage reference circuit may generate a reference voltage by receiving an internal reference voltage of a programmable device at a first input of a comparator block of the...
8975919 Dual row I/O with logic embedded between rows  
The present invention provides for a method and circuit of an integrated circuit (IC) having dual row input/output (I/O). The circuit having a plurality of dual I/Os including an upper row of I/O...
8970252 Field programmable analog array  
In an embodiment, a field programmable analog array (FPAA) comprises state variable filter engines arranged in parallel, each state variable filter engine comprising at least one variable...
8970251 Programmable logic device  
Disclosed is a programmable logic device (PLD) which can undergo dynamic configuration at a high speed. The PLD includes a plurality of programmable logic elements (PLEs) and a switch for...
8970249 Look-up table circuit  
One embodiment provides a look-up table circuit, including: 2i memories, a half of which constituting a first memory group, the other half of which constituting a second memory group; first to...
8963580 Logic device and method of operating the same  
A logic device may include a first functional block, the first functional block including, a first storage block, a second storage block, and a first function controller. In a first operation time...
8963581 Pipelined direct drive routing fabric  
One embodiment relates to a circuit for pipelined direct-drive routing, the circuit including a routing multiplexer, a flip-flop, and a mode multiplexer. The output of the routing multiplexer is...
8957701 Integrated circuit  
An integrated circuit capable of improving all factors, which are area, cost, logic change function, operating frequency, flexibility, through-put and power consumption, and a reconfigurable...
8957398 Via-configurable high-performance logic block involving transistor chains  
A via-configurable logic block architecture for a Structured ASIC has a plurality of MOSFET transistor chains connected to one another through vias. In one embodiment there are three chains and...
8952720 Reconfigurable integrated circuit device and writing method thereof  
A reconfigurable integrated circuit device includes a memory unit for storing configuration information. The memory unit has a nonvolatile memory transistor having a gate connected to a first...
8952723 Programmable logic device and semiconductor device  
To provide a PLD having a reduced circuit area and an increased operation speed. In the circuit structure, a gate of a transistor provided between an input terminal and an output terminal of a...
8949763 Apparatus and methods for optimization of integrated circuits  
A system for computer-aided design (CAD) of an integrated circuit (IC) uses a computer. The computer is configured to optimize placement, routing, and/or region configuration of the integrated...
8947120 Latch array utilizing through device connectivity  
A circuit for implementing latch array functions on an integrated circuit. Portions of the logic devices included in the implementation of the latch array functions that are controlled by a common...
8947121 Programmable logic device  
A programmable logic device that verifies whether configuration data is stored correctly is provided. The programmable logic device includes a configuration memory storing configuration data input...
8941408 Configuring data registers to program a programmable device with a configuration bit stream without phantom bits  
Techniques and mechanisms dynamically configure shift registers among registers composing data registers in a circuit such as a Programmable Logic Device (PLD). A configuration bit stream used to...
8941409 Configurable storage elements  
An integrated circuit (“IC”) having configurable logic circuits for configurably performing multiple different logic operations based on configuration data is provided. The IC includes a...
8937491 Clock network architecture  
An apparatus includes an integrated circuit with a clock network in an array of circuit blocks. The clock network includes routing tracks, distribution spines, and clock leaves. The routing tracks...
8933431 Dual-plane memory array  
A memory array has a plurality of conductor structures. Each conductor structure has a top wire segment extending in a first direction, a middle wire segment extending in a second direction at an...
8928351 Emulating power domains in an integrated circuit using partial reconfiguration  
Testing power domains of a circuit design includes correlating, using a processor, a selected power domain of a circuit design having a plurality of power domains with a partial reconfiguration...
8928350 Programming the behavior of individual chips or strata in a 3D stack of integrated circuits  
There is provided a strata manager within a 3D chip stack having two or more strata. The strata manager includes a plurality of scannable configuration registers, each being arranged on a...
8928352 Controllable storage elements for an IC  
An integrated circuit (“IC”) that includes a configurable routing fabric with controllable storage elements is described. The routing fabric provides a communication pathway that routes signals to...
8922244 Three dimensional integrated circuit connection structure and method  
An integrated circuit die stack comprises a first die and a second die connected to each other. Each of the first and second dies comprise a functional circuitry, a plurality of first contacts on...
8917111 Configuration of programmable integrated circuits  
Approaches for configuring programmable resources of a programmable IC are disclosed. A first set of configuration data is loaded using a configuration port of the programmable IC, which also...
8913601 Programmable integrated circuit and method of asynchronously routing data in a circuit block of an integrated circuit  
A programmable integrated circuit is disclosed. The programmable integrated circuit comprises a plurality of circuit blocks, each circuit block of the plurality of circuit blocks comprising...
8912820 System and method for reducing reconfiguration power  
A system and method for reducing power consumption in a reconfigurable integrated circuit. Some embodiments provide placement and routing programs that reduce the number of bits to be...
8912822 Semiconductor integrated circuit  
One embodiment provides a semiconductor integrated circuit, including: a first input wire; a second input wire; a first look-up table (LUT) comprising: a plurality of first memories; a first...
8907718 Passive resistive-heater addressing network  
There is described a passive heater-and-diode multiplexing network for selective addressing of thermally-coupled and electrically-disconnected fuses within a passive device network...
8901959 Hybrid IO cell for wirebond and C4 applications  
A hybrid IO cell for use with controlled collapse chip connection, wirebond core limited, wirebond IO limited, and wirebond inline chip designs is provided. A method of designing the hybrid IO...
8901962 Programmable logic device structure using third dimensional memory  
A Programmable Logic Device (PLD) structure using third dimensional memory is disclosed. The PLD structure includes a switch configured to couple a polarity of a signal (e.g., an input signal...
8901961 Placement, rebuffering and routing structure for PLD interface  
A PLD comprises a substrate, an array of programmable logic elements formed in the substrate, a first columnar interface coupling to the array of logic elements and extending in the substrate...
8901960 FPGA mounted apparatus and FPGA configuration method  
There is provided a field programmable gate array (FPGA) mounted apparatus included in a first node of a plurality of nodes connected on a network, the FPGA mounted housing apparatus including a...