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7202698 Integrated circuit having a programmable input structure with bounce capability  
A programmable input structure for a logic block provides the capability of “bouncing” a logic block input signal back to the interconnect structure of the integrated circuit, and/or to other...
7199608 Programmable logic device and method of configuration  
In configuring a programmable logic device, first configurable resources of the programmable logic device may be configured as a boot-strap configurator dependent on data in a first portion of...
7199610 Integrated circuit interconnect structure having reduced coupling between interconnect lines  
An interconnect structure in which “diagonal” and “straight” interconnect lines are interleaved to minimize coupling between adjacent interconnect lines. An interconnect structure for an...
7196541 Electronic circuit with array of programmable logic cells  
An electronic circuit has a programmable logic cell with a plurality of programmable logic units that are capable of being configured to operate in a multi-bit operand mode and a random logic mode....
7196942 Configuration memory structure  
A configuration memory structure includes one or more distributed buffers cascaded together, the output of a first buffer driving an output data line and complementary output data line which...
7196542 Techniques for providing increased flexibility to input/output banks with respect to supply voltages  
Techniques are provided for increasing flexibility to I/O banks with respect to supply voltages. Multiple supply voltages can be provided to a bank of I/O pins. Separate I/O pins residing in an I/O...
7196543 Integrated circuit having a programmable input structure with optional fanout capability  
A programmable input structure for a programmable logic circuit provides the capability of “fanning out” a selected signal to two or more input terminals of the programmable logic circuit,...
7193434 Semiconductor integrated circuit  
There is provided a high-performance semiconductor integrated circuit whose circuit area is small and whose wiring length is short. The semiconductor integrated circuit is constructed in a...
7193433 Programmable logic block having lookup table with partial output signal driving carry multiplexer  
A programmable logic block provides to a carry chain multiplexer an output signal representing a partial output signal from a programmable lookup table (LUT), e.g., an output signal having a value...
7193439 Segmented configuration of programmable logic devices  
A programmable logic device (PLD) includes a plurality of segments, a plurality of segment-enable registers, and a configuration controller. Each segment-enable register is arranged to be set to a...
7193438 Configurable integrated circuit with offset connection  
Some embodiments of the invention provide an configurable integrated circuit (“IC”). This IC has at least fifty configurable nodes arranged in an array that several rows and columns. The IC...
7193437 Architecture for a connection block in reconfigurable gate arrays  
An optimized architecture to implement connections between logic blocks and routing lines in reconfigurable gate arrays including connection blocks to connect inputs and outputs of different logic...
7193436 Fast processing path using field programmable gate array logic units  
The described embodiments relate to the general area of Field Programmable Gate Arrays (FPGAs), and, in particular, to the architecture and the structure of the building blocks of the FPGAs....
7190190 Programmable logic device with on-chip nonvolatile user memory  
A programmable logic integrated circuit has user-accessible nonvolatile memory for use by the programmable logic. In a specific embodiment, the programmable logic integrated circuit has a...
7187202 Circuit for reducing programmable logic pin counts for large scale logic  
A circuit board includes a large scale logic device and at least one outrigger device wherein signals having a transmission delay budget that exceed a threshold value are produced to the outrigger...
7187200 Columnar architecture  
An integrated circuit (IC) is disclosed having circuitry arranged in a plurality of columns. A column in the IC is essentially a series of aligned circuit elements of the same type that extends...
7187709 High speed configurable transceiver architecture  
One or more configurable transceivers can be fabricated on an integrated circuit. The transceivers contain various components having options that can be configured by turning configuration memory...
7187199 Structures and methods for testing programmable logic devices having mixed-fabric architectures  
Structures and methods for testing a re-programmable logic block embedded in a one-time programmable fabric in a PLD. The re-programmable logic block is tested without using the one-time...
7187201 Programmable logic device suitable for implementation in molecular electronics  
Pullup and pulldown structures can be formed using nanoscale programmable junctions. These devices can be integrated into nanoscale circuit designs and can be programmably configured, e.g., desired...
7187203 Cascadable memory  
In accordance with an embodiment of the present invention, a programmable logic device includes a plurality of logic blocks, a plurality of memory blocks, and a plurality of continuation routing...
7183796 Configuration memory implementation for LUT-based reconfigurable logic architectures  
A reconfigurable processing unit ( 1 ) is described which comprises, data flow controlling elements ( 10 ), data manipulating elements ( 20 ), a configuration memory unit ( 30 ) comprising a...
7183801 Programmable logic auto write-back  
A first configuration controller loads configuration data into a programmable logic device. The first controller is coupled with a first configuration memory and manages couplings of the memory to...
7180324 Redundancy structures and methods in a programmable logic device  
An embodiment of the present invention provides a programmable logic device (“PLD”) including a redundancy architecture adapted to selective route signals via first or second staggered vertical...
7180813 Programmable system device having a shared power supply voltage generator for FLASH and PLD modules  
A programmable system device includes an embedded FLASH memory module and an embedded programmable logic device (PLD) module. A sole embedded power supply voltage generator generates a plurality of...
7177207 Sense amplifier timing  
Systems and methods provide sense amplifier timing techniques. For example, in accordance with an embodiment of the present invention, an integrated circuit includes a plurality of memory cells and...
7176717 Programmable logic and routing blocks with dedicated lines  
A programmable logic structure is disclosed that has a set of dedicated lines which extend internally throughout different dedicated logic cells within a logic and routing block (LRB), extend from...
7177221 Initializing memory blocks  
In accordance with one embodiment of the present invention, a programmable logic device includes at least one block of memory having a plurality of memory cells and a plurality of fuses adapted to...
7173451 Programmable logic circuit apparatus and programmable logic circuit reconfiguration method  
A programmable logic circuit apparatus includes a programmable logic circuit that dynamically switches and operates a plurality of circuit blocks. The circuit blocks include a branch circuit block...
7173840 Acceleration of the programming of a memory module with the aid of a boundary scan (BSCAN) register  
In order to program a memory module, some of its inputs are stimulated via internal memory locations of a so-called boundary scan (BSCAN) register that is provided in the form of an IC or ASIC. In...
7170179 Chip select method through double bonding  
A chip generally comprising a logic circuit and a plurality of pads. The logic circuit may be configured to operate in a plurality of modes in response to a mode signal. The pads may be...
7167022 Omnibus logic element including look up table based logic elements  
Disclosed is an LE that can provide a number of advantageous feature. For example, the LE can provide efficient and flexible use of LUTs and input sharing. The LE may also provide for flexible use...
7167410 Memory system and memory device having a serial interface  
A memory device and system are disclosed that may include a serial data interface, a serial address interface, and a reference clock interface. The reference clock interface is configured to...
7167021 Logic device logic modules having improved arithmetic circuitry  
A logic device logic module includes multi-stage combinational logic circuitry (e.g., a four-input look-up table) into which EXCLUSIVE OR (“XOR”) circuitry is interposed to give the logic...
7167025 Non-sequentially configurable IC  
Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes at least fifty configurable circuits arranged in an array having a plurality of rows and a...
7164294 Method for forming programmable logic arrays using vertical gate transistors  
One aspect disclosed herein relates to a method for forming a programmable logic array. Various embodiments of the method include forming a first logic plane and a second logic plane, each...
7161382 General-purpose logic cell, general-purpose logic cell array using the same, and ASIC using general-purpose logic cell array  
A general-purpose logic cell used in a general-purpose logic cell array for a logic circuit, includes a plurality of kinds of logic circuit elements, each of which has a plurality of terminals with...
7161381 Multiple size memories in a programmable logic device  
A programmable logic device (PLD) includes a first memory block and at least a second memory block, where the two memory blocks have different memory sizes.
7161383 Programmable logic device  
The invention relates to a programmable logic device ( 7 ) comprising several logic blocks ( 3 A to 3 D) with configurable characteristics, elements for linking the logic blocks to one another and...
7157936 Utilization of unused IO block for core logic functions  
A method and an improved FPGA apparatus for enabling the selective deployment of unused flip-flops or other circuit elements in IO cells and unused decoders or other circuit elements in Look Up...
7157937 Structured integrated circuit device  
A configurable logic array may include: a multiplicity of logic cells, containing look-up tables; customizable metal and via connection layers overlying the multiplicity of logic cells; a...
7157934 Programmable asynchronous pipeline arrays  
High-performance, highly pipelined asynchronous FPGAs employ a very fine-grain pipelined logic block and routing interconnect architecture. These FPGAs, which do not use a clock to sequence...
7154296 Integrated bus hold and pull-up resistor  
Circuits, methods, and apparatus that combine a bus hold and a pull-up circuit in a die area efficient and conflict free manner. An exemplary embodiment of the present invention combines a bus hold...
7154299 Architecture for programmable logic device  
An improved Programmable Logic Device architecture that provides more efficient utilization of resources by enabling access to defined circuit elements in the domain of any Programmable Logic Block...
7154298 Block-oriented architecture for a programmable interconnect circuit  
A programmable interconnect circuit comprising a plurality of I/O cells arranged into blocks includes a routing structure for each block, wherein each routing structure may programmably route...
7148722 PCI-compatible programmable logic devices  
A programmable logic integrated circuit device has several features which help it perform according to the PCI Special Interest Group's Peripheral Component Interface (“PCI”) signaling...
7145360 Configurable logic element with expander structures  
A configurable logic element (CLE) for a field programmable gate array (FPGA) includes “expanders”, i.e., connectors that allow fast signal communication between logic blocks. Expanders allow...
7145361 Configurable integrated circuit with different connection schemes  
Some embodiments provide an IC with a configurable node array that has (1) two similar nodes within the interior of the array, and (2) two different connection schemes. The first connection scheme...
7145362 Clock signal-distribution network for an integrated circuit  
Apparatus for signal distribution, and more particularly to a clock-distribution network in an integrated circuit, is described. A programmable logic device 300 includes an input buffer ( 814,...
7142033 Differential clocking scheme in an integrated circuit having digital multiplexers  
A system for distributing a small signal differential signal to a circuit element. The system includes: a first converter configured to convert a first small signal differential signal to a first...
7142012 Architecture and interconnect scheme for programmable logic circuits  
An architecture having a distributed and replicated hierarchical interconnect scheme for field programmable gate arrays (FPGAs). The FPGA is composed of a number of cells that perform logical...
Matches 351 - 400 out of 1434 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >