Matches 151 - 200 out of 1430 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
Match Document Document Title
7449915 VPA logic circuits  
Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes first and second circuits. The first circuit is a logic circuit for receiving configuration data...
7446561 I/O circuitry shared between processor and programmable logic portions of an integrated circuit  
The present invention provides circuitry and methods for sharing I/O pins between a programmable logic portion and an embedded processor portion of a chip. The circuits in the programmable logic...
7447828 Programmable crossbar signal processor used as morphware  
A method includes providing a crossbar array including a programmable material layer, wherein the crossbar array is configured to function as part of a signal processing system and reprogramming at...
7446562 Programmable semiconductor device  
A programmable semiconductor device of the invention includes: processing element unit executing a predetermined operation; input/output connection unit acting as a signal input part and/or a...
7443196 Configuration network for a configurable IC  
Some embodiments of the invention provide a configurable integrated circuit (IC) that includes several configurable circuits grouped in several tiles. The configurable IC also includes a...
7439768 Dedicated logic cells employing configurable logic and dedicated logic functions  
A dedicated logic cell in a programmable logic structure is described that comprises the following primary components: a configurable logic function or look-up table (LL), a dedicated logic...
7439769 Programming logic device and method for programming the same  
The present invention is directed to a programmable logic device and a method of programming a programmable logic device that features providing a verification technique to ensure the requisite...
7439764 Systems and methods for programming large-scale field-programmable analog arrays  
A large-scale field-programmable analog array (FPAA) for rapidly prototyping analog systems and an arbitrary analog waveform generator. The large-scale FPAA includes a floating-gate transistor...
7439765 Mask-programmable logic macro and method for programming a logic macro  
A mask-programmable logic macro includes at least three input terminals an output terminal and a first set of transistors comprised of at least three transistors formed on a semiconductor...
7439767 Semiconductor integrated circuit and construction using densely integrated cells  
A semiconductor integrated circuit having a first cell row including a plurality of cells disposed in a row direction, each cell having a prescribed cell width in the row direction and at least one...
7436210 Next generation 8B10B architecture  
Eight-bit ten-bit (8B10B) coding is provided in a hard intellectual property (IP) block with the capability of supporting a greater range of data rates (e.g., data rates less than, equal to, and...
7436209 Nanoscale electronic latch  
In one embodiment of the present invention, a nanoscale latch is implemented by interconnecting an enable line, two control lines, and a pull-down line, when needed, to a signal line carrying...
7436207 Integrated circuit device having at least one of a plurality of bond pads with a selectable plurality of input-output functionalities  
An integrated circuit device having at least one bond pad is coupled to a selectable plurality of input-output functionalities, e.g., an oscillator input, an analog input, an analog output, a...
7437635 Testing hard-wired IP interface signals using a soft scan chain  
A set of boundary scan registers are implemented by reconfiguring the functional blocks of a reconfigurable device. This “soft-wired” set of boundary scan registers can be used to test the...
7437584 Apparatus and method for reducing power consumption in electronic devices  
An apparatus and method for reducing power consumption in a programmable logic device (PLOD) having multiple logic blocks and macrocells. Power consumption is reduced by detecting programmable...
7432733 Multi-level routing architecture in a field programmable gate array having transmitters and receivers  
A routing architecture in a field programmable gate array (FPGA) having a plurality of logic clusters wherein each logic cluster has at least two sub-clusters. The logic clusters are arranged in...
7434192 Techniques for optimizing design of a hard intellectual property block for data transmission  
Techniques are provided for implementing channel alignment for a data transmission interface in an HIP block on a programmable logic integrated circuit. The HIP block channel alignment logic can be...
7432734 Versatile logic element and logic array block  
An embodiment of this invention pertains to a versatile and flexible logic element and logic array block (“LAB”). Each logic element includes a programmable combinational logic function block...
7432735 Programmable gate array apparatus and method for switching circuits  
A programmable gate array apparatus includes macrocells connected in series, each macrocell including first group of storage elements in which active context data item is stored and second group of...
7429870 Resilient integrated circuit architecture  
The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of...
7430697 Method of testing circuit blocks of a programmable logic device  
A method of testing circuits in a programmable logic device is described. According to one embodiment of the invention, a method comprises steps of configuring a configurable logic block of the...
7427874 Interface block architectures  
A programmable logic device in accordance with an embodiment of the invention includes configurable logic blocks, embedded random access memory (RAM) blocks, and input/output blocks adapted to...
7423453 Efficient integrated circuit layout scheme to implement a scalable switching network used in interconnection fabric  
Efficient layout schemes to implement switching networks of an interconnection fabric in an integrated circuit to connect two sets of conductors through rows of switches with prescribed number of...
7423452 Integrated circuit including a multiplexer circuit  
An integrated circuit including a multiplexer circuit and numerous memory cells are coupled to one another for improved performance. The multiplexer circuit includes a first input terminal and a...
7420392 Programmable gate array and embedded circuitry initialization and processing  
Interconnecting logic provides connectivity of an embedded fixed logic circuit, or circuits, with programmable logic fabric of a programmable gate array such that the fixed logic circuit functions...
7418603 Mobile terminal, circuit board, circuit board design aiding apparatus and method, design aiding program, and storage medium having stored therein design aiding program  
The present invention provides a tamper resistant circuit board, an apparatus and method for aiding the design of the circuit board, a computer readable storage medium having stored therein a...
7418692 Method for designing structured ASICS in silicon processes with three unique masking steps  
A multi-function core base cell includes a set of functional microcircuits. These microcircuits are used to design a Library of Logic Function Macros. The functional macros consisting of one or...
7417454 Low-swing interconnections for field programmable gate arrays  
An apparatus is disclosed that may reduce the dynamic power dissipation of a configurable IC device such as an FPGA by reducing the peak-to-peak voltage swing of signals transmitted over the...
7417456 Dedicated logic cells employing sequential logic and control logic functions  
A dedicated logic cell in a programmable logic structure is described that comprises the following primary components: a configurable logic function or look-up table (LL), a dedicated logic...
7414430 Programmable logic device having an embedded differential clock tree  
A clock distribution network having: a backbone clock signal line configured to provide a differential clock signal; multiple branches coupled to the backbone clock signal line for distributing the...
7414433 Interconnect structure enabling indirect routing in programmable logic  
An interconnect structure enables indirect routing in programmable logic. The structure includes a plurality of routing lines, and switch box(es) and connection boxes coupled to the plurality of...
7414428 Non-volatile memory configuration scheme for volatile-memory-based programmable circuits in an FPGA  
A non-volatile memory configuration scheme is disclosed for volatile-memory-based programmable circuits in a programmable integrated circuit that includes an FPGA fabric, a plurality of first...
7414429 Integration of high-speed serial interface circuitry into programmable logic device architectures  
The architecture of a programmable logic device (“PLD”) is modified in one or more of several respects to facilitate inclusion of high-speed serial interface (“HSSI”) circuitry in the PLD....
7412635 Utilizing multiple bitstreams to avoid localized defects in partially defective programmable integrated circuits  
Methods and structures utilizing multiple configuration bitstreams to program integrated circuits (ICs) such as programmable logic devices (PLDs), thereby enabling the utilization of partially...
7408383 FPGA architecture having two-level cluster input interconnect scheme without bandwidth limitation  
An interconnect architecture for a programmable logic device comprises a plurality of interconnect routing lines. The data inputs of a plurality of first-level multiplexers are connected to the...
7408381 Circuit for and method of implementing a plurality of circuits on a programmable logic device  
A circuit for implementing a plurality of circuits on a programmable logic device, the circuit comprising a first circuit implemented on a first portion of the programmable logic device; a second...
7406573 Reconfigurable processor element utilizing both coarse and fine grained reconfigurable elements  
A reconfigurable processor element incorporating both course and fine grained reconfigurable elements. In alternative implementations, the present invention may comprise a reconfigurable processor...
7405588 Device and data processing method employing the device  
The present invention relates to an LSI in which functions can be changed, and realizes, particularly, a system LSI in which functions are changed by changing connections of the circuit by use of...
7403035 Low-power transceiver architectures for programmable logic integrated circuit devices  
High-speed serial interface or transceiver circuitry on a programmable logic device integrated circuit (“PLD”) includes features that permit the PLD to satisfy a wide range of possible user...
7400167 Apparatus and methods for optimizing the performance of programmable logic devices  
A programmable logic device (PLD) includes first and second circuits. The first and second circuits are part of a user's design to be implemented using the PLD's resources. The first circuit is...
7397275 Element controller for a resilient integrated circuit architecture  
The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of...
7397276 Logic block control architectures for programmable logic devices  
Systems and methods are disclosed herein to provide logic block slice architectures and programmable logic block architectures along with control logic architectures in accordance with embodiments...
7394287 Programmable logic device having complex logic blocks with improved logic cell functionality  
A CLB-based PLD with logic cells having improved logic, register, arithmetic, logic packing and timing functions and capabilities is disclosed. The CLBs of the PLD are arranged in rows and columns...
7394288 Transferring data in a parallel processing environment  
An integrated circuit includes a plurality of tiles. Each tile includes a processor, a switch including switching circuitry to forward data over data paths from other tiles to the processor and to...
7394289 Synchronous first-in/first-out block memory for a field programmable gate array  
The present invention comprises a field programmable gate array that has a plurality of dedicated first-in/first-out memory logic components. The field programmable gate array includes a plurality...
7391234 Circuit and circuit connecting method  
A network structure configures a blocking network having constraint against such a combination of said network input terminal and network output terminal as to make it unfeasible to further...
7391235 Programmable crossbar signal processor with op-amp outputs  
A device including a crossbar array including a programmable material layer and an array of op-amps connected to outputs of the crossbar array.
7391236 Distributed memory in field-programmable gate array integrated circuit devices  
Circuitry for facilitating the use of the memory elements in the look-up tables (“LUTs”) of a field programmable gate array (“FPGA”) as user-accessible, distributed RAM. For example, a...
7392499 Placement of input/output blocks of an electronic design in an integrated circuit  
Approaches for placing a plurality of input/output blocks (IOBs) of an electronic design in an integrated circuit are disclosed. The electronic design includes at least one input/output bus...
7385417 Dual slice architectures for programmable logic devices  
Systems and methods are disclosed herein to provide dual slice architectures and programmable logic block architectures along with control logic architectures in accordance with embodiments of the...
Matches 151 - 200 out of 1430 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >