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9041431 Partial reconfiguration and in-system debugging  
Embedded logic is implemented in a partially reconfigurable programmable logic device (PLD), thus allowing debugging of implemented instantiations of logic after partial reconfiguration. Several...
9030227 Methods and apparatus for providing redundancy on multi-chip devices  
A multi-chip package may include first and second integrated circuit dies that are each partitioned into multiple logic regions. The logic regions of the first and second dies may be coupled via...
9018979 Universal digital block interconnection and channel routing  
A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs...
9018975 Methods and systems to stress-program an integrated circuit  
Methods and systems to stress-program a first integrated circuit (IC) block to output a pre-determined value upon activation/reset, such as to support time-zero compensation/trimming. To program,...
9018978 Runtime loading of configuration data in a configurable IC  
A novel configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations is provided. During the operation of the IC, each particular...
9000801 Implementation of related clocks  
An integrated circuit (IC) that includes multiple clock domains is provided. Each clock domain operates at a user specified data rate, and the data rates of at least two of the clock domains are...
8996906 Clock management block  
A novel integrated circuit (IC) that configurably distributes clocks from multiple clock sources to multiple sets of circuits is described. The IC includes multiple clock sources and multiple...
8988104 Multiple-time configurable non-volatile look-up-table  
Innovative Non-Volatile Look-Up-Table (NV-LUT) has been constructed by Single Gate Logic Non-Volatile Memory (SGLNVM) devices processed with the standard CMOS logic process. One of a pair of...
8987868 Method and apparatus for programmable heterogeneous integration of stacked semiconductor die  
Method and apparatus for programmable heterogeneous integration of stacked semiconductor die are described. In some examples, a semiconductor device includes a first integrated circuit (IC) die...
8981812 Self-ready flash null convention logic  
A self-ready flash null Convention Logic (NCL) gate includes a one-shot circuit to create the flash timing to reset the gate to a null state. The one-shot circuit may be any type of circuit to...
8981813 Method and apparatus for facilitating communication between programmable logic circuit and application specific integrated circuit with clock adjustment  
A logic processing device, containing an application specific integrated circuit (“ASIC”) and field programmable gate array (“FPGA”), capable of automatically interfacing between ASIC and FPGA is...
8975917 Programmable logic device  
A programmable logic device includes a plurality of arithmetic circuits; a configuration changing circuit for changing a logic state of each of the plurality of arithmetic circuits by rewriting...
8975918 Lookup table and programmable logic device including lookup table  
To optimize the arrangement of configuration data stored in a configuration memory. A lookup table includes a memory configured to store configuration data, a plurality of multiplexers each...
8970252 Field programmable analog array  
In an embodiment, a field programmable analog array (FPAA) comprises state variable filter engines arranged in parallel, each state variable filter engine comprising at least one variable...
8957701 Integrated circuit  
An integrated circuit capable of improving all factors, which are area, cost, logic change function, operating frequency, flexibility, through-put and power consumption, and a reconfigurable...
8952722 Programmable logic device and method for driving programmable logic device  
Configuration is performed in accordance with a plurality of states when power supply voltage is supplied intermittently. At the time of start of supply of power supply voltage with configuration,...
8949763 Apparatus and methods for optimization of integrated circuits  
A system for computer-aided design (CAD) of an integrated circuit (IC) uses a computer. The computer is configured to optimize placement, routing, and/or region configuration of the integrated...
8941409 Configurable storage elements  
An integrated circuit (“IC”) having configurable logic circuits for configurably performing multiple different logic operations based on configuration data is provided. The IC includes a...
8928350 Programming the behavior of individual chips or strata in a 3D stack of integrated circuits  
There is provided a strata manager within a 3D chip stack having two or more strata. The strata manager includes a plurality of scannable configuration registers, each being arranged on a...
8922244 Three dimensional integrated circuit connection structure and method  
An integrated circuit die stack comprises a first die and a second die connected to each other. Each of the first and second dies comprise a functional circuitry, a plurality of first contacts on...
8922243 Die-stacked memory device with reconfigurable logic  
A die-stacked memory device incorporates a reconfigurable logic device to provide implementation flexibility in performing various data manipulation operations and other memory operations that use...
8901961 Placement, rebuffering and routing structure for PLD interface  
A PLD comprises a substrate, an array of programmable logic elements formed in the substrate, a first columnar interface coupling to the array of logic elements and extending in the substrate...
8896345 Semiconductor device  
A semiconductor device including a PLD which can increase the execution speed of an application with low power consumption is provided. The semiconductor device includes a programmable logic...
8884649 System and method for stationary finite impulse response filters in programmable microelectronic circuits  
A Field Programmable Gate Array (FPGA) to implement channel equalization to mitigate group velocity dispersion in an optical system. In one embodiment, a mapping is loaded into the FPGA whereby...
8872544 Systems, pipeline stages, and computer readable media for advanced asynchronous pipeline circuits  
Systems, pipeline stages, and computer readable media for advanced asynchronous pipeline circuits are disclosed. According to one aspect, the subject matter described herein includes a...
8873287 Nonvolatile programmable logic switch  
A nonvolatile programmable logic switch according to an embodiment includes first and second cells, each of the first and second cells including: a first memory having a first to third terminals,...
8872546 Interface circuitry for a test apparatus  
In one embodiment, a test apparatus includes a field programmable gate array (FPGA) including a first transmitter to communicate first signals according to current mode logic (CML) signaling and a...
8868820 RAM block designed for efficient ganging  
A random-access memory block for a field programmable gate array includes a random-access memory array having address inputs, a data input, a data output and including a plurality of storage...
8860458 Integrated circuits with logic regions having input and output bypass paths for accessing registers  
Integrated circuits such as programmable integrated circuits may include programmable logic regions that can be configured to perform custom functions. Interconnects may be used to route signals...
8860465 Protecting data from decryption from power signature analysis in secure applications  
Disclosed is a novel circuit able to generate any logic combination possible as a function of the input logic signals. The circuit is described as a 2 input logistic map circuit but may be...
8860457 Parallel configuration of a reconfigurable instruction cell array  
A reconfigurable instruction cell array (RICA) includes a plurality of switch boxes. Each switch box includes an instruction cell and a switch fabric configurable according to a configuration word...
8861517 Petaflops router  
Disclosed is a method and system for performing operations on at least one input data vector in order to produce at least one output vector to permit easy, scalable and fast programming of a...
8854079 Error detection in nonvolatile logic arrays using parity  
A system on chip (SoC) has a nonvolatile memory array of n rows by m columns coupled to one or more of the core logic blocks. M is constrained to be an odd number. Each time a row of m data bits...
8847622 Micro-granular delay testing of configurable ICs  
A method for testing a set of circuitry in an integrated circuit (IC) is described. The IC includes multiple configurable circuits for configurably performing multiple operations. The method...
8836372 Minimizing power consumption in asynchronous dataflow architectures  
A digital signal processing apparatus includes a digital circuit device having one or more elements configured to process digital data; a power supply configured to deliver a controllable...
8816718 Variable response mode for synchronous data read  
In one embodiment, a programmable logic device includes a memory and an input/output (I/O) interface adapted to enter a variable response mode responsive to an assertion of a control signal. The...
8816719 Re-programmable antifuse FPGA utilizing resistive CeRAM elements  
A re-programmable antifuse field programmable gate array (FPGA) integrated circuit, the FPGA comprising: a plurality of CeRAM resistive switching elements forming a connection block, the switching...
8806249 Systems and methods for reducing static and total power consumption in programmable logic device architectures  
A method and system for reducing power consumption in a programmable logic device (PLD) is provided. The power consumption may be reduced by preferably continually considering power consumption as...
8806404 System and method for reducing reconfiguration power usage  
A system and method for reducing power consumption in a reconfigurable integrated circuit. Some embodiments provide placement and routing programs that reduce the number of bits to be...
8773167 Implementing logic circuits with memristors  
Implementing logic with memristors may include circuitry with at least three memristors and a bias resistor in a logic cell. One of the at least three memristors is an output memristor within the...
8766665 Reconfigurable logic automata  
A family of reconfigurable asynchronous logic elements that interact with their nearest neighbors permits reconfigurable implementation of circuits that are asynchronous at the bit level. A...
8766701 Analog multiplexing with independent power supplies  
An apparatus relating generally to an analog multiplexer is disclosed. In such an apparatus, the analog multiplexer has first select circuits and at least one second select circuit. The first...
8760194 Runtime loading of configuration data in a configurable IC  
Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of...
8760193 Configurable storage elements  
An integrated circuit (“IC”) having configurable logic circuits for configurably performing multiple different logic operations based on configuration data is provided. The IC includes a row of...
8754670 Real time reconfigurable logic device and semiconductor package having the same  
According to example embodiments, a logic device includes a first functional block configured to perform a first operation according to first operation information and a second operation according...
8754671 Field programmable gate array utilizing two-terminal non-volatile memory  
Providing for a field programmable gate array (FPGA) utilizing resistive random access memory (RRAM) technology is described herein. By way of example, the FPGA can comprise a switching block...
8743559 Interconnect pattern for semiconductor packaging  
An interconnect array is described. The interconnect array comprises a pattern of adjacent interconnect tiles, each interconnect tile comprising ten interconnect locations including eight I/O...
8742940 Fuse and breaker alarm device and method using a finite state machine  
An alarm circuit and method of monitoring a circuit protection device are disclosed. The alarm circuit includes a circuit protection device connected in series at an input voltage of a load. The...
8736299 Setting security features of programmable logic devices  
Systems and methods are disclosed for allowing security features to be selectively enabled during device configuration. For example, a programmable integrated circuit device is provided that...
8736303 PSOC architecture  
A circuit with a plurality of analog circuit blocks, each configured to provide at least one analog function and a programmable interconnect coupled of the analog circuit blocks and configurable...