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8183554 |
Symmetrical programmable memresistor crossbar structure
A crossbar structure includes a first layer or layers including first p-type regions and first n-type regions, a second layer or layers including second p-type regions and second n-type regions,...
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8183882 |
Reconfigurable IC that has sections running at different reconfiguration rates
Some embodiments provide a reconfigurable IC that includes several sections. Each section includes several configurable circuits, each of which configurably performs a set of operations. Each...
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8183883 |
Integrated circuit reconfiguration techniques
A memory configuration circuit is provided. The memory configuration circuit may be integrated into a programmable logic device (PLD) and as such, may be used to configure and reconfigure specific...
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8183881 |
Configuration memory as buffer memory for an integrated circuit
Method and apparatus for using configuration memory for buffer memory is described. Drivers associated with a portion of the configuration memory are rendered incapable of creating a contentious...
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8179159 |
Configuration interface to stacked FPGA
A method of configuring a stacked integrated circuit (“IC”) having a first IC die with configurable logic and a second IC die electrically coupled to the first IC die through an array of int...
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8161249 |
Method and apparatus for multi-port arbitration using multiple time slots
An apparatus includes a programmable device that has an interface and command ports that can each receive commands, each command requesting an information transfer through the interface. A...
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8151237 |
Disabling unused IO resources in platform-based integrated circuits
The present invention is directed to methods for disabling unused IO resources in a platform-based integrated circuit. A slice is received from a vendor. The slice includes an IO circuit unused by...
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8138786 |
Apparatus and methods for adjusting performance of integrated circuits
A programmable logic device (PLD) includes a delay circuit and a body-bias generator. The delay circuit has a delay configured to represent a delay of user circuit implement in the PLD. The...
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8131909 |
System and method of signal processing engines with programmable logic fabric
A high performance field programmable gate array is described with one or more signal processing engines coupled to a programmable logic fabric. Each signal processing engine includes a signal...
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8125242 |
Reconfigurable logic fabrics for integrated circuits and systems and methods for configuring reconfigurable logic fabrics
In accordance with the present invention there are provided herein asynchronous reconfigurable logic fabrics for integrated circuits and methods for designing asynchronous circuits to be...
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8115510 |
Configuration network for an IC
Some embodiments of the invention provide a configurable integrated circuit (IC) that includes several configurable circuits grouped in several tiles. The configurable IC also includes a...
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8115511 |
Method for fabrication of a semiconductor device and structure
A configurable integrated circuit (IC) system comprising: a first die comprising input/output cells; and a configurable logic second die connected by a first plurality of through-silicon-vias...
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8103866 |
System for reconfiguring a processor array
Embodiments of the invention are directed to a system for reconfiguring a processor array while it is currently operating. The reconfiguration system uses configuration chains streamed down...
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8103975 |
Apparatus and methods for optimizing the performance of programmable logic devices using multiple supply voltage
A programmable logic device (PLD) includes first and second circuits. The first and second circuits are part of a user's design to be implemented using the PLD's resources. The first circuit is...
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8098082 |
Multiple data rate interface architecture
Method and circuitry for implementing high speed multiple-data-rate interface architectures for programmable logic devices. The invention partitions I/O pins and their corresponding registers into...
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RE43081 |
Method and device for configuration of PLDS
A Programmable Logic Device provides efficient scalability for configuration memory programming while requiring reduced area for implementation. The device includes an array of configuration memory...
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8086922 |
Programmable logic device with differential communications support
Programmable logic device integrated circuits with differential communications circuitry are provided in which the differential communications circuitry is used to support programming, testing, and...
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8078899 |
Asynchronous conversion circuitry apparatus, systems, and methods
Apparatus, systems, and methods operate to receive a sufficient number of asynchronous input tokens at the inputs of an asynchronous apparatus to conduct a specified processing operation, some of...
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8077623 |
Signal routing in processor arrays
There is provided a method for routing a plurality of signals in a processor array, the processor array comprising a plurality of processor elements interconnected by a network of switches, each...
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8073988 |
Reconfigurable computing device and method for inspecting configuration data
A reconfigurable computing device includes a reconfigurable logical device of which a circuit logic can be changed based on configuration data, a storage part to store beforehand input-output...
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8072238 |
Programmable logic device architecture with the ability to combine adjacent logic elements for the purpose of performing high order logic functions
A high efficiency PLD architecture having logic elements that can be selectively combined to perform higher order logic functions than can be performed alone by a single logic element. The...
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8072237 |
Computer-aided design tools and memory element power supply circuitry for selectively overdriving circuit blocks
Integrated circuits are provided with circuitry such as multiplexers that can be selectively configured to route different adjustable power supply voltages to different circuit blocks on the...
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8067960 |
Runtime loading of configuration data in a configurable IC
Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the...
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8067954 |
Fault tolerant integrated circuit architecture
The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of...
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8063659 |
Low depth programmable priority encoders
An apparatus having a plurality of first circuits, second circuits, third circuits and fourth circuits is disclosed. The first circuits may be configured to generate a plurality of first signals in...
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8058899 |
Logic cell array and bus system
A logic cell array having a number of logic cells and a segmented bus system for logic cell communication, the bus system including different segment lines having shorter and longer segments for...
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8058896 |
Flexible parallel/serial reconfigurable array configuration scheme
A programming interface device for a programmable logic circuit comprises a series of parallel logic block chains each having first and second connection means, the first and second connection...
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8060674 |
Systems and methods for data storage devices and controllers
An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated...
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8049531 |
General purpose input/output system and method
A system for general purpose input-output (IO), including a first pad; an IO buffer comprising the first pad; and an IO datapath logic block operatively connected to the IO buffer, where the IO...
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8040153 |
Method and apparatus for configuring the internal memory cells of an integrated circuit
In one embodiment, a method and apparatus for configuring the internal memory cells of an integrated circuit through the logic fabric are disclosed. For example, an integrated circuit according to...
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8040154 |
Software programmable logic using spin transfer torque magnetoresistive devices
Systems, circuits and methods for software programmable logic using Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) technology are disclosed. Magnetic tunnel junction (MTJ)...
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8040151 |
Programmable logic device with programmable wakeup pins
A programmable logic device (PLD) adapted to enter a low-power or sleep mode with programmable wakeup pins in a wakeup group of pins is disclosed. Wake on a single pin change, wake on vector, and...
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8035414 |
Asynchronous logic automata
A family of reconfigurable, charge-conserving asynchronous logic elements that interact with their nearest neighbors permits design and implementation of circuits that are asynchronous at the bit...
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8026739 |
System level interconnect with programmable switching
Different functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. Configuration registers or configuration...
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8024170 |
Configuration of reconfigurable interconnect portions
Configuring reconfigurable interconnect resources employing a switch matrix and configuration bit look-up table are disclosed. Reconfigurable interconnect resources include multiplexors to decrease...
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8018248 |
Adjustable interface buffer circuit between a programmable logic device and a dedicated device
An integrated circuit includes a programmable logic device, a dedicated device, and an interface circuit between the two. The interface circuit can be easily modified to accommodate the different...
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8018249 |
Logic chip, logic system and method for designing a logic chip
A logic chip has a plurality of individually addressable resource blocks each of the resource blocks having logic circuitry, and a communication bar extending across a plurality of the individually...
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8013629 |
Reconfigurable logic automata
A family of reconfigurable asynchronous logic elements that interact with their nearest neighbors permits reconfigurable implementation of circuits that are asynchronous at the bit level, rather...
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8005212 |
Device and method for performing a cryptoalgorithm
A device for executing a cryptoalgorithm including a central processing unit for a first sub-group of operations and for a flow control of the cryptoalgorithm as well as a hardware circuit for a...
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7994815 |
Cross-point latch and method of operating the same
Provided is a cross-point latch and a method of operating the cross-point latch. The cross-point latch includes a signal line, two control lines crossing the signal line, and unipolar switches...
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7994816 |
Multiple data rate memory interface architecture
The present invention provides a DQS bus for implementing high speed multiple-data-rate interface architectures in programmable logic devices. The DQS bus has a balanced tree structure between at...
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7987398 |
Reconfigurable device
Disclosed is a reconfigurable device including at least a bus that mutually connects functional blocks, a configuration information memory disposed corresponding to each of the functional blocks,...
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7986158 |
Methods, apparatuses, and products for a secure circuit
Methods, systems, apparatuses and products are disclosed for providing security circuits. Exemplary embodiments including semiconductor chips on circuit boards are shown, together with application...
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7984215 |
Semiconductor device
The router which relays a transfer request and a reply between master and slave components has request-control circuits provided therein. The request-control circuits judge the slave component to...
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7982489 |
Resilient integrated circuit architecture
The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of...
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7977970 |
Enhanced field programmable gate array
An enhanced performance field programmable gate array integrated circuit comprises a field programmable gate array and other functional circuitry such as a mask-programmable gate array in the same...
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7973559 |
Method for fabrication of a semiconductor element and structure thereof
Re-programmable antifuses and structures utilizing re-programmable antifuses are presented. Such structures include a configurable interconnect circuit having at least one re-programmable antifuse,...
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7973555 |
Configuration interface to stacked FPGA
A semiconductor device includes a field-programmable gate array (“FPGA”) die (202) having a frame address bus (604), a frame data bus (608), and a second integrated circuit (“IC”) die (204) attache...
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7971051 |
FPGA configuration protection and control using hardware watchdog timer
An apparatus and method provides automatic reconfiguration of an FPGA, such as in case of lost configuration or configuration error, and software-controlled reconfiguration may be provided that...
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7970979 |
System and method of configurable bus-based dedicated connection circuits
A high performance field programmable gate array is described with one or more signal processing engines coupled to a programmable logic fabric. Each signal processing engine includes a signal...
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