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7619443 Programmable logic device architectures and methods for implementing logic in those architectures  
A programmable logic device (“PLD”) architecture includes logic elements (“LEs”) grouped together in clusters called logic array blocks (LABs”). To save area, local feedback resources...
7616026 System-on-a-chip integrated circuit including dual-function analog and digital inputs  
An integrated circuit includes a plurality of inputs, a plurality of output pads, a programmable logic block, an analog circuit block, an analog-to-digital converter programmably coupleable to...
7616025 Programmable logic device adapted to enter a low-power mode  
A programmable logic integrated circuit device adapted to enter a low-power mode is described. The integrated circuit device includes a programmable logic block, a first low-power mode control...
7613943 Programmable system on a chip  
A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a...
7609089 FPGA architecture at conventional and submicron scales  
Reconfigurable logic devices and methods of programming the devices are disclosed. The logic device includes a look-up table (LUT) and at least one storage element configured for sampling LUT...
7609085 Configurable integrated circuit with a 4-to-1 multiplexer  
Some embodiments provide a configurable integrated circuit with a tile. The tile has a first input multiplexer (IMUX), a second IMUX, and a look up table (LUT). The first IMUX is configured as a...
7606969 Programmable logic devices  
An improved programmable logic device provides increased efficiency and enhanced flexibility in configuration of block memories and includes one or more memory blocks and a vertical shift register...
7603578 Programmable system on a chip for power-supply voltage and current monitoring and control  
A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and voltage-measuring and control analog and digital...
7596774 Hard macro with configurable side input/output terminals, for a subsystem  
A hard macro device (HMD), for a subsystem (TMi) such as a data processor, comprises a processing core (C) provided with at least one time critical input terminal (CIT) adapted to feed it with time...
7595659 Logic cell array and bus system  
A logic cell array having a number of logic cells and a segmented bus system for logic cell communication, the bus system including different segment lines having shorter and longer segments for...
7590904 Systems and methods for detecting a failure event in a field programmable gate array  
An embodiment generally relates to a method of self-detecting an error in a field programmable gate array (FPGA). The method includes writing a signature value into a signature memory in the FPGA...
7589651 Flexible signal detect for programmable logic device serial interface  
A serial interface for a programmable logic device (PLD) uses an analog-to-digital converter (ADC) in place of conventional signal detect and receiver detect circuitry. A separate ADC can be used...
7589555 Variable sized soft memory macros in structured cell arrays, and related methods  
The logic cells (HLEs) of a structured application-specific integrated circuit (structured ASIC) can be used to provide memory blocks of various sizes. Any one or more of several techniques may be...
7584447 PLD architecture for flexible placement of IP function blocks  
In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function...
7576565 Crossbar waveform driver circuit  
A driving waveform circuit includes a crossbar array having input columns and output rows wherein the crossbar array is configured to store data in the form of high or low resistance states, delay...
7576564 Configurable IC with routing circuits with offset connections  
Some embodiments provide a configurable integrated circuit (“IC”) that includes several configurable tiles arranged in a tile arrangement. Each configurable tile has a set of configurable logic...
7576563 High fan-out signal routing systems and methods  
Systems and methods are disclosed herein to provide high fan-out signal routing. For example, in accordance with an embodiment of the present invention, a programmable logic device includes a...
7576561 Device and method of configuring a device having programmable logic  
A method of configuring a device having programmable logic is disclosed. The method comprises storing instructions in the device; selecting between one of the instructions stored in the device and...
7571395 Generation of a circuit design from a command language specification of blocks in matrix form  
Generation of a circuit design using a command language. The various approaches include generating in a memory arrangement respective instances of design blocks in response to user-entered commands...
7570076 Segmented programmable capacitor array for improved density and reduced leakage  
A capacitor circuit and method to reduce layout area, leakage current, and to improve yield is disclosed. The circuit includes an output terminal ( 100 ), a plurality of circuit elements ( 322,...
7564262 Crossbar comparator  
A device includes a first crossbar array having first input columns and first output rows, wherein a plurality of the rows of the first crossbar array are configured to store first stored data in...
7564261 Embedding memory between tile arrangement of a configurable IC  
Some embodiments of the invention provide a configurable IC that includes several configurable computational tiles and several memory tiles. These tiles are arranged in a particular tile...
7560952 Integrated circuit device having state-saving and initialization feature  
An integrated circuit device has a state-saving feature and includes a programmable logic block, I/O pads, a dedicated register, at least one volatile memory block, a non-volatile memory block, a...
7558967 Encryption for a stream file in an FPGA integrated circuit  
A system for encrypting and decrypting data in a data stream for programming a Field Programmable Gate Array (FPGA). The system allows for an enable bit to be set for a gap in the data stream and...
7557610 Columnar floorplan  
An FPGA is laid out as a plurality of repeatable tiles, wherein the tiles are disposed in columns that extend from one side of the die to another side of the die, and wherein each column includes...
7557607 Interface device reset  
Reset of an interface device of an integrated circuit is described. A Peripheral Component Interconnect Express core is instantiated as an application specific circuit block in the integrated...
7554357 Efficient configuration of daisy-chained programmable logic devices  
In one embodiment, a programmable logic device includes: a multiplexer adapted to select a compressed configuration bitstream from a plurality of external serial interface memories; a serial...
7548091 Method and apparatus to power down unused configuration random access memory cells  
A method for reducing power consumption for a programmable logic device (PLD) is provided. In the method, configuration cells associated with used logic portions of the PLD are powered. A...
7548090 Configurable IC with packet switch network  
Some embodiments of the invention provide configurable integrated circuit (IC) that includes several configurable circuits that are conceptually in tiles. The IC also includes a first data network...
7548084 Fault tolerant integrated circuit architecture  
The exemplary embodiments provide a resilient integrated circuit. An exemplary IC comprises a plurality of composite circuit elements, a state machine element (SME), and a plurality of...
7546408 Method and apparatus for communication within a programmable device using serial transceivers  
Method and apparatus for communication within a programmable logic device using serial transceivers is described. In an example, an integrated circuit includes a first module and a second module....
7541832 Low power, race free programmable logic arrays  
The present invention provides a PLA architecture where the AND plane is implemented with NAND logic. The OR plane may be implemented with various logic, but in one embodiment, the OR plane is...
7538580 Logic array devices having complex macro-cell architecture and methods facilitating use of same  
Logic array devices having complex macro-cell architecture and methods facilitating use of same. A semiconductor device comprising an array of logic cells and programmable metal includes gate...
7538578 Multiple data rates in programmable logic device serial interface  
A serial interface for a programmable logic device can be operated according to various communications protocols and includes both a receiver portion and a transmitter portion. The receiver portion...
7538577 System and method for configuring a field programmable gate array  
A mechanism within an electronic system for adapting a field programmable gate array (FPGA) to a flash memory device that supports a synchronous serial peripheral interface (SPI) by coupling a...
7536666 Integrated circuit and method of routing a clock signal in an integrated circuit  
The various embodiments of the present invention relate to coupling clock signals between a plurality of data transceivers. According to one embodiment, a clock routing circuit having data...
7536615 Logic analyzer systems and methods for programmable logic devices  
A programmable logic device includes, in accordance with one embodiment, a plurality of logic blocks; an interconnect structure adapted to route signals among the logic blocks; and a memory for...
7535254 Reconfiguration of a hard macro via configuration registers  
Reconfiguration of a hard macro via configuration registers is described. An integrated circuit includes configuration memory cells coupled to a hard macro via configuration registers. The...
7533249 Reconfigurable integrated circuit, circuit reconfiguration method and circuit reconfiguration apparatus  
In order to reuse configuration information in a dynamic reconfiguration arithmetic circuit, data lines, address lines, a mask register and the like are required as hardware resources for rewriting...
7528627 Method and apparatus for performing shifting in an integrated circuit  
Some embodiments of the invention provide a configurable integrated circuit (“IC”). This IC includes several configurable circuits for receiving configuration data and configurably performing a...
7525342 Reconfigurable IC that has sections running at different looperness  
Some embodiments provide a reconfigurable IC that includes at least two sections, each with several configurable circuits. Each configurable circuit configurably performs a set of operations. Each...
7525340 Programmable logic device architecture for accommodating specialized circuitry  
A programmable logic device (PLD) having one or more programmable logic regions and one or more conventional input/output regions additionally has one or more peripheral areas including specialized...
7518400 Barrel shifter implemented on a configurable integrated circuit  
Some embodiments provide a barrel shifter on a configurable integrated circuit (IC). The barrel shifter has a first set of tiles and a second set of tiles with configurable circuits. The barrel...
7514959 Structured integrated circuit device  
A configurable logic array may include: a multiplicity of logic cells, containing look-up tables; customizable metal and via connection layers overlying the multiplicity of logic cells; a...
7512849 Reconfigurable programmable logic system with configuration recovery mode  
A programmable logic system includes a reconfigurable programmable logic device and configuration storage that stores at least two configurations. A default configuration loads first and then loads...
7512028 Integrated circuit feature definition using one-time-programmable (OTP) memory  
In one embodiment, a integrated circuit (IC) configurable to have any one of a plurality of different feature sets, the IC including (a) one or more feature blocks adapted to be independently...
7508231 Programmable logic device having redundancy with logic element granularity  
A PLD having logic element row granularity redundancy is disclosed. The PLD includes a plurality of LABs arranged in an array and a plurality of horizontal and vertical inter-LAB lines...
7506297 Methodology for scheduling, partitioning and mapping computational tasks onto scalable, high performance, hybrid FPGA networks  
An automatically reconfigurable high performance FPGA system that includes a hybrid FPGA network and an automated scheduling, partitioning and mapping software tool adapted to configure the hybrid...
7504858 Configurable integrated circuit with parallel non-neighboring offset connections  
Some aspects of the present invention involve connections in a configurable IC. Some embodiments provide a configurable integrated circuit with a first array of tiles. The first array of tiles has...
7501854 True/complement generator having relaxed setup time via self-resetting circuitry  
An integrated circuit includes a data node, an output node, and set logic coupling to the data node to the output node. The set logic changes a state of the output node in response to a change in...
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