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6981091 Using transfer bits during data transfer from non-volatile to volatile memories  
Structures and methods for transferring data from non-volatile to volatile memories. An extra bit, called a “transfer bit”, is included in each data word. The transfer bit is set to the...
6976118 Method and system for programming FPGAs on PC-cards without additional hardware  
Programming or updating hardware electronic circuits without manually accessing the circuits is dislcosed. The circuit arrangement includes an EEPROM device, a FPGA device which is accessible via a...
6975137 Programmable logic devices with integrated standard-cell logic blocks  
A programmable logic device (PLD) with a programmable logic core, block memory, and I/O circuitry has one or more blocks of standard-cell logic (SLBs) that are integrated into the PLD design to...
6971004 System and method of dynamically reconfiguring a programmable integrated circuit  
The present invention system and method enables dynamic reconfiguration of an electronic device in a convenient and efficient manner. In one embodiment, the electronic device includes a...
6970012 Programmable logic device having heterogeneous programmable logic blocks  
A programmable logic device (PLD) having heterogeneous programmable logic blocks. In one embodiment, the PLD includes programmable interconnect circuitry and programmable input-output circuitry...
6960936 Configurable electronic device with mixed granularity  
The configurable electronic device comprises a configurable electronic device includes at least one configurable basic assembly. The basic assembly includes a programmable circuit having a...
6960935 Method and apparatus for cascade programming a chain of cores in an embedded environment  
A system for clearing and programming the memory of an FPGA IC, when the IC is comprised of a plurality of cores. The system clears the memory of the of cores. The system then sequentially verifies...
6957340 Encryption key for multi-key encryption in programmable logic device  
It is sometimes desirable to protect a design used in a PLD from being copied. If the design is stored in a different device from the PLD and read into the PLD through a bitstream, an unencrypted...
6954084 Logic circuits using polycrystalline semiconductor thin film transistors  
A large scale integrated (LSI) or a very large scale integrated (VLSI) logic circuit, such as a fully programmable gate array (FPGA), comprises a plurality of polysilicon thin film transistors...
6949951 Integrated circuit multiplexer including transistors of more than one oxide thickness  
A multiplexer that can be used, for example, in a programmable logic device (PLD). The multiplexer includes a plurality of pass transistors passing a selected one of several input values to an...
6943581 Test methodology for direct interconnect with multiple fan-outs  
A test cell and method of operation are disclosed. The test cell may be cascaded with other test cells to form a test structure that spans across any number of slices and/or tiles in a programmable...
6940307 Integrated circuits with reduced standby power consumption  
Integrated circuit standby power consumption may be reduced using a reverse-bias transistor control arrangement that reduces transistor leakage current. Integrated circuit transistors may be turned...
6924665 Logic device re-programmable without terminating operation  
A logic device re-programmable without terminating operation. In the logic device, a logic circuit is configured and maintained based on logic circuit configuration data for implementing a desired...
6922078 Programmable logic device with enhanced wide and deep logic capability  
A programmable logic device includes a plurality of logic blocks organized into a cluster. Each logic block may form product terms of a fixed input width. The cluster is configured to provide input...
6912601 Method of programming PLDs using a wireless link  
An apparatus comprising a wireless transceiver and a programmable logic circuit. The wireless transceiver may be coupled to the programmable logic circuit. The programmable logic circuit may...
6911840 Integrated circuit with overclocked dedicated logic circuitry  
An integrated circuit with overclocked embedded logic circuitry is described. In an example, a programmable logic device includes programmable logic blocks operable using a first clock signal...
6909417 Shift register and image display apparatus using the same  
A level shifter 13 is provided for each of SR flip flops F 1 constituting a shift register 11. The level shifter 13 increases a voltage of a clock signal CK. This arrangement reduces a...
6907595 Partial reconfiguration of a programmable logic device using an on-chip processor  
A programmable logic device, such as a field programmable gate array, is partially reconfigured using a read-modify-write scheme that is controlled by a processor. The partial reconfiguration...
6901502 Integrated circuit with CPU and FPGA for reserved instructions execution with configuration diagnosis  
A semiconductor integrated circuits can send and receive signals to and form a configuration memory. The semiconductor integrated circuits is provided therein wiht an instruction memory, an...
6897675 System and method for device sequencing using discrete PLC control  
A system and apparatus for discrete PLC control using word sequences in a data table for controlling a device on an assembly line. The data table contains sequencing information which defines, for...
6897676 Configuration enable bits for PLD configurable blocks  
A programmable logic device (PLD) includes columns of block memory interposed between columns of configurable logic blocks (CLBs). Each column of block memory includes a plurality of random access...
6897678 Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits  
A programmable logic device is provided that contains circuitry that may be used for observing logic signals from programmable logic circuits on the device for testing the operation of the device....
6898097 Floating-gate analog circuit  
In one exemplary embodiment, a programmable analog array (PAA) contains a configurable analog matrix having two floating-gate field effect transistors (FETs). Also contained in the PAA is an...
6898703 System and method for creating a boot file utilizing a boot template  
The present invention is a system and method of facilitating automatic generation of the source code in a convenient and efficient manner. In one embodiment of the present invention, a programmable...
6891397 Gigabit router on a single programmable logic device  
Apparatus for network and system on a single programmable logic device is described. The programmable logic includes port modules. The port modules have configurable logic configured to process...
6888372 Programmable logic device with soft multiplier  
A programmable logic device is provided which includes a multi-port RAM block with a first port including first address registers and first data registers and with a second port including second...
6888374 FPGA peripheral routing with symmetric edge termination at FPGA boundaries  
An FPCA includes a scheme for peripheral routing that provides symmetrical routing across its entire area including the periphery by incorporating peripheral routing lines of equal length that are...
6882176 High-performance programmable logic architecture  
A programmable logic device architecture. This programmable logic architecture includes a first logic block ( 425 ) containing programmable logic elements for performing logic functions. The...
6879202 Multi-purpose digital frequency synthesizer circuit for a programmable logic device  
A digital frequency synthesizer (DFS) circuit adds little additional delay on the clock path. True and complement versions of an input clock signal are provided to a first and second passgates,...
6874051 System carrier for freely programmable blocks  
A system carrier for freely programmable blocks that are connected to one another by buses, of a carrier body, at least three identically configured connectors disposed on the carrier body and...
6873182 Programmable logic devices having enhanced cascade functions to provide increased flexibility  
A Programmable Logic Device (PLD) incorporating a plurality of Programmable Logic Blocks (PLBs) providing enhanced flexibility for Cascade logic functions, each comprising a multi-input Look Up...
6870398 Distributed memory and logic circuits  
Systems and methods are disclosed for distributing memory within one or more regions of circuitry that perform logic functions (or other types of functions that require dense interconnect...
6867614 Multiconfiguration module for hardware platforms  
A multiconfiguration module (MCM) includes a field-programmable gate array (FPGA), a memory flash, and a complex programmable logic device (CPLD). Hardware interfaces between the concerned...
6864710 Programmable logic device  
A programmable logic device comprising one or more horizontal routing channels, one or more vertical routing channels, and a logic element. Each logic element may be configured to connect between...
6864709 Cross point switch with serializer and deserializer functions  
A programmable switch of three or more ports, each port having data lines separate from lines sharing control and addressing. The programmable switch includes internal logic control and electronic...
6864713 Multi-stage interconnect architecture for complex programmable logic devices  
Systems and methods are disclosed for providing a multi-stage interconnect architecture, such as for high density and high performance complex programmable logic devices. As an example, a first...
6861870 Dynamic cross point switch with shadow memory architecture  
The fuse points within a programmable AND array may be programmed with configuration signals to select for logical signals to form product term outputs in a logic mode. In a switch mode, a subset...
6861868 High speed interface for a programmable interconnect circuit  
A programmable semiconductor device comprising a plurality of I/O circuits arranged into blocks includes a routing structure for each block, wherein each routing structure may programmably route...
6861871 Cascaded logic block architecture for complex programmable logic devices  
Cascadable logic block architectures are disclosed for programmable logic devices, such as for high density and high performance complex programmable logic devices. The logic block architectures...
6853603 Programmable logic device having nonvolatile memory with user selectable power consumption  
A programmable logic device includes a memory with user selectable power consumption. During configuration, the memory operates at a relatively high power consumption level and quickly outputs...
6844756 Configurable dedicated logic in PLDs  
An apparatus comprising one or more logic circuits. The logic circuits may be configured to provide computation. The one or more logic circuits generally comprise dedicated logic within a...
6844757 Converting bits to vectors in a programmable logic device  
A circuit is disclosed for a programmable logic device (PLD) environment that converts unordered bits in a PLD domain to fixed-width vectors in a vector domain. The fixed-width vectors may be used...
6842041 Low-voltage non-degenerative transmitter circuit  
A CPLD employs a low-voltage, non-degenerative transmitter circuit to eliminate the need for a dedicated control pin to provide the relatively high voltage levels required to verify the program...
6842039 Configuration shift register  
An electronic device comprises a first plurality of configuration elements connected as a shift register for programming a subset of the programmable functions of the electronic device. The subset...
6842040 Differential interconnection circuits in programmable logic devices  
At least some of the interconnection signaling on a programmable logic device (“PLD”) is by differential signaling using differential driver circuitry to apply differential signals to a pair of...
6842854 METHOD PROGRAMMABLE LOGIC DEVICE, INFORMATION PROCESSING SYSTEM AND METHOD OF RECONFIGURING CIRCUIT FOR SEQUENTIALLY PROCESSING DATA IN BLOCKS AND TEMPORARILY STORING DATA PROCESSED UNTIL NEXT CONFIGURATION  
To provide a method of implementing cache logic technique in which total data processing time can be reduced, input data divided into block is sequentially processed in units of block in plural...
6839888 Method for implementing bit-swap functions in a field programmable gate array  
There is disclosed a field programmable gate array (FPGA) that performs bit swapping functions in the interconnects rather than in the configurable logic blocks of the FPGA. The FPGA comprises: 1)...
6839873 Method and apparatus for programmable logic device (PLD) built-in-self-test (BIST)  
According to one embodiment, a programmable logic assembly ( 200 ) may include a nonvolatile memory ( 202 ) may be coupled to an associated volatile programmable logic device (PLD) ( 204 )....
6838904 Enhanced CPLD macrocell module having selectable bypass of steering-based resource allocation  
Structures and techniques are provided for allowing one or more of the following actions to occur within a Complex Programmable Logic Device (CPLD): (1) Elective use of a fast, allocator-bypassing...
6831480 Programmable logic device multispeed I/O circuitry  
Programmable logic device integrated circuitry having I/O circuitry portions having different maximum speed capabilities and different amounts of programmability for supporting various I/O...