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7620924 |
Base platforms with combined ASIC and FPGA features and process of using the same
A process is disclosed for configuring a base platform having ASIC and FPGA modules to perform a plurality of functions. A verified RTL hardware description of a circuit is mapped and annotated to...
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7620758 |
System and method for fast activation and playing using a multimedia playback control module to load and execute core program
A dual-CPU computer-based multimedia system is provided, including a computer connected to a multimedia playing control module. The multimedia playing control module has a second CPU connected to...
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7612581 |
Apparatus for dynamic deployment of pin functions on a chip
An apparatus for dynamic deployment of pin functions on a chip is disclosed in the present invention. The apparatus comprises: an input pin receiving unit, capable of integrating a plurality of...
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7602212 |
Flexible high-speed serial interface architectures for programmable integrated circuit devices
An integrated circuit (e.g., a programmable integrated circuit such as a programmable microcontroller, a programmable logic device, etc.) includes high-speed serial data signal interface channels,...
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7598767 |
Multi-standard data communication interface circuitry for programmable logic devices
A programmable logic device includes a hard IP portion, which includes circuitry that is dedicated to receiving a high-speed serial data signal and performing certain basic functions related to...
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7596774 |
Hard macro with configurable side input/output terminals, for a subsystem
A hard macro device (HMD), for a subsystem (TMi) such as a data processor, comprises a processing core (C) provided with at least one time critical input terminal (CIT) adapted to feed it with time...
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7592832 |
Adjustable transistor body bias circuitry
An integrated circuit is provided that contain n-channel and p-channel metal-oxide-semiconductor transistors having body terminals. Adjustable transistor body bias circuitry is provided on the...
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7590904 |
Systems and methods for detecting a failure event in a field programmable gate array
An embodiment generally relates to a method of self-detecting an error in a field programmable gate array (FPGA). The method includes writing a signature value into a signature memory in the FPGA...
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7589651 |
Flexible signal detect for programmable logic device serial interface
A serial interface for a programmable logic device (PLD) uses an analog-to-digital converter (ADC) in place of conventional signal detect and receiver detect circuitry. A separate ADC can be used...
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7589648 |
Data decompression
In one embodiment, a data decompression circuit for a data stream having a repeated data word is provided. The data stream is compressed into a series of data frames such that the repeated data...
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7589557 |
Reversible input/output delay line for bidirectional input/output blocks
An input/output (I/O) structure includes a delay element usable for the input path, the output path, or both input and output paths in a user design. In a first mode, the delay element is included...
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7586430 |
Integrated circuit comprising a mixed signal single-wire interface and method for operating the same
The invention relates to an integrated circuit ( 1 ) which comprises a novel bidirectional mixed signal single-wire interface ( 6 ) via which the circuit receives command information from a host...
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7579863 |
Circuit and method for reducing pin count of chip
A configured setting circuit and method thereof is disclosed. The configured setting circuit includes a multi-phase clock generator, a plurality of terminals, and a decision circuit. The...
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7571413 |
Testing circuitry for programmable logic devices with selectable power supply voltages
A programmable integrated circuit has multiple power supply voltages. Power supply voltages are distributed using power supply distribution lines. The integrated circuit has programmable power...
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7570077 |
Storage elements for a configurable IC and method and apparatus for accessing data stored in the storage elements
Some embodiments provide a circuit for accessing stored data in a configurable IC that includes several configurable circuits. The IC also includes several storage circuits. Each storage circuit...
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7570076 |
Segmented programmable capacitor array for improved density and reduced leakage
A capacitor circuit and method to reduce layout area, leakage current, and to improve yield is disclosed. The circuit includes an output terminal ( 100 ), a plurality of circuit elements ( 322,...
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7567628 |
Symmetric differential slicer
A self-biasing slicer includes a self-biased differential transistor pair. As a result of the self-biasing, the slicer may receive input signals without the use of AC coupling. That is, a...
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7557610 |
Columnar floorplan
An FPGA is laid out as a plurality of repeatable tiles, wherein the tiles are disposed in columns that extend from one side of the die to another side of the die, and wherein each column includes...
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7541832 |
Low power, race free programmable logic arrays
The present invention provides a PLA architecture where the AND plane is implemented with NAND logic. The OR plane may be implemented with various logic, but in one embodiment, the OR plane is...
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7538577 |
System and method for configuring a field programmable gate array
A mechanism within an electronic system for adapting a field programmable gate array (FPGA) to a flash memory device that supports a synchronous serial peripheral interface (SPI) by coupling a...
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7536615 |
Logic analyzer systems and methods for programmable logic devices
A programmable logic device includes, in accordance with one embodiment, a plurality of logic blocks; an interconnect structure adapted to route signals among the logic blocks; and a memory for...
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7535255 |
Logic integrated circuit having dynamic substitution function, information processing apparatus using the same, and dynamic substitution method of logic integrated circuit
A logic integrated circuit reconfigures a reconfigurable circuit to a circuit having the function of a fixed circuit at the time of a fault in the fixed circuit. The fixed circuits are divided into...
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7533282 |
Logic circuit apparatus for selectively assigning a plurality of circuit data to a plurality of programmable logic circuits for minimizing total power while maintaining necessary processing performance
A logic circuit apparatus includes a plurality of programmable logic circuits, a circuit data memory, a control unit. The plurality of programmable logic circuits are each configured to have a...
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7532027 |
Deliberate destruction of integrated circuits
A method is provided for intentionally permanently disabling a target device. The target device comprises an integrated circuit having one or more electronic devices, where the target device is...
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7525340 |
Programmable logic device architecture for accommodating specialized circuitry
A programmable logic device (PLD) having one or more programmable logic regions and one or more conventional input/output regions additionally has one or more peripheral areas including specialized...
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7518400 |
Barrel shifter implemented on a configurable integrated circuit
Some embodiments provide a barrel shifter on a configurable integrated circuit (IC). The barrel shifter has a first set of tiles and a second set of tiles with configurable circuits. The barrel...
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7504858 |
Configurable integrated circuit with parallel non-neighboring offset connections
Some aspects of the present invention involve connections in a configurable IC. Some embodiments provide a configurable integrated circuit with a first array of tiles. The first array of tiles has...
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7502920 |
Hierarchical storage architecture for reconfigurable logic configurations
The present invention, generally speaking, provides a hierarchy of configuration storage. The highest level of the hierarchy is an active configuration store; the lowest level is an off-chip...
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7501854 |
True/complement generator having relaxed setup time via self-resetting circuitry
An integrated circuit includes a data node, an output node, and set logic coupling to the data node to the output node. The set logic changes a state of the output node in response to a change in...
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7498839 |
Low power zones for programmable logic devices
An integrated circuit device such as a PLD is divided into a plurality of logic blocks, each including one or more resources of the device. The device includes a plurality of switch elements and a...
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7492188 |
Interconnection and input/output resources for programmable logic integrated circuit devices
A programmable logic integrated circuit device has a plurality of regions of programmable logic disposed on the device in a plurality of intersecting rows and columns of such regions....
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7489181 |
Circuit which can be programmed using a resistor and which has a reference current source
A circuit configured to be programmed using a resistor includes an output terminal, a reference voltage source, a first circuit, and a current mirror arrangement. The output terminal is configured...
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7489164 |
Multi-port memory devices
A semiconductor storage device, comprising: a first port to write data to a storage element; and a second port to read a signal generated by the storage element, wherein reading the generated...
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7475315 |
Configurable built in self test circuitry for testing memory arrays
Integrated circuits such as programmable logic device integrated circuits are provided that have memory arrays. The memory arrays can be tested using configurable built in self test circuitry. The...
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7474119 |
Logic circuit apparatus and timeshare operating method of a programmable logic circuit
A logic circuit apparatus that allocates process capability to unit circuits operated in a time divisional manner, including a circuit arrangement information memory which stores circuit...
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7471103 |
Method for implementing complex logic within a memory array
A logic gate is described that implements complex logic within a memory array. The logic gate receives at least three of a first storage cell signal, a second storage cell signal, a first external...
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7454556 |
Method to program non-JTAG attached devices or memories using a PLD and its associated JTAG interface
A method is provided to program a memory device through a JTAG interface of an attached component with programmable logic, wherein the memory device does not have a JTAG interface. Initially,...
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7453286 |
Comparator and method of implementing a comparator in a device having programmable logic
A method of implementing a comparator in a device having programmable logic is described. The method comprises implementing a first comparison function in a first lookup table; implementing a...
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7451426 |
Application specific configurable logic IP
An application specific configurable logic IP module includes (1) a system level configuration controller; (2) at least one standardized interconnect communicatively coupled to the system level...
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7451425 |
Determining controlling pins for a tile module of a programmable logic device
A processor-implemented method is provided for determining controlling pins of a programmable logic device (PLD) design. A netlist that describes the PLD design and an identification of a tile...
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7444276 |
Hardware acceleration system for logic simulation using shift register as local cache
A logic simulation processor stores in a shift register intermediate values generated during the logic simulation. The simulation processor includes multiple processor units and an interconnect...
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7439774 |
Multiplexing circuit for decreasing output delay time of output signal
Disclosed herein is a multiplexing circuit for decreasing the output delay time of an output signal. The multiplexing circuit includes multiplexing units and a multiplexing output unit. Each...
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7436218 |
Magnetic AND/NOR circuit
A magnetic AND/NOR circuit has a first, a second, a third, and a fourth magnetic transistor. These four magnetic transistors as ordinary transistors that can be turned on or turned off by the...
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7436208 |
Carry circuit with power-save mode
A carry circuit having a power-save mode and a method for reducing power consumption of an integrated circuit are described. A power-save input is selected for control select signaling. A voltage...
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7436207 |
Integrated circuit device having at least one of a plurality of bond pads with a selectable plurality of input-output functionalities
An integrated circuit device having at least one bond pad is coupled to a selectable plurality of input-output functionalities, e.g., an oscillator input, an analog input, an analog output, a...
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7432732 |
Integrated circuit device including interface circuit and electronic apparatus
An integrated circuit device, includes: an input pad region including a differential signal input region receiving a pair of differential signals, a first power supply input region and a second...
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7420389 |
Clock distribution in a configurable IC
Some embodiments of the invention provide a reconfigurable IC that has several reconfigurable circuits. Each reconfigurable circuit for configurably performing a set of operations and for...
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7417462 |
Variable external interface circuitry on programmable logic device integrated circuits
A programmable logic device (“PLD”) includes circuitry for optionally and variably modifying characteristics of an input signal in any of several respects. Examples of such modifications...
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7414429 |
Integration of high-speed serial interface circuitry into programmable logic device architectures
The architecture of a programmable logic device (“PLD”) is modified in one or more of several respects to facilitate inclusion of high-speed serial interface (“HSSI”) circuitry in the PLD....
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7414427 |
Integrated multi-function analog circuit including voltage, current, and temperature monitor and gate-driver circuit blocks
An integrated multi-function analog circuit includes at least one MOSFET gate-drive circuit coupled to a first I/O pad. At least one voltage-sensing circuit is coupled to a second I/O pad. At least...
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