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7619439 |
Semiconductor device
When a plurality of output buffer circuits are provided, chip layout size, power consumption, and number of pins of an LSI circuit are reduced. A voltage generation circuit generates reference...
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7616926 |
Conductive DC biasing for capacitively coupled on-chip drivers
An integrated circuit containing a communication channel is described. This communication channel includes: a transmit circuit configured to transmit signals; a link coupled to an output of the...
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7612631 |
Motherboard
A motherboard includes a signal control chip, a signal switch chip connected to the signal control chip via a plurality of first transmission lines, and a complex connector configured for...
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7612584 |
Simultaneous LVDS I/O signaling method and apparatus
First and second devices may simultaneously communicate bidirectionally with each other using only a single pair of LVDS signal paths. Each device includes an input circuit and a differential...
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7612580 |
Reduced power output buffer
A clock driving circuit and a method of driving a plurality of output lines for a PC architecture are disclosed. The clock driving circuit includes a clock generating circuit coupled to an output...
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7612579 |
Output circuit of semiconductor device and semiconductor device including thereof
An output circuit includes a counter circuit that generates an ODT control signal ODTa, plural driver circuits having the ODT function, a synchronizing circuit that synchronizes a signal...
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7612578 |
Semiconductor device, test system and method of testing on die termination circuit
A semiconductor device, a test system and a method of testing an on die termination (ODT) circuit are disclosed. The semiconductor device includes an ODT circuit, a termination impedance control...
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7605602 |
Low-power output driver buffer circuit
In one embodiment, an output driver buffer circuit for a logic device includes an output driver transistor adapted to adjust an output voltage of an output pad; a capacitor adapted to be connected...
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7602209 |
Controlling memory devices that have on-die termination
A memory controller for controlling integrated circuit memory devices that have on-die termination. The memory controller includes an output driver to output a first data signal onto a data line,...
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7602208 |
On die termination device that can control terminal resistance
An on die termination controls a terminal resistance value in accordance with a test signal. The one die termination device comprises an on die termination control unit and an on die termination...
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7596699 |
Battery authentication system
An authentication process for authenticating a battery to a cellular telephone includes the step of receiving a challenge from the cellular telephone at the battery over a single wire conductor. In...
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7595657 |
Dynamic dual control on-die termination
Controlling on-die termination on a bi-directional single-ended data bus carrying data between a controller and a memory device. The controller and the memory device respectively include input...
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7595656 |
Interface circuit and semiconductor integrated circuit
An interface circuit includes a driver circuit ( 12 ) made up of a combination of a plurality of transistors, a calibration circuit ( 14 ) for performing selection of on and off of one or more of...
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7593824 |
System and method for automation of hardware signal characterization and signal integrity verification
A PCB comprising two or more components, such as ICs, comprises drivers and receivers that facilitate communication of signals between the components. Signal terminations, such as series and AC...
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7589554 |
I/O interface circuit of intergrated circuit
A plurality of transistor pairs of Pch and Nch transistors are connected in series between VDD and GND. An I/O terminal is connected to each connection point of the transistor pairs. Two transistor...
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7586325 |
Integrated circuit having independent voltage and process/temperature control
In one embodiment, an integrated circuit has configurable application circuitry that operates at any one of multiple available power supply voltages. PT-control circuitry, operating at a PT...
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7583130 |
Input biasing system for bracketing a floating power supply about an input signal
An input biasing system for accommodating a floating power supply to the range of an input signal includes input terminals for receiving a input signal and a biasing circuit including a first...
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7579862 |
MOS linear region impedance curvature correction
A system and method to correct or cancel MOS linear region impedance curvature employing an analog solution to trim out the MOS linear region impedance curvature while accommodating PVT spreads in...
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7579861 |
Impedance-controlled pseudo-open drain output driver circuit and method for driving the same
An impedance-controlled pseudo-open drain output driver circuit includes: a process, voltage, and temperature (PVT) detector configured to have a delay line receiving a reference clock and detect a...
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7576560 |
Apparatus for measuring on-die termination (ODT) resistance and semiconductor memory device having the same
An apparatus for measuring an on-die termination (ODT) resistance includes an ODT controller and a driver. The ODT controller receives a plurality of decoding signals, a first test mode signal, and...
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7576559 |
USB device and data processing system having the same
A universal serial bus (USB) device is comprised of a receiver for receiving signals from a USB host through data lines, and a pull-up resistor circuit connecting pull-up resistors to data lines in...
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7573298 |
Signal transmission circuit, data transfer control device and electronic device
A signal transmission circuit transmitting signals via first and second signal lines that provide a differential pair, includes: a current source installed between a first power source and a given...
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7573289 |
Impedance matching circuit and semiconductor memory device with the same
An impedance matching circuit includes a code generating unit for generating a calibration code in response to a reference voltage and a voltage on a node, a calibration resistance unit for...
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7573288 |
Dynamically adjusting operation of a circuit within a semiconductor device
Systems and methods for dynamically adjusting operation of a circuit within a semiconductor device are described herein. At least some illustrative embodiments include a system that includes a...
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7567093 |
Semiconductor memory device with on-die termination circuit
A semiconductor memory device is able to inactivate an on-die termination circuit without an additional pin. The semiconductor memory device includes a control signal generator, a resistance...
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7564258 |
Calibration methods and circuits to calibrate drive current and termination impedance
Described are on-die termination (ODT) systems and methods that facilitate high-speed communication between a driver die and a receiver die interconnected via one or more signal transmission lines....
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7557603 |
Method and apparatus for output driver calibration, and memory devices and system embodying same
A method, system, and output driver calibration circuit determine calibration values for configuring adjustable impedance output drivers. The calibration circuit includes a pull-up calibration...
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7557602 |
Pre-emphasis circuit including slew rate controllable buffer
A pre-emphasis circuit capable of controlling the slew rate of a signal output from a buffer that transfers the output signal to an output driver to increase the range of a controllable voltage...
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7554354 |
Apparatus for controlling on-die termination of semiconductor memory and methods of controlling the same
An apparatus for controlling on-die termination of a semiconductor memory includes a detector that generates an ODT control signal for inactivating an on-die termination operation in one of a data...
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7554353 |
Method of controlling on-die termination of memory devices sharing signal lines
A method of controlling On-Die Termination (ODT) resistors of memory devices sharing signal lines is provided. The ODT controlling method comprises setting an ODT control enable signal of each of...
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7550993 |
Glitch reduced compensated circuits and methods for using such
Various embodiments of the present invention provide systems and methods for glitch reduced circuits. As one example, a glitch reduced, variable width driver circuit is disclosed. Such circuits...
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7548087 |
Impedance adjusting circuit and impedance adjusting method
An impedance adjusting circuit for adjusting an impedance of an output buffer of a DDR2 memory, using an OCD impedance adjusting function, from a side of a memory controller, includes first and...
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7548086 |
Impedance control circuit in semiconductor device and impedance control method
An impedance control circuit includes an impedance detector, an output driver and an impedance controller. The impedance detector generates a first output value to a detection pad connected between...
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7545164 |
Output driver for controlling impedance and intensity of pre-emphasis driver using mode register set
An output driver controls impedance using a mode register set. The output driver includes a main driving circuit that outputs and drives a main signal based on a data signal to a predetermined...
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7541830 |
Device for a line termination of two-wire lines
A device for a line termination of two-wire lines having at least one first and second terminating resistant between the two wires is provided, the first and the second terminating resistors being...
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7538589 |
Cable driver using signal detect to control input stage offset
A system, apparatus and method are arranged for monitoring an input signal for a line driver and determining if a valid data signal is present. When the input signal is determined to be an invalid...
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7538573 |
Dynamic output buffer circuit
A dynamic output buffer circuit performs an impedance matching function and a pre-emphasis function by using input and output signals, and consumes relatively less power, occupies a relatively...
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7538572 |
Off-chip driver apparatus, systems, and methods
Apparatus, methods, and systems include an off-chip driver having an output drive coupled in parallel with the off-chip driver to provide initial drive emphasis for a period of time. The output...
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7535251 |
Semiconductor device and impedance adjusting method thereof
There is provided a semiconductor device including an output buffer circuit which reduces an area occupied by a circuit for impedance adjustment and allows high-speed impedance adjustment. In an...
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7535250 |
Output impedance calibration circuit with multiple output driver models
A method and circuitry for calibration of the output impedance of output driver circuits in an integrated circuit is disclosed. The output drivers within an area on the integrated circuit are...
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7532523 |
Memory chip with settable termination resistance circuit
Methods and apparatus for setting various terminations of a memory chip. The memory chip includes a terminal, a termination circuit that can be connected to the terminal in order to terminate the...
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7532028 |
Impedance matching circuit and related method thereof
The invention relates to an impedance matching circuit including: an input terminal for receiving an input signal; a variable impedance unit, coupled to the input terminal, having an equivalent...
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7532013 |
Semiconductor integrated circuit and measuring method of terminator resistor in the semiconductor integrated circuit
A semiconductor integrated circuit for receiving a signal having been propagated through a transmission line, has a control circuit that controls on/off of a first to fourth switching circuits,...
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7528626 |
Semiconductor memory device with ZQ calibration circuit
An impedance adjusting circuit of semiconductor memory devices is able to adjusting its termination resistance stably. The semiconductor memory device includes a reference range supplying unit for...
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7528625 |
Image forming apparatus
An output device is disclosed that includes an impedance matching section including an impedance adjustment section, and a dummy circuit section having the same configuration as the impedance...
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7525339 |
Semiconductor memory device testing on/off state of on-die-termination circuit during data read mode, and test method of the state of on-die-termination circuit
A semiconductor memory device for testing whether an ODT circuit is on or off during a data read mode includes an on-die termination (ODT) circuit and an ODT state information output unit. The ODT...
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7525338 |
Calibration methods and circuits for optimized on-die termination
Described are on-die termination (ODT) systems and methods that facilitate high-speed communication between a driver die and a receiver die interconnected via one or more signal transmission lines....
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7525337 |
On-die termination circuit and method for semiconductor memory apparatus
An on-die termination circuit for semiconductor memory apparatus includes an ODT (On Die Termination) input driving unit that divides an input voltage on the basis of a resistance ratio according...
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7521957 |
Impedance controller for semiconductor device
An impedance controller includes multiple determination units for determining which of multiple candidate codes results in a best impedance match for an I/O pad of a semiconductor device. In...
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7519130 |
Front end interface for data receiver
A data receiver is provided which includes a front end interface circuit having an alternating current (AC) transmission receiving mode and a direct current (DC) transmission receiving mode. The...
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