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7622958 |
Semiconductor device including current-driven differential driver and method of controlling current-driven differential driver
A semiconductor device includes a current-driven differential driver and a control circuit. The current-driven differential driver is configured to generate a pair of signals having levels relative...
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7612580 |
Reduced power output buffer
A clock driving circuit and a method of driving a plurality of output lines for a PC architecture are disclosed. The clock driving circuit includes a clock generating circuit coupled to an output...
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7609084 |
Output level stabilization circuit and CML circuit using the same
An output level stabilization circuit being an output level stabilization circuit for a CML circuit, the output level stabilization circuit includes: a replica circuit constituted of transistors...
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7605608 |
Circuit for converting a voltage range of a logic signal
In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a first metal oxide semiconductor (MOS) transistor selectively couples an output...
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7605602 |
Low-power output driver buffer circuit
In one embodiment, an output driver buffer circuit for a logic device includes an output driver transistor adapted to adjust an output voltage of an output pad; a capacitor adapted to be connected...
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7598772 |
Signal driver having selectable aggregate slew rate to compensate for varying process, voltage or temperature conditions
A signal driver having a selectable aggregate slew rate, a method of driving a signal driver and a signal driver incorporating the driver or the method. The driver includes plural partial drivers...
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7595664 |
Repeater circuit having different operating and reset voltage ranges, and methods thereof
A circuit for assisting signal transitions on a wire, and a method thereof. A first subcircuit causes a first transistor that is coupled to the circuit's output to turn on during a rising...
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7595656 |
Interface circuit and semiconductor integrated circuit
An interface circuit includes a driver circuit ( 12 ) made up of a combination of a plurality of transistors, a calibration circuit ( 14 ) for performing selection of on and off of one or more of...
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7592839 |
Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability
Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability, is provided and described. In one embodiment,...
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7586331 |
Self-adaptive output buffer based on charge sharing
A self-adaptive output buffer for an output terminal of an electronic circuit suitable to be connected to a load is proposed. The self-adaptive output buffer includes means for sensing an...
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7579861 |
Impedance-controlled pseudo-open drain output driver circuit and method for driving the same
An impedance-controlled pseudo-open drain output driver circuit includes: a process, voltage, and temperature (PVT) detector configured to have a delay line receiving a reference clock and detect a...
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7573290 |
Data output driver for reducing noise
A data input/output driver for use in a semiconductor memory device includes a data transmitting block for transmitting a data between an inside and an outside of the semiconductor memory device...
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7567093 |
Semiconductor memory device with on-die termination circuit
A semiconductor memory device is able to inactivate an on-die termination circuit without an additional pin. The semiconductor memory device includes a control signal generator, a resistance...
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7564258 |
Calibration methods and circuits to calibrate drive current and termination impedance
Described are on-die termination (ODT) systems and methods that facilitate high-speed communication between a driver die and a receiver die interconnected via one or more signal transmission lines....
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7548088 |
Systems and methods for current management for digital logic devices
Systems and methods for current management for digital logic devices are provided. In one embodiment, a method of current management for a digital logic circuit comprises drawing power to drive a...
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7545164 |
Output driver for controlling impedance and intensity of pre-emphasis driver using mode register set
An output driver controls impedance using a mode register set. The output driver includes a main driving circuit that outputs and drives a main signal based on a data signal to a predetermined...
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7541839 |
Semiconductor device having a pseudo power supply wiring
A semiconductor device including an AND-NOR composite gate of which AND unit is supplied with input signals IN and VDD and NOR unit is supplied with an inverted signal EB of an enable signal E, and...
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7538572 |
Off-chip driver apparatus, systems, and methods
Apparatus, methods, and systems include an off-chip driver having an output drive coupled in parallel with the off-chip driver to provide initial drive emphasis for a period of time. The output...
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7525338 |
Calibration methods and circuits for optimized on-die termination
Described are on-die termination (ODT) systems and methods that facilitate high-speed communication between a driver die and a receiver die interconnected via one or more signal transmission lines....
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7521982 |
Drive circuit for driving power device
A drive circuit for driving a power device has a level shift circuit which level-shifts an ON signal and an OFF signal for controlling the power device in ON and OFF states, respectively, and which...
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7518395 |
IO driver with slew rate boost circuit
An IO driver utilizes a slew rate boost circuit coupled to an IO driver circuit to improve the slew rate of the driver during transitions on the output of the driver. One or more additional output...
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7514963 |
Semiconductor integrated circuit device
When the operation frequency is high, in order to cause the rate of change of outputs from an output terminal (OUT) to be abrupt, a selection control signal is caused to be in a low state, thereby...
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7514953 |
Adjustable transistor body bias generation circuitry with latch-up prevention
An integrated circuit is provided with body bias generation circuitry. The body bias generation circuitry generates a body bias signal that is provided to transistors on a body bias path. The body...
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7511529 |
Reduced area active above-ground and below-supply noise suppression circuits
A method and apparatus for noise suppression. A circuit has a noise detection unit, a noise suppression unit, and a control unit. The noise suppression unit has an input and an output, wherein the...
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7511528 |
Device and method to eliminate step response power supply perturbation
A system and method for eliminating step response power supply perturbation during voltage island power-up/power-down on an integrated circuit is disclosed. An IC chip communicates with a primary...
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7508235 |
Differential line termination technique
A technique for terminating a differential signal line substantially matches the output impedances of a first node and a second node of a differential node. The power dissipation is substantially...
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7495469 |
On-die termination circuit and driving method thereof
An on-die termination circuit is capable of increasing a resolution without enlargement of a chip or a layout size. The on-die termination circuit includes a control means, a termination resistance...
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7495467 |
Temperature-independent, linear on-chip termination resistance
In one embodiment of the invention, an integrated circuit, such as an FPGA, has one or more programmable termination schemes, each having a plurality of resistive termination legs connected in...
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7495466 |
Triple latch flip flop system and method
A triple latch flip flop system and method are disclosed. In one embodiment, triple latch flip-flop system includes a pull up latch, a pull down latch, a primary latch and an output. The pull up...
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7486116 |
Driver device, in particular for a semiconductor device, and method for operating a driver device
The invention relates to a driver device and a method for operating a driver device in particular for a semiconductor device. The driver device includes a signal driver connected to a supply...
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7477081 |
Pre-driver circuit and data output circuit using the same
Provided is a pre-driver circuit having a pull-up unit for receiving a data signal, as an input, to output a logical High; a pull-down unit for receiving the data signal, as an input, to output a...
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7477068 |
System for reducing cross-talk induced source synchronous bus clock jitter
A first clock signal of frequency F is used to couple data to an off-chip driver (OCD) using a master/slave flip flop (FF), wherein the master latch is clocked with the first clock signal and the...
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7463051 |
Output buffer
An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first...
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7459930 |
Digital calibration circuits, devices and systems including same, and methods of operation
A calibration circuit for matching the output impedance of a driver by calibrating adjustments to the driver is described. The calibration circuit includes a driver circuit with a plurality of...
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7456649 |
Open drain output circuit
An open drain output circuit for use as an I 2 C bus interface. The open drain output circuit includes an output terminal. An input unit performs a first operation causing the potential at the...
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7450437 |
Pseudo differential output buffer, memory chip and memory system
An output buffer includes first and second input transistors, first and second output loads and a current source. The first and second input transistors have first current electrodes that are...
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7449913 |
Pre-driver having slew-rate and crowbar-current controls for a CMOS output buffer
An output buffer having slew-rate control and crossbar current control includes a pull-up PMOS transistor, a pull-down NMOS transistor, a pull-up network coupled to the gate of the pull-up PMOS...
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7446567 |
Signal transmission apparatus and interconnection structure
Apparatus for transmitting a digital signal within, for example, an integrated circuit includes a signal transmission line with a directional coupler at one or both ends. The directional coupler...
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7439759 |
Operating long on-chip buses
As technology scales, on-chip interconnects are becoming narrower, and the height of such interconnects is not scaling linearly with the width. This leads to an increase of coupling capacitance...
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7436201 |
Architecture for reducing leakage component in semiconductor devices
An architecture for reducing leakage component in semiconductor devices using a gated power supply is based on the supply being split into two parts. An alternate inverter is connected to a...
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7432730 |
Time based driver output transition (slew) rate compensation
Apparatus and method for controlling the driver output slew rate. The apparatus includes a driver circuit having an input signal and an output signal, where the driver circuit is structured and...
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7429878 |
Apparatus for controlling drive current in semiconductor integrated circuit devices
A circuit device for variously controlling a current drive capacity of a semiconductor IC device as required by the user. A circuit device, capable of preventing a semiconductor IC device from...
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7423454 |
High speed signaling system with adaptive transmit pre-emphasis
A high-speed signaling system with adaptive transmit pre-emphasis. A transmit circuit has a plurality of output drivers to output a first signal onto a signal path. A receive circuit is coupled to...
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7417458 |
Gate driving circuit and display apparatus having the same
In a gate driving circuit and a display apparatus having the same, a ripple preventing part is connected to a pull-up part and a control terminal (Q-node) to reset the Q-node. The ripple preventing...
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7417451 |
Leakage power management with NDR isolation devices
A method and system for minimizing sub-threshold leakage in a logic block is disclosed. An NDR isolation device is coupled between the logic block and ground to form a virtual ground node. To put...
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7411414 |
Single-ended output driver buffer
Circuits and related methods are provided for buffering reference voltages from noise associated with output driver transistors. In one example, an output driver buffer circuit includes an output...
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7408377 |
Driving circuit of an output buffer stage having a high speed and a reduced noise induced on power supply
A driving circuit is for an output buffer stage, with high speed and reduced noise induced on the power supply. The driving circuit may include first and second circuit portions, each intended for...
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7394290 |
Semiconductor integrated circuit
A semiconductor integrated circuit with low power consumption is provided. In one embodiment, the semiconductor integrated circuit includes a logic circuit portion that is connected between a first...
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7382151 |
Method for reducing cross-talk induced source synchronous bus clock jitter
A first clock signal of frequency F is used to couple data to an off-chip driver (OCD) using a master/slave flip flop (FF), wherein the master latch is clocked with the first clock signal and the...
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7378878 |
Driver circuit having programmable slew rate
The programmable slew rate driver uses separate and programmably selectable resistors for time constants for on and off transitions on the NMOS and PMOS output transistors. By proper setting of...
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