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8183887 High speed signaling system with adaptive transmit pre-emphasis  
A high-speed signaling system with adaptive transmit pre-emphasis. A transmit circuit has a plurality of output drivers to output a first signal onto a signal path. A receive circuit is coupled to...
8154318 Signal transceiver apparatus and system  
A signal transceiver apparatus suitable for a wired signal transceiver system includes a differential signal transmitter, an impendence matching control module and a signal receiver. The signal...
8149013 High speed integrated circuit  
A novel driver circuit that uses a differential driver as a design backbone is described. Unlike a conventional differential interface, which typically has two or more outputs for providing an...
8143912 Impedance adjustment circuit for adjusting terminal resistance and related method  
An impedance adjustment circuit for adjusting a terminal resistance includes a resistance evaluation unit and a terminal resistor unit. The resistance evaluation unit is utilized for evaluating a...
8138785 Reduced power output buffer  
A clock driving circuit and a method of driving a plurality of output lines for a PC architecture are disclosed. The clock driving circuit includes a clock generating circuit coupled to an output...
8120381 Impedance adjusting device  
An impedance adjusting device includes a calibration unit configured to generate an impedance code for adjusting a termination impedance value, a plurality of termination units configured to be...
8115508 Structure for time based driver output transition (slew) rate compensation  
A design structure and more particularly to a design structure to minimize driver output slew rate variation. The design structure is embodied in a machine readable medium for designing,...
8115509 Semiconductor integrated circuit for reducing crosstalk  
A chip is provided with a specific signal wire and two adjacent signal wires. Output signals based on a specific signal and two adjacent signals are transmitted to the specific signal wire and the...
8035417 Output buffer circuit with variable drive strength  
An output buffer circuit has a variable output drive strength, depending on a buffer enable signal. Multiple output buffer circuits have a variable combined output drive strength, depending on a...
8030960 Converting dynamic repeaters to conventional repeaters  
A method for converting a repeater circuit from a dynamic repeater circuit to a static repeater circuit. The method includes disconnecting a feedback path coupled to a first stage of the dynamic...
8022731 Advanced repeater with duty cycle adjustment  
An advanced repeater with duty cycle adjustment. In accordance with a first embodiment of the present invention, an advanced repeater includes an output stage for driving an output signal line...
8018245 Semiconductor device  
A semiconductor device is provided. A pull-up slew rate controller receives a first driving control signal generated in a first mode of operation, a second driving control signal generated in a...
8018252 Circuit with enhanced mode and normal mode  
Circuit with enhanced mode and normal mode is provided and described. In one embodiment, switches are set to a first switch position to operate the circuit in the enhanced mode. In another...
8018246 Semiconductor device  
A device includes a first circuit and an adjustment circuit. The adjustment circuit performs an adjustment on impedance of the first circuit. The adjustment circuit discontinues the adjustment on...
8004312 Fail safe I/O driver with pad feedback slew rate control  
Disclosed are a method, system and apparatus for an improved fail safe I/O driver with pad feedback slew rate control are disclosed. In one embodiment, a pad driver circuit includes a pad node, an...
7994825 Serial output circuit, semiconductor device, and serial transmission method  
In an output circuit having a de-emphasis for use in high-speed serial transmission, a circuit for suppressing a fluctuation of a common mode potential which occurs in output amplitude is provided....
7986162 Interface circuit  
An interface of the present invention includes a first inverter circuit that inverts a logic level of an input signal given to an external input terminal and outputs the inverted logic level, a...
7982493 Semiconductor integrated circuit for controlling output driving force  
A semiconductor integrated circuit includes a pre driver unit configured to receive a pre drive signal and a driving force control signal and output a main drive signal; a main driver unit...
7982490 Semiconductor integrated circuit  
Provided is a semiconductor integrated circuit including: an output circuit connected between a power supply (VDD0) and a ground (GND0), having an input connected to an input terminal, and having...
7982499 Capacitive node isolation for electrostatic discharge circuit  
Capacitive node isolation circuitry in an integrated circuit eliminates the creation of hot spots (stored charge) on high capacitive nodes during a test of electrostatic discharge (ESD) protection...
7977975 Apparatus for using metastability-hardened storage circuits in logic devices and associated methods  
An integrated circuit (IC) includes a set of metastability-hardened storage circuits. Each metastability-hardened storage circuit may include: (a) a pulse width distortion circuit; (b) a first...
7961001 Impedance adjusting device  
An impedance adjusting device includes: a calibration node; a comparison unit configured to compare a reference voltage with a voltage of the calibration node; a counting unit configured to...
7956644 Peak power reduction using fixed bit inversion  
A semiconductor device includes a first circuit block, a second circuit block, and a data bus. The data bus is coupled between the first and second circuit blocks. A first data inverter on the data...
7952381 Semiconductor device  
A semiconductor device includes: a driver that receives a power supply voltage and drives an external load with a driving capability; a measurement unit that measures a level of the power supply...
7949988 Layout circuit having a combined tie cell  
A layout circuit is provided, comprising standard cells, a spare cell, combined tie cells and normal filler cells. The standard cells are disposed and routed on a layout area. The spare cell is...
7944233 Data output circuit  
A data output circuit includes a plurality of drivers configured to be turned on/off according to impedance codes to output data to an output node. The impedance codes are divided into a first...
7945868 Tunable integrated circuit design for nano-scale technologies  
The invention discloses a method for tuning nano-scale analog-circuit designs in order to reduce random-device mismatches and optimize said design, where nano-scale devices potentially have...
7940076 Local interconnect network transceiver driver  
Various driver circuit apparatuses and methods for driving an electrical signal are disclosed herein. For example, some embodiments provide a driver circuit including a controlled-slew rate input...
7928757 Calibration methods and circuits to calibrate drive current and termination impedance  
Described are on-die termination (ODT) systems and methods that facilitate high-speed communication between a driver die and a receiver die interconnected via one or more signal transmission lines....
7928756 Method and system for reducing I/O noise and power  
In an I/O circuit, noise reduction and power savings are achieved by providing feedback from the output of the I/O driver to control the current through the pre-driver and thereby the current...
7915911 Input circuit and semiconductor integrated circuit  
An input circuit for receiving an input signal supplied to an input terminal includes a capacitor having one end connected to the input terminal and a capacitor driving circuit for converting the...
7906985 Semiconductor device  
A semiconductor device includes a plurality of data driving units, each configured to drive a corresponding data output pad by a power supply voltage supplied through a power supply voltage input...
7902875 Output slew rate control  
This document discusses, among other things, output slew rate control. Methods and structures are described to provide slew rate control of an output driver circuit such as a DRAM output driver on...
7872492 Triple latch flip flop system and method  
A triple latch flip flop system and method are disclosed. In one embodiment, triple latch flip-flop system includes a pull up latch, a pull down latch, a primary latch and an output. The pull up...
7872491 Noise filter circuit, dead time circuit, delay circuit, noise filter method, dead time method, delay method, thermal head driver, and electronic instrument  
A noise filter circuit includes a first inverter circuit that receives a signal based on an input signal, a second inverter circuit that receives a signal based on the input signal, and a latch...
7868657 High voltage logic circuits  
High voltage logic circuits that can handle digital input and output signals having a larger voltage range are described. In an exemplary design, a high voltage logic circuit includes an input...
7859295 Transmitter apparatus, systems, and methods  
Apparatus, systems, and methods are disclosed that operate to drive an output with a data signal and to boost a potential of the output in response to a boost signal. Additional apparatus, systems,...
7859305 Input/output circuit  
An input/output circuit, operable in an input mode and an output mode, for receiving data and an enable signal, the input/output circuit including an input/output terminal; a pull-up output...
7852110 Controlling the slew-rate of an output buffer  
An output buffer provided according to an aspect of the present invention is designed to generate an output signal with a slew rate that is substantially independent of the threshold voltage of...
7852781 Managing communications settings  
Communications settings are managed. System characteristics are determined that affect communications on a high speed transmission link between nodes. The system characteristics includes system...
7847584 On-die termination circuit and driving method thereof  
An on-die termination circuit is capable of increasing a resolution without enlargement of a chip or a layout size. The on-die termination circuit includes a control means, a termination resistance...
7843212 Differential circuit with precisely controlled terminator circuit  
The present invention provides a precisely controlled terminator circuit of a differential amplifier, in particular, for a differential amplifier of an optical receiver. The differential circuit,...
7830174 Input/output circuit  
An input/output circuit operable in input and output modes and including an input/output terminal, pull-up and pull-down output transistors, and first and second logic circuits operated in...
7830167 Pre-emphasis circuit  
A pre-emphasis circuit which can improve a communication quality of a data transmission at low cost is provided. A current switch circuit, a current adder circuit, and transition detection circuits...
7825693 Reduced duty cycle distortion using controlled body device  
A semiconductor chip comprising a reference circuit and a target circuit. The reference circuit comprises a first P-channel field effect transistor (PFET) and a first N-channel field effect...
7821289 Data output driving circuit and method for controlling slew rate thereof  
A data output driving circuit capable of optimizing a slew rate of data according to the variation of operational conditions and a method for controlling a slew rate thereof includes a slew rate...
7808268 Time based driver output transition (slew) rate compensation  
Apparatus controlling the driver output slew rate that includes a driver circuit having an input signal and an output signal, where the driver circuit is structured and arranged to facilitate...
7804329 Internal charge transfer for circuits  
The present invention enables fast transition between sleep and normal modes for circuits such as digital circuits. This invention utilizes chip internal charge transfer operations to put the...
7804322 Output buffer  
An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first...
7800399 Virtual regulator for controlling a termination voltage in a termination circuit  
According to one exemplary embodiment, a termination circuit includes a number of drivers configured to receive source data on an input bus and to drive an output bus including a number of output...
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