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7622955 |
Power savings with a level-shifting boundary isolation flip-flop (LSIFF) and a clock controlled data retention scheme
An apparatus for providing active mode power reduction for circuits having data retention includes a master slave flip flop (MSFF) for latching a data input. An output level shifter (OLS), coupled...
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7622945 |
Mix mode driver for traces of different lengths
A method for a mix mode driver to accommodate traces of different lengths includes sequentially shifting values of a data signal to a number of stages and sequentially amplifying the values of the...
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7616926 |
Conductive DC biasing for capacitively coupled on-chip drivers
An integrated circuit containing a communication channel is described. This communication channel includes: a transmit circuit configured to transmit signals; a link coupled to an output of the...
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7612578 |
Semiconductor device, test system and method of testing on die termination circuit
A semiconductor device, a test system and a method of testing an on die termination (ODT) circuit are disclosed. The semiconductor device includes an ODT circuit, a termination impedance control...
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7609091 |
Link transmitter with reduced power consumption
With some transmitter embodiments disclosed herein, static power consumption in low power modes may be reduced without excessively increasing latency.
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7605601 |
Semiconductor integrated circuit device
A semiconductor integrated circuit device, has a semiconductor substrate; and a first transistor of a first conductivity type and a second transistor of the first conductivity type, the transistors...
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7602169 |
Input cancellation circuit
A system and method are provided for isolating an input without adding significant distortion and without significantly adversely affecting the bandwidth of input circuits. In one embodiment, a...
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7592837 |
Low leakage and data retention circuitry
An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a...
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7590392 |
Transmitter compensation
In some embodiments, a chip with a transmitter having a transmitter driver is provided. Also provided is a general compensation circuit coupled to the transmitter to generally compensate the...
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7579867 |
Restructuring data from a trace buffer of a configurable IC
Some embodiments provide a method that outputs from a configurable IC a first set of data bits from a trace buffer. Each bit of the first set of data bits is simultaneously generated in the...
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7576619 |
Integrated circuit arrangement
An integrated circuit arrangement is disclosed. In one embodiment, the integrated circuit arrangement includes an output circuit having at least one first output connection which can provide a data...
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7573290 |
Data output driver for reducing noise
A data input/output driver for use in a semiconductor memory device includes a data transmitting block for transmitting a data between an inside and an outside of the semiconductor memory device...
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7560957 |
High-speed CML circuit design
A current mode logic digital circuit is provided comprising a logic circuit component having at least one data input node and at least one output node. A load is coupled between a power supply node...
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7560956 |
Method and apparatus for selecting an operating mode based on a determination of the availability of internal clock signals
A system and method to operate an electronic device, such as a memory chip, with an output driver circuit that is configured to include an ODT (On-Die Termination) mode detector detects whether...
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7557601 |
Memory module and method having improved signal routing topology
A registered memory module includes several memory devices coupled to a register through a plurality of transmission lines forming a symmetrical tree topology. The tree includes several branches...
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7538582 |
Driver circuit, test apparatus and adjusting method
A test apparatus for testing a device under test is provided. The test apparatus includes a test signal generating section for generating a test signal to be provided to the device under test, a...
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7535261 |
Logic circuit
A first current source generating a current I 0 +I when a control signal is in ‘H’ level and a current I 0 when it is in ‘L’ level, a current mirror circuit transferring a current...
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7535251 |
Semiconductor device and impedance adjusting method thereof
There is provided a semiconductor device including an output buffer circuit which reduces an area occupied by a circuit for impedance adjustment and allows high-speed impedance adjustment. In an...
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7525339 |
Semiconductor memory device testing on/off state of on-die-termination circuit during data read mode, and test method of the state of on-die-termination circuit
A semiconductor memory device for testing whether an ODT circuit is on or off during a data read mode includes an on-die termination (ODT) circuit and an ODT state information output unit. The ODT...
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7514952 |
I/O circuitry for reducing ground bounce and VCC sag in integrated circuit devices
Methods and circuitry for reducing ground bounce and VCC sag effects in integrated circuit (“IC”) devices is provided. In particular, a via-programmable design for I/O circuitry in IC devices...
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7495465 |
PVT variation detection and compensation circuit
A compensation circuit and a method that compensates for process, voltage and temperature (PVT) variations in an integrated circuit that includes functional modules. The compensation circuit...
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7479800 |
Variable impedance sense architecture and method
A variable impedance sense (VIS) circuit ( 600 ) can detect and store an input offset value inherent in a sensing loop ( 620 and/or 622 ). According to a detected input offset polarity, a...
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7466723 |
Various methods and apparatuses for lane to lane deskewing
Various methods, apparatuses and systems are described in which a skew delay time between communication lanes is determined. A data transfer path is established which includes two or more...
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7456696 |
Circuit and method of compensating for signal delay in a cable
The compensation circuit comprises an oscillator, a first variable delay line, a second variable delay line, a phase detector and a controller. The oscillator generates an oscillation signal to...
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7439773 |
Integrated circuit communication techniques
An semiconductor device, containing logic blocks and high speed connections between the blocks, where the connections utilize current direction for logic representation rather than voltage level....
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7432730 |
Time based driver output transition (slew) rate compensation
Apparatus and method for controlling the driver output slew rate. The apparatus includes a driver circuit having an input signal and an output signal, where the driver circuit is structured and...
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7428465 |
Testing control methods for use in current management systems for digital logic devices
Systems and methods for Current Management of Digital Logic Devices are provided. In one embodiment a method for calibrating a digital logic circuit current management system is provided. The...
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7427872 |
Asynchronous coupling and decoupling of chips
In some embodiments, a chip includes first and second nodes, a variable voltage source, and transmitter and control circuitry. The transmitter includes a driver coupled to the first and second...
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7421530 |
Noise attenuating bus structure and method for a mobile communication
A bus structure of a mobile communication terminal for reducing digital noise is disclosed. The bus structure comprises a bus switch controller, a first element having a first bus, a second element...
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7411416 |
Technology for supressing noise of data bus circuit
A data bus circuit connects a south bridge driven by a first voltage and a bay driven by a second voltage. The first voltage and the second voltage are different. The data bus circuit includes a...
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7405598 |
Differential line compensation apparatus, method and system
A differential line compensation apparatus is disclosed that has a first terminal to receive a first differential signal supplied by a first trace and a second terminal to receive a second...
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7405591 |
Concept for interfacing a first circuit requiring a first supply voltage and a second supply circuit requiring a second supply voltage
An apparatus interfaces a first circuit using a first supply voltage and a second circuit using a second supply voltage different from the first supply voltage. The apparatus includes a driver...
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7397270 |
Dynamically-adjustable differential output drivers
Systems and methods are provided using dynamically adjustable differential output drivers. Integrated circuits such as programmable logic devices may be provided with adjustable differential output...
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7394282 |
Dynamic transmission line termination
A system may include detection of a low signal received from a transmission line, and uncoupling of a termination circuit from the transmission line in response to the detected low signal. In some...
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7388400 |
Semiconductor integrated circuits with power reduction mechanism
A semiconductor integrated circuit with an operating voltage having an absolute value is 2.5 V or below includes circuit blocks to which operation voltage is supplied by first and second power...
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7385415 |
Semiconductor integrated circuit
A semiconductor integrated circuit for matching the resistance of a variable resistor, which is used as a terminating resistor or a reference of said terminating resistor, to the characteristic...
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7382152 |
I/O interface circuit of integrated circuit
A plurality of transistor pairs of Pch and Nch transistors are connected in series between VDD and GND. An I/O terminal is connected to each connection point of the transistor pairs. Two transistor...
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7380182 |
Method and apparatus for checking output signals of an integrated circuit
Apparatus and method for checking output signals of an integrated circuit are provided. One embodiment provides a method for checking whether signals are output by a write circuit of an integrated...
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7372293 |
Polarity driven dynamic on-die termination
Embodiments of the invention are generally directed to systems, methods, and apparatuses for polarity driven on-die termination. In some embodiments, an integrated circuit includes an input/output...
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7372291 |
Circuits having precision voltage clamping levels and method
A slew rate control circuit includes a receiver for receiving input signals and an output generator for generating output signals based on the input signals. The slew rate control circuit also...
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7362130 |
Method and device for transmission with reduced crosstalk
The invention relates to a method and a device for transmission with reduced crosstalk in interconnections used for sending a plurality of signals, such as the interconnections made with flat...
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7332932 |
Serial link receiver with wide input voltage range and tolerance to high power voltage supply
A circuit device and method for designing a serial link receiver, which accommodates a wide input voltage range and provides tolerance to high termination voltages. The receiver is designed with a...
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7332930 |
Noise canceller circuit
A noise canceller circuit capable of suppressing power supply noise, produced by transition of a data signal, even in case a data signal is increased in speed. The noise canceller circuit includes...
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7323901 |
Semiconductor integrated circuit device
A plurality of sets of circuits are provided, each of which generates an impedance code through the use of an impedance control circuit in association with a resistive element connected to an...
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7315182 |
Circuit to observe internal clock and control signals in a receiver with integrated termination and common mode control
A serial data receiver circuit includes a pair of differential input nodes, and receiver circuitry and a termination circuit coupled between the differential input nodes. The termination circuit...
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7305038 |
Peripheral device receiver detection in a high noise environment
A peripheral device includes a data port having high and low impedance terminations, a transmitter having a data signal generator and a receiver detector. The data signal generator is electrically...
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7295033 |
Impedance adjustment circuits and methods using replicas of variable impedance circuits
An impedance adjustment circuit for controlling an impedance of a variable impedance circuit includes a calibration circuit including a replica of the variable impedance circuit and configured to...
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7285978 |
Circuit and method for impedance calibration of output impedance of LVDS driver
An H-bridge LVDS driver circuit includes a means to calibrate the output impedance of the switches of an LVDS driver to any desired value.
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7282946 |
Delay-insensitive data transfer circuit using current-mode multiple-valued logic
The present invention relates to a delay-insensitive DI data transfer circuit based on a current-mode multiple-valued logic for transferring data regardless of a delay time of transmission...
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7279924 |
Equalization circuit cells with higher-order response characteristics
Equalization circuitry includes additional components to boost the performance of the circuitry to a higher-order response. The additional components are preferably controllably variable so that...
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