|
Match
|
Document |
Document Title |
|
|
7567891 |
Hot-carrier device degradation modeling and extraction methodologies
The present invention is directed to a number of improvements in methods for hot-carrier device degradation modeling and extraction. Several improvements are presented for the improvement of...
|
|
|
7492191 |
Design structure for high speed differential receiver with an integrated multiplexer input
A design structure embodied in a machine readable medium used in a design process includes high-speed interface between a first network component and a second network component, the interface...
|
|
|
7138835 |
Method and apparatus for an equalizing buffer
A programmable, equalizing buffer is provided having feedback transistors used to vary the transfer function of the equalizing buffer, such that a low pass response of a transmission channel is...
|
|
|
7106093 |
Semiconductor device
A semiconductor device having a plurality of cascaded IC's ( 14, 15, 16 ), wherein the matching impedance between a signal transmission path ( 12 ) connected to an external signal transmission path...
|
|
|
6542007 |
Inverter circuit
An inverter circuit is disclosed that prevents flow of a large feedthrough current. The inverter circuit includes depletion type MOS transistor combined with a resistor to impose a current...
|
|
|
6239623 |
Direct coupling field effect transistor logic (DCFL) circuit
In a DCFL circuit, a high-speed operation is conducted in a stable state regardless of its load capacitance. The circuit includes a buffer circuit. Added to the buffer circuit is a pull-up circuit...
|
|
|
6051993 |
Level shift circuit compensating for circuit element characteristic variations
A level shift circuit which drops the output voltage of a prior stage circuit to an input voltage level required at a next stage circuit includes a source follower enhancement-type FET, a gate of...
|
|
|
5909128 |
FETs logic circuit
A semiconductor integrated circuit having a field effect transistor formed on a compound semiconductor is disclosed, that comprises a first power supply, a second power supply for supplying a...
|
|
|
5726591 |
MESFET logic device with clamped output drive capacity and low power
A logic gate circuit includes a logic gate stage to which an input signal is supplied, for outputting a signal depending on a state of the input signal, an output driver stage having an...
|
|
|
5696453 |
GaAs logic circuit with temperature compensation circuitry
The invention provides a logic circuit including (a) a load element having ends one of which is electrically connected to a first terminal of a voltage source, and the other to an output terminal,...
|
|
|
5592108 |
Interface circuit adapted for connection to following circuit using metal-semiconductor type transistor
An interface circuit includes an input current limiting circuit for limiting a current of an input signal fed from a preceding circuit, thereby outputting the current-limited signal to a following...
|
|
|
5451890 |
Gallium arsenide source follower FET logic family with diodes for preventing leakage currents
The basic building block of the invention is an inverter gate consisting of two stages: The first stage is an input logic switching stage consisting of a depletion mode pull-up FET whose gate is...
|
|
|
5451888 |
Direct coupled FET logic translator circuit
A semiconductor circuit for converting high and low input signals at first and second voltage levels to high and low output signals at third and fourth voltage levels includes first, second, and...
|
|
|
5336949 |
Logic circuit with enhancement type FET and Schottky gate
A logic circuit comprising an inverter which includes a load element connected at its one end to a high-potential power supply, an enhancement type N-channel field-effect transistor having a...
|
|
|
5087836 |
Electronic circuit including a parallel combination of an E-FET and a D-FET
A class AB amplifier comprises a pull-up structure of an E-FET and D-FET connected in parallel and a pull-down structure of an E-FET and D-FET connected in parallel. Use of the E-FETs allows a high...
|
|
|
5077494 |
Wide temperature range MESFET logic circuit
A first Schottky diode is connected between the source of a first enhancement JFET and a low voltage line. The drain of the first enhancement JFET is connected through a first active load current...
|
|
|
5027007 |
FFL/QFL FET logic circuits
An FFL/QFL family of logic gates is disclosed, preferably implemented with GaAs MESFET devices and providing enhanced speed-power characteristics. Although a number of gate configurations are...
|
|
|
5021686 |
Logic circuit
A logic circuit, most suitable for the NOR gate, logic function and integration on a single chip with a plurality of such logic circuits and other digital circuits receiving the outputs of the...
|
|
|
4958089 |
High output drive FET buffer for providing high initial current to a subsequent stage
An output buffer provides high current at an output for only a brief period, while after this brief period the output buffer only supplies a limited amount of current to the subsequent stage. One...
|
|
|
4954730 |
Complementary FET circuit having merged enhancement/depletion FET output
A merged enhancement/depletion-mode FET circuit and a complementary FET logic circuit have enhanced operation speed and reduced power dissipation. Serially connected depletion mode and enhancement...
|
|
|
4939390 |
Current-steering FET logic circuit
An integrated circuit, having applicability to GaAs circuitry, is disclosed for performing a current steering logic function. The integrated circuit comprises a switching circuit, a high impedance...
|
|
|
4937474 |
Low power, high noise margin logic gates employing enhancement mode switching FETs
A low power, high noise margin logic gate comprises: an input terminal, an output terminal, and first and second voltage supply terminals; an enhancement mode switching FET having a gate connected...
|
|
|
4935647 |
Group III - V semiconductor devices with improved switching speeds
To decrease the time required to charge parasitic capacitances, and to thereby increase the maximum permissible switching frequency to which a logic circuit can respond, a GaAs device is disclosed...
|
|
|
4931670 |
TTL and CMOS logic compatible GAAS logic family
A novel logic gate, using Gallium-Arsenide technology, that is compatible with TTL or CMOS logic. This logic gate operates off a single voltage supply (e.g. 5 volts) and implements complex logic...
|
|
|
4931669 |
High speed logic circuit having output feedback
In an NOR logic circuit employing an MES (Metal Semiconductor Junction) field effect transistors, an MES field effect transistor 2 for driving an output stage operates in response to an input...
|
|
|
4918336 |
Capacitor coupled push pull logic circuit
This invention discloses a push pull logic circuit which includes a capacitor connected to the output signal lead of the circuit, and also a plurality of diodes, in parallel with the capacitor and...
|
|
|
4912745 |
Logic circuit connecting input and output signal lines
This invention discloses a logic circuit including first, second and third transistors with the control terminals of two of those transistors being connected to the input signal lead, with the...
|
|
|
4885480 |
Source follower field-effect logic gate (SFFL) suitable for III-V technologies
A high speed logic circuit having extremely low propagation delays, suitable for implementation in III-V technology. A logic stage provides the desired logic function by combining a predetermined...
|
|
|
4877976 |
Cascade FET logic circuits
A group III-V digital logic circuit which includes either at least two enhancement type metal semiconductor field effect transistors and one load element or two first type field effect transistors...
|
|
|
4853561 |
Family of noise-immune logic gates and memory cells
A new family of memory cells and digital-logic gates use an enhancement-mode driver, a voltage-level shifter, and a current regulator to provide improved noise margins and large logic swings. The...
|
|
|
4808851 |
ECL-compatible semiconductor device having a prediffused gate array
A semiconductor device includes a prediffused array of elementary gates which constitute an integrated circuit (designated as a "custom made circuit") realized on gallium arsenide. The elementary...
|
|
|
4798979 |
Schottky diode logic for E-mode FET/D-mode FET VLSI circuits
A digital logic circuit using Schottky diodes as the nonlinear logic element, a single power supply and an E-mode MESFET as an inverter in the open drain configuration. Temperature compensation of...
|
|
|
4798978 |
GAAS FET logic having increased noise margin
A high performance logic family for GaAs Enhancement/Depletion mode MESFETs is disclosed. The inventive logic family exhibits a large noise margin with little sacrifice in speed/power performance.
|
|
|
4771189 |
FET gate current limiter circuit
A GaAs logic circuit including a current control FET that provides high current for switching an output FET, but limits the forward biasing of the output FET at the end of a transition to input...
|
|
|
4725743 |
Two-stage digital logic circuits including an input switching stage and an output driving stage incorporating gallium arsenide FET devices
Digital logic driving stage circuitry is provided connected between ground and a single voltage with an enhancement mode type field effect transistor and a depletion mode type field effect...
|
|
|
4724342 |
Push-pull DCFL driver circuit
An improved driver circuit for an integrated gate circuit using Gallium Arsenide direct coupled FET logic. The push-pull driver circuit generally comprises an enhancement mode voltage follower...
|
|
|
4716311 |
Direct coupled FET logic with super buffer output stage
An integrated logic circuit comprises a direct coupled FET logic input stage and a super buffer logic output stage. The input stage comprises a depletion-mode FET having its drain connected to a...
|
|
|
4713559 |
Multiple input and multiple output or/and circuit
An OR logic function is provided in at least two separate circuit branches by diodes in parallel summing current at a first logic node and a first circuit branch and diodes in parallel summing...
|
|
|
4707622 |
GaAs MESFET logic buffers using enhancement and depletion FETs
A logic circuit includes an inverter circuit including a first enhancement type field effect transistor having a gate connected to an input, and a first depletion type transistor having a gate and...
|
|
|
4701646 |
Direct coupled FET logic using a photodiode for biasing or level-shifting
A direct coupled FET logic (DCFL) circuit element has an active FET with source connected to a low reference voltage and drain connected through a pull-up FET to a higher reference voltage. An...
|
|
|
4701643 |
FET gate current limiter circuits
A GaAs logic circuit uses a first FET to control the application of a logic signal from an input to an output. The first FET inherently has parasitic gate-to-source and gate-to-drain diodes. A...
|
|
|
4698524 |
MESFET logic using integral diode level shifting
A semiconductor logic circuit utilizing level shifting of input transistors away from a reference voltage level but shifting the output toward the reference voltage level to increase noise margin....
|
|
|
4663543 |
Voltage level shifting depletion mode FET logical circuit
A GaAs D-MESFET logic system having a low power delay product has a switching second and a voltage level shifting section. The voltage level shifting section consists of a chain of diodes and a...
|
|
|
4654547 |
Balanced enhancement/depletion mode gallium arsenide buffer/comparator circuit
A complementary depletion/enhancement mode (CDEM) gallium arsenide circuit utilizes switching pull-up/pull-down circuits to achieve low power consumption, and makes use of gallium arsenide field...
|
|
|
4639621 |
Gallium arsenide gate array integrated circuit including DCFL NAND gate
A gallium arsenide NAND gate is connected between a power source and a ground potential. The gate is comprised of a load transistor of a normally-on type field effect transistor having an output...
|
|
|
4631426 |
Digital circuit using MESFETS
Two MESFETS with the drain of one connected to the source of the other are driven in complementary fashion by a single inverter using a third MESFET and a voltage level shifter, in response to...
|
|
|
4518871 |
Ga/As NOR/NAND gate circuit using enhancement mode FET's
In an integrated logic circuit employing normally-off type FET's, it is difficult, but desirable to realize a NAND gate due to unwanted flow of the forward current to the next stage. In accordance...
|
|
|
4491747 |
Logic circuit using depletion mode field effect switching transistors
A logic circuit using depletion-mode field effect switching transistors, wherein, a plurality of logic elements respectively having at least one depletion-mode switching FET are connected in...
|
|
|
4438351 |
Gallium arsenide MIS integrated circuits
A technique to utilize GaAs insulated gate field effect transistors (IGFETs) with large surface state densities in digital integrated circuits including latches is described. In this technique, the...
|
|
|
4300064 |
Schottky diode FET logic integrated circuit
A logic circuit is provided which uses Schottky barrier switching diodes to perform the "OR" logic function on logic inputs. The outputs from the switching diodes control the gate of a field-effect...
|