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Match Document Document Title
7413939 Method of growing a germanium epitaxial film on insulator for use in fabrication of CMOS integrated circuit  
A method of fabricating a silicon-germanium CMOS includes preparing a silicon substrate wafer; depositing an insulating layer on the silicon substrate wafer; patterning and etching the insulating...
7410891 Method of manufacturing a superjunction device  
A partially manufactured semiconductor device includes a semiconductor substrate. The device includes a first oxide layer formed on the substrate, with a mask placed over the oxide-covered...
7384810 Image display device and method for manufacturing the same  
Only a region where TFTs constituting a high-performance circuit will be disposed in a precursor semiconductor film PCS on an insulating substrate GLS with an insulating layer UCL serving as an...
7371655 Method of fabricating low-power CMOS device  
A low-power CMOS device can be fabricated by forming a shallow trench on a silicon substrate using a gate mask and negative photoresist. This enables an extremely low profile for a junction after...
7309637 Method to enhance device performance with selective stress relief  
A structure and method of fabrication of a semiconductor device having a stress relief layer under a stress layer in one region of a substrate. In a first example, a stress relief layer is formed...
7285433 Integrated devices with optical and electrical isolation and method for making  
The invention is directed to a method for optical and electrical isolation between adjacent integrated devices. The method comprises the steps of forming at least one trench through an exposed...
7274049 Semiconductor assemblies  
The invention includes a semiconductor processing method wherein an insulative mass is formed across a first electrical node and a second electrical node. The mass has a pair of openings extending...
7265398 Method and structure for composite trench fill  
A method and structure for a composite trench fill for silicon electronic devices. On a planar silicon substrate having a first deposited layer of oxide and a second deposited layer of polysilicon,...
7259442 Selectively doped trench device isolation  
A selectively doped trench isolation device is provided. The trench isolation device of the preferred embodiment includes a semiconductor substrate having a trench. A thin field oxide layer is...
7259073 Semiconductor device and method of manufacturing the same  
A method of manufacturing a semiconductor device that suppresses emergence of a waste in an isolation trench formation process is to be provided. The method comprises forming an isolation trench...
7256119 Semiconductor device having trench structures and method  
In one embodiment, a pair of sidewall passivated trench contacts is formed in a substrate to provide electrical contact to a sub-surface feature. A doped region is diffused between the pair of...
7256091 Method of manufacturing a semiconductor device with a self-aligned polysilicon electrode  
In a method of manufacturing a semiconductor device, an isolation pattern is formed on a substrate. The isolation pattern includes an opening that exposes a portion of the substrate. A preliminary...
7250344 Method of forming a shallow trench-deep trench isolation region for a BiCMOS/CMOS technology  
A method of forming a shallow trench-deep trench isolation for a semiconductor device is provided.
7242070 Deep trench isolation structure of a high-voltage device and method for forming thereof  
A deep trench isolation structure of a high-voltage device and a method of forming thereof. An epitaxial layer with a second type conductivity is formed on a semiconductor silicon substrate with a...
7238568 Trench semiconductor device having gate oxide layer with multiple thicknesses and processes of fabricating the same  
The a trench semiconductor device such as a power MOSFET the high electric field at the corner of the trench is diminished by increasing the thickness of the gate oxide layer at the bottom of the...
7205208 Method of manufacturing a semiconductor device  
In a method of manufacturing a semiconductor device, a first trench is formed in a first region of a substrate and a second trench is formed in a second region of the substrate different from the...
7204934 Method for planarization etch with in-situ monitoring by interferometry prior to recess etch  
A method for processing recess etch operations in substrates is provided including forming a hard mask over the substrate and etching a trench in the substrate using the hard mask, and forming a...
7157327 Void free, silicon filled trenches in semiconductors  
The present invention provides methods of producing substantially void-free trench structures. After deposition of an a-Si or polysilicon layer in a trench formed in a semiconductor, the a-Si or...
7154159 Trench isolation structure and method of forming the same  
A trench isolation structure and a method of forming a trench isolation structure are provided. The method includes providing a substrate having a trench. A polysilicon liner is formed in the...
7135391 Polycrystalline SiGe junctions for advanced devices  
A structure and method of fabrication for MOSFET devices with a polycrystalline SiGe junction is disclosed. Ge is selectively grown on Si while Si is selectively grown on Ge. Alternating...
7135380 Method for manufacturing semiconductor device  
In a conventional method for manufacturing a semiconductor device, there are problems that a concave part is formed in a formation region of an isolation region, no flat surface is formed in the...
7109110 Method of manufacturing a superjunction device  
A partially manufactured semiconductor device includes a semiconductor substrate. The device includes a first oxide layer formed on the substrate, with a mask placed over the oxide-covered...
7109091 Method for processing a substrate to form a structure  
A method for processing a substrate to produce a structure, for example an insulating trench, uses a lithographic mask exposure process. Conventionally, the optical resolution limit prescribes the...
7087925 Semiconductor device having reduced capacitance to substrate and method  
In one embodiment, a matrix of free-standing semiconductor shapes are oxidized to form a low capacitance isolation tub. The adjacent rows of shapes in the matrix are offset with respect to each to...
7067874 Semiconductor device including trench with at least one of an edge of an opening and a bottom surface being round  
A semiconductor device that includes an insulating substrate, a plurality of semiconductor layers arranged to be isolated from one another on the insulating substrate, and a semiconductor element...
7067406 Thermal conducting trench in a semiconductor structure and method for forming the same  
The invention relates to a method of forming a trench filled with a thermally conducting material in a semiconductor substrate. In one embodiment, the method includes filling a portion of the...
7063751 Semiconductor substrate formed by epitaxially filling a trench in a semiconductor substrate with a semiconductor material after smoothing the surface and rounding the corners  
A trench is formed in a semiconductor substrate through a mask composed of a silicon oxide film formed on the semiconductor substrate. Then, an edge portion at an opening portion of the mask is...
7041572 Fabrication method for a deep trench isolation structure of a high-voltage device  
A fabrication method for a semiconductor device. On a semiconductor silicon substrate with a first type conductivity, an epitaxial layer with a second type conductivity and an oxide layer on the...
7015115 Method for forming deep trench isolation and related structure  
According to one embodiment, a structure comprises a substrate and a field oxide region, where the field oxide region has a top surface, and where the top surface of the field oxide region...
7015086 Method of forming a shallow trench-deep trench isolation region for a BiCMOS/CMOS technology  
A process for forming an isolation region comprised of shallow trench-deep trench configuration, wherein a smooth top surface topography is obtained for the isolation region and for adjacent active...
7015077 Varied trench depth for thyristor isolation  
A semiconductor device is formed having a thyristor and trench arranged to electrically insulate an emitter region of the thyristor from another circuit structure. In one example embodiment of the...
6995449 Deep trench isolation region with reduced-size cavities in overlying field oxide  
According to an exemplary method for removing a hard mask in a deep trench isolation process, a hard mask is formed over the substrate, where the substrate includes at least one field oxide region....
6984868 Semiconductor device having a structure for isolating elements  
A semiconductor device is disclosed involving a semiconductor substrate which contains a buried layer of a predetermined conductivity type as well as trenches deep enough to penetrate through the...
6977208 Schottky with thick trench bottom and termination oxide and process for manufacture  
A trench schottky diode which includes a thin insulation layer on the sidewalls of its trenches and a relatively thicker insulation layer at the bottoms of its trenches.
6974749 Bottom oxide formation process for preventing formation of voids in trench  
Embodiments of the present invention are directed to a method of forming a bottom oxide layer in the trench in semiconductor devices, such as Double-Diffused Metal-Oxide Semiconductor (DMOS)...
6972471 Deep trench isolation structure of a high-voltage device and method for forming thereof  
A deep trench isolation structure of a high-voltage device and a method of forming thereof. An epitaxial layer with a second type conductivity is formed on a semiconductor silicon substrate with a...
6955972 Methods of fabricating integrated circuit devices having trench isolation structures  
Methods of fabricating integrated circuit devices include forming a trench in a face of an integrated circuit substrate. The trench has a trench sidewall and a trench floor. The method further...
6919612 Biasable isolation regions using epitaxially grown silicon between the isolation regions  
An improved isolation structure for use in an integrated circuit and a method for making the same is disclosed. In a preferred embodiment, an silicon dioxide, polysilicon, silicon dioxide stack is...
6903435 Vertical power component  
A vertical power component on a silicon wafer, including a lightly-doped epitaxial layer of a second conductivity type on the upper surface of a heavily-doped substrate of a first conductivity...
6897542 Semiconductor assemblies  
The invention includes a semiconductor processing method wherein an insulative mass is formed across a first electrical node and a second electrical node. The mass has a pair of openings extending...
6887768 Method and structure for composite trench fill  
A method and structure for a composite trench fill for silicon electronic devices. On a planar silicon substrate having a first deposited layer of oxide and a second deposited layer of polysilicon,...
6864151 Method of forming shallow trench isolation using deep trench isolation  
A method of isolating active areas of a semiconductor workpiece. Deep trenches are formed in a workpiece between adjacent first active areas, and an insulating layer and a semiconductive material...
6861312 Method for fabricating a trench structure  
An insulation region, for example, an oxide collar, is formed in a trench structure for a DRAM by first widening a first trench region of the trench that is to be formed, in particular, a base...
6849918 Miniaturized dielectrically isolated solid state device  
An improved, surface-passivated and electrically isolated solid-state device (including integrated circuits) comprises a silicon wafer with a PN junction or other electronic rectifying barrier...
6835997 Thyristor-based device with trench dielectric material  
A thyristor-based semiconductor device includes a thyristor body that has at least one region in the substrate and a thyristor control port in a trenched region of the device substrate. According...
6833293 Semiconductor device and method for manufacturing the same  
In a semiconductor device in which a source/drain and a wiring layer are connected to each other through an associated buried conductive layer, a separation width of the buried conductive layer on...
6833291 Semiconductor processing methods  
The invention includes a semiconductor processing method wherein an insulative mass is formed across a first electrical node and a second electrical node. The mass has a pair of openings extending...
6828649 Semiconductor device having an interconnect that electrically connects a conductive material and a doped layer, and a method of manufacture therefor  
The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the same. In one advantageous embodiment, the semiconductor device...
6828644 Semiconductor device with reduced parasitic capacitance between impurity diffusion regions  
A first layer is formed on an underlying substrate having a surface layer made of semiconductor of a first conductivity type. The first layer is made of semiconductor having a resistance higher...
6825079 Method for producing a horizontal insulation layer on a conductive material in a trench  
In order to form an oxide cover on a conductive filling in a trench in a semiconductor substrate an HDP oxide is deposited on the conductive filling using a PECVD method. In this case, the layer...
Matches 1 - 50 out of 538 1 2 3 4 5 6 7 8 9 10 11 >