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7592242 Apparatus and method for controlling diffusion  
A method and device for reducing a dopant diffusion rate in a doped semiconductor region is provided. The methods and devices include selecting a plurality of dopant elements. Selection of a...
7488650 Method of forming trench-gate electrode for FinFET device  
A FinFET device having a trench-gate electrode, and a method of manufacture, is provided. The trench-gate electrode may be fabricated by forming a mask layer on a substrate having a semiconductor...
7435658 Method of manufacturing metal-oxide-semiconductor transistor  
A method of manufacturing a MOS transistor is provided. A substrate having a gate structure thereon is provided. A first spacer is formed on the sidewall of the gate structure. A pre-amorphization...
7371648 Method for manufacturing a transistor device having an improved breakdown voltage and a method for manufacturing an integrated circuit using the same  
The present invention provides a method for manufacturing a transistor device, and a method for manufacturing an integrated circuit including the same. The method for manufacturing the transistor...
7364971 Method for manufacturing semiconductor device having super junction construction  
A semiconductor device includes a body region, a drift region having a first part and a second part, and a trench gate electrode. The body region is disposed on the drift region. The first and...
7361912 Doping method, doping apparatus, and control system for doping apparatus  
A doping method capable of controlling a dose amount in response to a change the ratio in ion species during a doping process, a control system for controlling a doping amount, and a doping...
7361564 Method of manufacturing high-voltage device  
A method of manufacturing a high-voltage device DDD (Double Doped Drain) ion implantation process is performed at a tilt angle in order to form a smooth junction profile. Accordingly, the intensity...
7358167 Implantation process in semiconductor fabrication  
A semiconductor device is formed by performing an amorphizing ion implantation to implant dopants of a first conductivity type into a semiconductor body. The first ion implantation causes a defect...
7348229 Method of manufacturing a semiconductor device and semiconductor device obtained with such a method  
The invention relates to a method of manufacturing a semiconductor device ( 10 ) with a field effect transistor, in which method a semiconductor body ( 1 ) of silicon is provided at a surface...
7345355 Complementary junction-narrowing implants for ultra-shallow junctions  
Methods are disclosed for forming ultra shallow junctions in semiconductor substrates using multiple ion implantation steps. The ion implantation steps include implantation of at least one...
7332386 Methods of fabricating fin field transistors  
A fin field effect transistor (FinFET) includes a substrate, a fin, a gate electrode, a gate insulation layer, and source and drain regions in the fin. The fin is on and extends laterally along and...
7329596 Method for tuning epitaxial growth by interfacial doping and structure including same  
A method that allows for uniform, simultaneous epitaxial growth of a semiconductor material on dissimilarly doped semiconductor surfaces (n-type and p-type) that does not impart substrate thinning...
7326622 Method of manufacturing semiconductor MOS transistor device  
A method of manufacturing a metal-oxide-semiconductor (MOS) transistor device is disclosed. A semiconductor substrate having a main surface is prepared. A gate dielectric layer is formed on the...
7320907 Method for controlling lattice defects at junction and method for forming LDD or S/D regions of CMOS device  
A method for controlling lattice defects at a junction is described, which is used in accompany with an ion implantation step for forming a junction in a substrate and a subsequent annealing step....
7301221 Controlling diffusion in doped semiconductor regions  
A method and device for reducing a dopant diffusion rate in a doped semiconductor region is provided. The methods and devices include selecting a plurality of impurity elements, including at least...
7297617 Method for controlling diffusion in semiconductor regions  
A method and device for reducing a dopant diffusion rate in a doped semiconductor region is provided. The methods and devices include selecting a plurality of impurity elements, including at least...
7291535 Method and apparatus for fabricating semiconductor device  
A method for fabricating a semiconductor device includes the steps of: forming a semiconductor region of a first conductive type on a semiconductor wafer; forming a gate electrode on the...
7285475 Integrated circuit having a device wafer with a diffused doped backside layer  
Integrated circuits, semiconductor devices and methods for making the same are described. Each embodiment shows a diffused, doped backside layer in a device wafer that is oxide bonded to a handle...
7285472 Low tolerance polysilicon resistor for low temperature silicide processing  
Various methods of fabricating a high precision, silicon-containing resistor in which the resistor is formed as a discrete device integrated in complementary metal oxide semiconductor (CMOS)...
7282415 Method for making a semiconductor device with strain enhancement  
A semiconductor device with strain enhancement is formed by providing a semiconductor substrate and an overlying control electrode having a sidewall. An insulating layer is formed adjacent the...
7271078 Method for fabricating semiconductor device and semiconductor device using the same  
A method for fabricating a semiconductor device improves off-state leakage current and junction capacitance characteristics in a pMOS transistor. The method includes forming a device isolation...
7268040 Method of manufacturing a select transistor in a NAND flash memory  
Disclosed herein is a method of manufacturing a flash memory device. According to the present invention, a method of manufacturing a NAND flash memory device having a memory cell and a select...
7262106 Absorber layer for DSA processing  
A method of processing a substrate comprising depositing a layer comprising amorphous carbon on the substrate and then exposing the substrate to electromagnetic radiation have one or more...
7259036 Methods of forming doped and un-doped strained semiconductor materials and semiconductor films by gas-cluster-ion-beam irradiation and materials and film products  
Methods and apparatus are described for irradiating one or more substrate surfaces with accelerated gas clusters including strain-inducing atoms for blanket and/or localized introduction of such...
7259027 Low energy dose monitoring of implanter using implanted wafers  
A method for processing semiconductor wafers, e.g., silicon. The method includes providing a monitor wafer, which is made of a crystalline material. The method includes introducing a plurality of...
7253054 One time programmable EPROM for advanced CMOS technology  
A one time programmable (OTP) electrically programmable read only memory (EPROM) transistor ( 100 ) having an increased breakdown voltage (BVdss) is disclosed. The increased breakdown voltage...
7250313 Method of detecting un-annealed ion implants  
A current-voltage response of at least one site of a semiconductor wafer where ions have been implanted in the semiconducting material of the semiconductor wafer is measured prior to annealing the...
7247924 Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structures  
A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion...
7238597 Boron ion delivery system  
A boron ion plasma, generated by use of a cathodic arc, is manipulated and delivered to a large flat product such as a silicon wafer with boron ion energies suitable for incorporation of boron...
7238577 Method of manufacturing self-aligned n and p type stripes for a superjunction device  
A method is provided for obtaining extremely fine pitch N-type and P-type stripes that form the voltage blocking region of a superjunction power device. The stripes are self-aligned and do not...
7235843 Implanting carbon to form P-type source drain extensions  
The use of a carbon implant, in addition to the conventional fluorine implant, may significantly reduce the transient enhanced diffusion in P-type source drain extension regions. As a result,...
7235470 Semiconductor device and manufacturing method thereof  
A semiconductor device is provided, which aims to reduce the standby power thereof by reducing the leak between a body and a drain with restraining the effect on a threshold voltage, in order to...
7226832 Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer  
A CMOS integrated circuit includes a substrate having an NMOS region with a P-well and a PMOS region with an N-well. A shallow trench isolation (STI) region is formed between the NMOS and PMOS...
7223663 MOS transistors and methods of manufacturing the same  
MOS transistors having a low junction capacitance between their halo regions and their source/drain extension regions and methods for manufacturing the same are disclosed. A disclosed MOS...
7214592 Method and apparatus for forming a semiconductor substrate with a layer structure of activated dopants  
Methods of forming semiconductor devices with a layered structure of thin and well defined layer of activated dopants, are disclosed. In a preferred method, a region in a semiconductor substrate is...
7208381 Doping mask and methods of manufacturing charge transfer image device and microelectronic device using the same  
Provided are a doping mask and methods of manufacturing a charge transfer image device and a microelectronic device using the same. The method includes forming a photoresist film on an entire...
7208330 Method for varying the uniformity of a dopant as it is placed in a substrate by varying the speed of the implant across the substrate  
The present invention provides a method for placing a dopant in a substrate and a method for manufacturing an integrated circuit. The method for placing a dopant in a substrate, among other steps,...
7202146 Process for producing doped semiconductor wafers from silicon, and the wafers produced thereby  
A process for producing doped semiconductor wafers from silicon, which contain an electrically active dopant, such as boron, phosphorus, arsenic or antimony, optionally are additionally doped with...
7202102 Doped absorption for enhanced responsivity for high speed photodiodes  
A photodiode with a semiconductor intrinsic light absorption layer has at least one p-doped light absorption layer or an n-doped light absorption layer, and preferably both. The diode also has a...
7199032 Metal silicide induced lateral excessive encroachment reduction by silicon <110> channel stuffing  
The present invention provides a method of manufacturing a metal silicide electrode ( 100 ) for a semiconductor device ( 110 ). The method comprises implanting small atoms into an nMOS...
7192834 LDMOS device and method of fabrication of LDMOS device  
A lateral double diffused metal oxide semiconductor (LDMOS) device, and method of fabricating such a device, are provided. The method comprises the steps of: (a) providing a substrate of a first...
7192823 Manufacturing method for transistor of electrostatic discharge protection device  
A manufacturing method for a transistor of an ESD protection device. First, the method forms basic elements on a semiconductor base. Next, a patterned resist layer is used as a mask to perform ion...
7186631 Method for manufacturing a semiconductor device  
Provided is a method for manufacturing a semiconductor device comprising forming a device isolation layer on a semiconductor substrate; forming gate insulating layers on the upper part of the...
7179703 Method of forming shallow doped junctions having a variable profile gradation of dopants  
Disclosed are methods for forming a shallow junction with a variable concentration profile gradation of dopants. The process of the present invention includes first providing and masking a surface...
7176112 Non-thermal annealing with electromagnetic radiation in the terahertz range of doped semiconductor material  
A method of non-thermal annealing of a silicon wafer comprising irradiating a doped silicon wafer with electromagnetic radiation in a wavelength or frequency range coinciding with lattice phonon...
7169675 Material architecture for the fabrication of low temperature transistor  
A structure and method for forming a carbon-containing layer in at least a portion of the end of range regions of implanted PAI and/or doped regions. The C-containing layer/region getters defects...
7163867 Method for slowing down dopant-enhanced diffusion in substrates and devices fabricated therefrom  
A method (and resulting structure) of forming a semiconductor device, includes implanting, on a substrate, a dopant and at least one species, annealing the substrate, the at least one species...
7157779 Semiconductor device with triple surface impurity layers  
An operational withstand voltage of a high voltage MOS transistor is enhanced and a variation in a saturation current Idsat is suppressed. A gate insulation film is formed on a P-type semiconductor...
7157322 Semiconductor device and method for manufacturing same  
A semiconductor device including an NMOSFET which has an n-type source/drain main region containing arsenic and an n-type source/drain buffer region having arsenic and phosphorous of which a...
7148131 Method for implanting ions in a semiconductor  
A method for implanting ions in a semiconductor is disclosed. The method includes implanting indium ions into a substrate of a semiconductor material of the semiconductor device for a first time...