Matches 301 - 350 out of 497 < 1 2 3 4 5 6 7 8 9 10 >
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6008099 Fabrication process employing a single dopant implant for formation of a drain extension region and a drain region of an LDD MOSFET using enhanced lateral diffusion  
A method of making a lightly doped drain transistor includes the steps of forming a gate electrode (52) and a gate oxide (54) over a semiconductor substrate (56) and forming a drain (70) in a drain...
6005253 Scanning energy implantation  
A process is described for generating, through ion implantation, any desired concentration profile. This is accomplished by providing a set of mono-energetic doping concentration profiles which,...
6001737 Method of forming a semiconductor device having a titanium salicide shallow junction diffusion layer  
A method of recovering crystal defects in an impurity doped diffusion silicon layer in contact with a C54 crystal phase titanium silicide layer includes the step of causing a cohesion reaction of...
5989986 Method to inhibit the formation of ion implantation induced edge defects  
A method to determine a desired thickness for a surface layer through which ion implantation will take place in order to control the shape of the implantation profile to minimize the formation of...
5981347 Multiple thermal annealing method for a metal oxide semiconductor field effect transistor with enhanced hot carrier effect (HCE) resistance  
A method for forming a metal oxide semiconductor field effect transistor (MOSFET). There is first provided a semiconductor substrate. There is then formed upon the semiconductor substrate a gate...
5972743 Precursor compositions for ion implantation of antimony and ion implantation process utilizing same  
A method for n-doping a material layer with antimony, comprising ion implanting antimony from an antimony precursor composition including a compound of the formula SbX n ((CH 2 ) y SiR 3 ) n -3,...
5972783 Method for fabricating a semiconductor device having a nitrogen diffusion layer  
An element isolator is formed in a silicon substrate. A gate oxide film and a gate electrode are formed overlying the silicon substrate. Subsequently, a four-step large-tilted-angle ion implant is...
5965932 Contamination free source for shallow low energy junction implants using implanted molecules containing titanium and boron  
A method for forming a P-type region in a semiconducting crystalline substrate by ion implantation is disclosed, wherein the implant species is an ionic molecule that contains titanium and boron.
5963801 Method of forming retrograde well structures and punch-through barriers using low energy implants  
A retrograde well in a CMOS device is formed by using a low energy ion implanter. Dopant atoms are implanted into a bare surface of the device's substrate, in a direction that is orthogonal to the...
5956603 Gas immersion laser annealing method suitable for use in the fabrication of reduced-dimension integrated circuits  
A method for fabricating a plurality of shallow-junction metal oxide semiconductor field-effect transistors (MOSFETs) on a selected area of a silicon wafer, in the case in which the MOSFETs are...
5953615 Pre-amorphization process for source/drain junction  
The inventive method provides MOSFET's with deep source/drain junctions and shallow source/drain extensions. The invention provides on a semiconductor wafer a gate stack with side spacers. The side...
5940699 Process of fabricating semiconductor device  
A process of fabricating a semiconductor device, includes the steps of: forming a side wall insulating film on a side portion of a gate electrode formed on a silicon substrate; forming a...
5929496 Method and structure for channel length reduction in insulated gate field effect transistors  
A method and structure are provided for an IGFET which has a highly scalable short conduction channel length. The short channel IGFET functions more rapidly than do longer conduction channel...
5904551 Process for low energy implantation of semiconductor substrate using channeling to form retrograde wells  
A process is disclosed for forming one or more doped regions beneath the surface of a single crystal semiconductor substrate, such as retrograde wells or deeper source/drain regions, by...
5899732 Method of implanting silicon through a polysilicon gate for punchthrough control of a semiconductor device  
A region of damaged silicon is exploited as a gettering region for gettering impurities in a silicon substrate. The region of damaged silicon is formed between source and drain regions of a device...
5897363 Shallow junction formation using multiple implant sources  
Disclosed is a process for forming a shallow junction with a variable concentration profile gradation of dopants. The process of the present invention comprises, first providing and masking a...
5898007 Method for forming wells of a semiconductor device  
A method for forming wells of a semiconductor device which involves the formation of an additional ion implanted layer and a double rapid thermal annealing for a short period of time, thereby...
5874344 Two step source/drain anneal to prevent dopant evaporation  
A two step source/drain annealing process which permits a dopant to be ion implanted directly into the silicon without a protective oxide. The gate oxide is removed before the ion implantation of...
5858864 Process for making group IV semiconductor substrate treated with one or more group IV elements to form barrier region capable of inhibiting migration of dopant materials in substrate  
Formation of a barrier region in a single crystal group IV semiconductor substrate at a predetermined spacing from a doped region in the substrate is described to prevent or inhibit migration of...
5837597 Method of manufacturing semiconductor device with shallow impurity layers  
A method of manufacturing a semiconductor device in which a first ion implantation is carried out into a semiconductor substrate. Then, a second ion implantation is carried out to a projection...
5830799 Method for forming embedded diffusion layers using an alignment mark  
To form NPN and PNP transistors on the same base for example to obtain a complementary bipolar transistor it has been necessary to make an epitaxial layer a thick film, and this has resulted in...
5828114 Method for the prevention of misfit dislocation in silicon wafer and silicon wafer structure manufactured thereby  
There are disclosed methods for the prevention of misfit dislocation in a silicon wafer and the silicon wafer structure manufactured thereby. A method according to an embodiment comprises the steps...
5825066 Control of juction depth and channel length using generated interstitial gradients to oppose dopant diffusion  
An improved manufacturing process and an improved device made by the process for retarding diffusion of implanted dopants during subsequent high-temperature processing. A layer of an electrically...
5821147 Integrated circuit fabrication  
Indium is employed as the shallow portion of a lightly doped drain transistor.
5789310 Method of forming shallow junctions by entrapment of interstitial atoms  
In the formation of shallow depth junctions, atoms of inner elements, such as helium, argon, xenon or krypton are implanted at a chosen energy and concentration to create microvoids in the...
5763319 Process for fabricating semiconductor devices with shallowly doped regions using dopant compounds containing elements of high solid solubility  
A method for manufacturing shallowly doped semiconductor devices. In the preferred embodiment, the method includes the steps of: (a) providing a substrate where the substrate material is...
5759904 Suppression of transient enhanced diffusion in ion implanted silicon  
The present invention provides a method for suppressing transient enhanced diffusion of ion implanted dopants in a semiconductor substrate comprising bombarding the substrate in a vacuum with a...
5702957 Method of making buried metallization structure  
Disclosed is an IC structure providing conductive lines for routing within a semiconductor substrate immediately below the level of the active IC devices. These "buried" conductive lines are...
5681763 Method for making bipolar transistors having indium doped base  
Indium doping is used to make bases of bipolar transistors with superior operational characteristics.
5670391 Process for reducing transient diffusion of dopant atoms  
Transient enhanced diffusion (TED) of dopants is reduced by bring the surface closer to the implant damage prior to the annealing process.
5668020 Method for forming impurity junction regions of semiconductor device  
A method for forming impurity junction regions of a semiconductor device wherein impurity junction regions with a small depth are formed by selectively forming defecting regions and amorphous...
5654209 Method of making N-type semiconductor region by implantation  
A semiconductor device at least including a region which contains a first impurity constituted by a group V element and a second impurity constituted by an element of high electronegativity or a...
5648282 Autodoping prevention and oxide layer formation apparatus  
To form a MOS transistor with a LDD structure, the transistor is formed in a well region. There is formed a gate oxide layer on a silicon substrate and an N + type poly-silicon layer serving as a...
5635752 Semiconductor device having source and drain regions which include horizontally extending secondary defect layers  
A semiconductor device having shallow junction, in which carrier concentration will not be reduced, sheet resistance will not be increased, and contact characteristic at a surface will not become...
H001637 Laser-assisted fabrication of bipolar transistors in silicon-on-sapphire (SOS)  
The fabrication of bipolar junction transistors in silicon-on-sapphire (SOS) relies upon the laser-assisted dopant activation in SOS. A patterned 100% aluminum mask whose function is to reflect...
5602045 Method for making a semiconductor device  
A method for making a microfine semiconductor device includes the step of forming a diffusion layer of a small depth to provide reduced junction leak current. Si ions are implanted at a dosage of...
5598025 Semiconductor device comprises an impurity layer having boron ions in the form of clusters of icosahedron structure  
An impurity diffusion layer shallow in diffusion depth and high in activity is formed in a semiconductor device. In the semiconductor device, clusters of icosahedron structure each composed of...
5593907 Large tilt angle boron implant methodology for reducing subthreshold current in NMOS integrated circuit devices  
A semiconductor structure with large tile angle boron implant is provided for reducing threshold shifts or rolloff at the channel edges. By minimizing threshold shifts, short channel effects and...
5565690 Method for doping strained heterojunction semiconductor devices and structure  
A method for doping a strained heterojunction semiconductor device includes heating a substrate (16) having a strained mono-crystalline semiconductor region (22) to a temperature above room...
5552332 Process for fabricating a MOSFET device having reduced reverse short channel effects  
A process for the fabrication of an MOSFET device includes the formation of a buffer layer (28) overlying the surface of a semiconductor substrate (14) adjacent to a gate electrode (18). A defect...
5504016 Method of manufacturing semiconductor device structures utilizing predictive dopant-dopant interactions  
The effect of dopant-dopant interaction on diffusion in silicon for a specific set of impurities is modeled. The first step in the modeling process involved quantum chemical calculations. The...
5474940 Method of fabricating a semiconductor device having shallow junctions in source-drain regions and a gate electrode with a low resistance silicide layer  
A method of fabricating a semiconductor device comprises: a first annealing process for annealing a semiconductor substrate provided with element isolating regions and gate electrode regions; and a...
5420079 Process for producing semiconductor device comprising two step annealing treatment  
The disclosed invention is a process for fabricating a semiconductor device comprising the steps of: forming a gate electrode; covering the gate electrode and surface of the substrate with a...
5413943 Semiconductor device and method of manufacturing the same  
An impurity diffusion layer shallow in diffusion depth and high in activity is formed in a semiconductor device. In the semiconductor device, clusters of icosahedron structure each composed of...
5407838 Method for fabricating a semiconductor device using implantation and subsequent annealing to eliminate defects  
A method for fabricating a semiconductor device including carrying out an ion implantation into a predetermined region of a single-crystal silicon substrate to form therein an amorphized...
5399506 Semiconductor fabricating process  
In order to reduce a junction leakage current and obtain a shallow junction, ion implantation to form a doped region, such as an active region of a transistor, is followed by a low-temperature...
5354698 Hydrogen reduction method for removing contaminants in a semiconductor ion implantation process  
In semiconductor manufacture a method of ion implanting a substrate includes an in-situ hydrogen reduction for removing or outgassing contaminants present on the surface of the substrate. By...
5334556 Method for improving gate oxide integrity using low temperature oxidation during source/drain anneal  
A method of annealing a partially fabricated semiconductor device which comprises the steps of annealing a partially fabricated semiconductor device in an atmosphere of an inert gas and an...
5300454 Method for forming doped regions within a semiconductor substrate  
A method for forming a first doped region (24) and a second doped region (26) within a substrate (12). A masking layer (14) overlies the substrate (12). A first region (20) of the masking layer...
5298446 Process for producing semiconductor device  
A process for producing a semiconductor device comprising the steps of: (a) on a semiconductor Si substrate having a gate electrode formed thereon through the intermediary of an SiO 2 film, ...
Matches 301 - 350 out of 497 < 1 2 3 4 5 6 7 8 9 10 >