Matches 451 - 500 out of 1217 < 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 >
Match Document Document Title
6903967 Memory with charge storage locations and adjacent gate structures  
A memory having gate structures adjacent opposing sidewalls of a semiconductor structure including a channel region and a plurality of charge storage locations between the gate structures and the...
6900099 Flash memory cell and method for fabricating the same  
A flash memory cell. The memory cell includes a substrate, a floating gate, a control gate, and a source/drain region. The floating gate, disposed over the substrate and insulated from the...
6897112 Method for fabricating an integrated semiconductor configuration with the aid of thermal oxidation, related semiconductor configuration, and related memory unit  
A method for fabricating an integrated semiconductor configuration includes generating a polycrystalline layer at a surface of a base layer and doping the polycrystalline layer. An oxide layer is...
6897517 Multibit non-volatile memory and method  
A memory is described having a semiconductor substrate of a first conductivity type, a first and a second junction region of a second conductivity type, whereby said first and said second junction...
6897518 Flash memory cell having reduced leakage current  
A flash memory cell of the present invention comprises a floating gate, having a charge trapping region and a fin region. A source region and a drain region is formed proximate the floating gate. A...
6897116 Method and structure to improve the gate coupling ratio (GCR) for manufacturing a flash memory device  
Method and structure to improve the gate coupling ratio (GCR) for manufacturing a flash memory device are provided. The method and structure include the following steps. A gate oxide layer, a first...
6893920 Method for forming a protective buffer layer for high temperature oxide processing  
A thin buffer layer of SiON is formed on the top surface of the floating gate, in order to protect the polysilicon surface from attack by atomic chlorine produced during the formation of the high...
6894932 Dual cell memory device having a top dielectric stack  
A non-volatile memory device includes a semiconductor substrate and a pair of buried bitlines within the substrate. A bottom dielectric layer is formed over the substrate and a charge trapping...
6893922 Non-volatile memory device and manufacturing method thereof  
A non-volatile memory device and a manufacturing method thereof are disclosed. The non-volatile memory device includes a gate insulating film formed on a semiconductor substrate, a floating gate...
6890820 Method of fabricating FLASH memory devices  
A method of fabricating split gate type FLASH memory device comprises forming trench device isolation layers in a substrate to define a plurality of parallel first active regions. A gate insulation...
6890843 Methods of forming semiconductor structures  
One aspect of the invention encompasses a method of forming a semiconductor structure. A patterned line is formed to comprise a first layer and a second layer. The first layer comprises silicon and...
6887799 Indium oxide conductive film  
One-transistor ferroelectric memory devices using an indium oxide film (In 2 O 3 ), an In 2 O 3 film structure, and corresponding fabrication methods have been provided. The method for controlling...
6887756 Method of forming flash memory with protruded floating gate  
A method of forming a flash memory with a protruded floating gate. A substrate is provided. An isolation area and a plurality of patterned conductive layers are sequentially formed on the...
6888192 Mirror image non-volatile memory cell transistor pairs with single poly layer  
An arrangement of non-volatile memory transistors constructed in symmetric pairs within the space defined by intersecting pairs of word and bit lines of a memory array. The transistors have spaced...
6878986 Embedded flash memory cell having improved programming and erasing efficiency  
A memory cell including a substrate having a source region; a floating gate structure disposed over the substrate and associated with the source region; and a source coupling enhancement structure...
6878591 Self aligned method of forming non-volatile memory cells with flat word line  
A method of forming an electrically erasable non-volatile memory cell array. Each memory cell includes a floating gate, a block of insulation material over the floating gate, and a control gate...
6872614 Nonvolatile semiconductor memory device and process of production and write method thereof  
A nonvolatile semiconductor memory device featuring a reducing operating voltage while maintaining a good disturbance characteristic and high speed in a write operation, including a gate insulating...
6873005 Programmable memory devices supported by semiconductor substrates  
The invention includes a memory device supported by a semiconductor substrate and comprising in ascending order from the substrate: a floating gate, a dielectric material, a layer consisting...
6872624 Method of fabricating nonvolatile semiconductor memory device  
A gate structure composed of a tunnel insulation film, a floating gate electrode, a capacitive insulation film and a control gate electrode is formed on a semiconductor substrate. Then, ion...
6870212 Trench flash memory device and method of fabricating thereof  
A method of fabricating a trench flash memory device, where the method includes forming a patterned mask layer on the substrate and using it as the mask for form a trench in the substrate. Next, a...
6867128 Method for making an electronic component with self-aligned drain and gate, in damascene architecture  
A method for fabricating an electronic component with a self-aligned source, drain and gate. The method includes forming a dummy gate on a silicon substrate, in which the dummy gate defines a...
6867119 Nitrogen oxidation to reduce encroachment  
A method of manufacturing a metal oxide semiconductor. A gate structure of the metal oxide semiconductor is etched. A nitrogen-comprising gas, which may be NO or N 2 O, is made to flow over the...
6867097 Method of making a memory cell with polished insulator layer  
An improved method of making a flash memory cell including a substrate having a floating gate of a first thickness includes depositing an insulator on the substrate and over the floating gate. The...
6868015 Semiconductor memory array of floating gate memory cells with control gate spacer portions  
A self aligned method of forming a semiconductor memory array of floating gate memory cells in a semiconductor substrate has a plurality of spaced apart isolation regions and active regions on the...
6867113 In-situ deposition and doping process for polycrystalline silicon layers and the resulting device  
An in-situ deposition and doping method for polycrystalline silicon layers of semiconductor devices. A first intermediate layer of in-situ doped polycrystalline silicon is grown, and a second...
6867999 Memory device including a transistor having functions of RAM and ROM  
A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor...
6862220 Semiconductor device  
A semiconductor device including a nonvolatile memory unit and a variable logic unit mounted on a chip is configured to achieve higher speed operation at a lower voltage. The semiconductor device...
6861306 Method of forming a split-gate memory cell with a tip in the middle of the floating gate  
A split-gate FLASH memory cell is formed with a floating gate that has a tip in the middle of the floating gate. The method of the present invention forms the tip to have a substantially constant...
6861696 Structure and method for a two-bit memory cell  
According to one exemplary embodiment, a two-bit memory cell situated over a substrate comprises a tunnel oxide layer situated over the substrate. The two-bit memory cell further comprises a first...
6858496 Oxidizing pretreatment of ONO layer for flash memory  
A method of forming a dielectric structure for a flash memory cell includes forming a first layer of silicon dioxide, forming a layer of silicon nitride on the first layer of silicon dioxide, and...
6858543 Method of forming tunnel oxide film in semiconductor device  
The present invention relates to a method of forming a tunnel oxide film in a semiconductor device, in which a predetermined thickness of the oxide film is not removed during a process of removing...
6855979 Multi-bit non-volatile memory device and method therefor  
A multi-bit non-volatile memory device includes a charge storage layer ( 14 ) sandwiched between two insulating layers ( 12 and 16 ) formed on a semiconductor substrate ( 10 ). A thick oxide...
6853027 Semiconductor nonvolatile memory with low programming voltage  
A semiconductor nonvolatile memory cell comprised of a p-type silicon well 12 , an n + drain 8 and an n + source 10 , the source and the drain regions defining an channel region 7 . On top...
6849896 Flash memory with UV opaque passivation layer  
A method for making a flash memory having a passivation layer that is not transparent to ultraviolet light. The method forming a semiconductor that includes flash memory cell having floating gate,...
6849897 Transistor including SiON buffer layer  
A thin buffer layer of SiON is formed on the top surface of the floating gate, in order to protect the polysilicon surface from attack by atomic chlorine produced during the formation of the high...
6846716 Integrated circuit device and method therefor  
A semiconductor device has recesses formed in the substrate during removal of the anti-reflective coating (ARC) because these recess locations are exposed during the etching of the ARC. Although...
6847068 Floating gate and fabrication method therefor  
A floating gate with multiple tips and a fabrication method thereof. A semiconductor substrate is provided, on which a patterned hard mask layer is formed, wherein the patterned hard mask layer has...
6844232 Flash memory device and fabricating method therefor  
A cell transistor of a flash memory device includes a semiconductor substrate, a source region, a drain region, a floating gate, an inter-gate insulating layer, and a control gate, wherein the...
6844268 Method for fabricating a semiconductor storage device having an increased dielectric film area  
A semiconductor device of the present invention is a semiconductor memory having a charge storage film. Recesses or holes which effectively increase the capacitance of a floating gate or a memory...
6841821 Non-volatile memory cell fabricated with slight modification to a conventional logic process and methods of operating same  
A non-volatile memory cell is fabricated using a conventional logic process, with minor modifications. The cell is fabricated by forming a shallow trench isolation (STI) region in a well region of...
6838342 Nonvolatile memory fabrication methods comprising lateral recessing of dielectric sidewalls at substrate isolation regions  
A floating gate of a nonvolatile memory cell is formed from two conductive layers ( 410.1, 410.2 ). A dielectric ( 210 ) in substrate isolation regions and the first of the two conductive layers...
6830974 Method of fabricating a semiconductor device including a tunnel oxide film  
A method of fabricating a semiconductor device includes the steps of forming a first film of silicon nitride or silicon oxynitride on a polysilicon layer, forming a second film of silicon oxide on...
6831325 Multi-level memory cell with lateral floating spacers  
A multi-level non-volatile memory transistor is formed in a semiconductor substrate. A conductive polysilicon control gate having opposed sidewalls is insulatively spaced just above the substrate....
6830973 Nonvolatile semiconductor memory device and method of manufacturing the same  
Using a rapid thermal oxidation device, the top and side surfaces of a floating gate electrode are oxidized by In Situ Steam Generation (ISSG), wherein oxygen to which about 0.5 to 33% hydrogen has...
6828623 Floating gate memory device with homogeneous oxynitride tunneling dielectric  
A memory device with homogeneous oxynitride tunneling dielectric. Specifically, the present invention describes a flash memory cell that includes a tunnel oxide dielectric layer including...
6828621 Nonvolatile semiconductor memory device and method for fabricating the same  
A nonvolatile semiconductor memory device has a protective insulating film deposited on each of the side surfaces of a control gate electrode to protect the control gate electrode during the...
6828194 Low voltage programmable and erasable flash EEPROM  
A new method of fabricating and programming and erasing a Flash EEPROM memory cell is achieved. A tunneling oxide layer is formed overlying a semiconductor substrate. A first polysilicon layer, an...
6826084 Accessing individual storage nodes in a bi-directional nonvolatile memory cell  
A memory transistor has a pair of separate floating gates overlying end regions of a channel and a control gate that overlies the floating gates and a central region of the channel. The memory...
6822284 ONO dielectric for memory cells  
A method of fabricating a semiconductor device includes providing a wafer substrate, forming a first oxide layer over the wafer substrate using a single wafer low pressure chemical vapor deposition...
6822259 Method of detecting and distinguishing stack gate edge defects at the source or drain junction  
A method and apparatus for testing semiconductors comprising stacked floating gate structures. A floating gate is programmed ( 710 ). An electrical stress or disturb voltage is applied to a control...
Matches 451 - 500 out of 1217 < 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 >