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7002249 Microelectronic component with reduced parasitic inductance and method of fabricating  
A semiconductor device package is disclosed which includes inter-digitated input and output bond wires configured to increase the negative mutual inductive coupling between the wires, thus reducing...
7002254 Integrated circuit package employing flip-chip technology and method of assembly  
An integrated circuit package includes a package substrate having a first surface including a first array of interconnection sites and a second array of interconnection sites. A first integrated...
7002242 Ball grid array package semiconductor device having improved power line routing  
A ball grid array package semiconductor device having improved power line routing. The BGA package semiconductor device includes a semiconductor chip having a plurality of pads along its center, a...
6998713 Wiring board and method for producing same  
The invention relates to a wiring board comprising a board having an electrode and being coated with an insulation layer with a hole for exposing the electrode; a wiring comprising a Cr or Ti...
6998715 Grid array electronic component, wire reinforcing method for the same, and method of manufacturing the same  
Grid array electronic component, wiring-strengthening method and producing method wherein a grid array electronic component in which a grid array LSI chip 2 having a large number of lands 3 ...
6995043 Methods for fabricating routing elements for multichip modules  
A routing element for use with a multichip module that includes a substrate that carries conductive traces that provide either additional electrical paths or shorter electrical paths than those...
6995463 Integrated chip package having intermediate substrate and multiple semiconductor chips  
The present integrated chip package provides a low cost package that is suitable for high density semiconductors that have high power dissipation. The integrated chip package includes at least one...
6992379 Electronic package having a thermal stretching layer  
An electronic package and method of making same in which a circuitized substrate having a first stiffness includes a plurality of electrically conductive circuit members on a first portion of the...
6992001 Screen print under-bump metalization (UBM) to produce low cost flip chip substrate  
A method for forming an integrated circuit interconnect pad is described. In one embodiment a method of forming an integrated circuit comprises screen printing a conductive paste onto a terminal...
6991961 Method of forming a high-voltage/high-power die package  
A method for forming a high voltage component package, which includes providing a flexible non-conductive substrate, forming a conductive layer on the substrate, and forming a circuit trace from...
6992372 Film carrier tape for mounting electronic devices thereon  
The present invention provides a flat film carrier tape for mounting electronic devices thereon which tape can enhance reliability of a semiconductor chip mounting line. The film carrier tape...
6992395 Semiconductor device and semiconductor module having external electrodes on an outer periphery  
The present invention is directed to a semiconductor device and a semiconductor module both having an inexpensive and compact structure. The semiconductor module (M 1 ) according to a first...
6987323 Chip-size semiconductor package  
A chip-size semiconductor package includes a semiconductor chip; a metal pad formed on the semiconductor chip; a conductive wiring pattern electrically connected to the metal pad; a molding resin...
6984890 Chip-scale package  
A substrate having upper and lower surfaces, the upper surface including a periphery defined by first and second spaced apart side edges and front and rear spaced apart edges; a power semiconductor...
6984894 Semiconductor package having a partial slot cover for encapsulation process  
A system and method for encapsulating an integrated circuit package. More specifically, a system and method for encapsulating a board-on-chip package is described. A strip of material is disposed...
6982491 Sensor semiconductor package and method of manufacturing the same  
A process for fabricating an integrated circuit package includes: providing a substrate having conductive traces therein, the substrate including a cavity therein; mounting a semiconductor die to a...
6982486 Cavity ball grid array apparatus having improved inductance characteristics and method of fabricating the same  
A ball grid array (BGA) package that includes a central cavity for receiving a semiconductor die therein is disclosed. The die rests on a base laminate, the die side of which includes traces...
6979897 Package substrate for improving electrical performance  
A package substrate for improving electrical performance includes at least an insulating layer, a wiring layer and a ground/power layer. The wiring layer is formed on a top surface of the...
6979908 Input/output architecture for integrated circuits with efficient positioning of integrated circuit elements  
A described embodiment of the present invention includes an integrated circuit having a plurality of I/O modules. The I/O modules include a bond pad formed on a substrate. The I/O modules also...
6977431 Stackable semiconductor package and manufacturing method thereof  
A stackable semiconductor package is disclosed that includes a semiconductor die coupled to a metal leadframe. The semiconductor die is coupled to a die pad and is electrically coupled to leads of...
6977442 Semiconductor device structure  
A semiconductor device includes a conductive layer with a plurality of wires, and a bonding pad formed in a region overlapping with the plurality of wires of the conductive layer. One of the wires...
6977443 Substrate for carrying a semiconductor chip and semiconductor device using same  
The objective of this invention is to provide a type of substrate for carrying a semiconductor chip that can increase the arrangement density of lands, and a type of semiconductor device that makes...
6972152 Use of direct gold surface finish on a copper wire-bond substrate, methods of making same, and methods of testing same  
A wire-bonding substrate is described. The wire-bonding substrate includes a copper metallization and a gold surface finish disposed above and on the copper metallization. The gold surface finish...
6972445 Input/output structure and integrated circuit using the same  
An input/output structure for a die to support an Accelerated Graphic Port (AGP) standard and a Peripheral Component Interconnection Express (PCIE) standard is provided. The I/O structureis...
6972481 Semiconductor multi-package module including stacked-die package and having wire bond interconnect between stacked packages  
A semiconductor multi-package module having stacked first and second packages, each package including a die attached to a substrate, in which the first and second substrates are interconnected by...
6972488 Semiconductor device in which a semiconductor chip mounted on a printed circuit is sealed with a molded resin  
A semiconductor device includes (a) a printed wiring board, (b) a semiconductor chip mounted on the printed wiring board, (c) a molded resin formed on the printed wiring board, covering the...
6969917 Electronic chip component with an integrated circuit and fabrication method  
The invention relates to an electronic chip component and a method for fabricating the chip component with a semiconductor chip having an integrated circuit therein. Contact surfaces are on the...
6963127 Protective structures for bond wires  
Protective structures for bond wires or other intermediate conductive elements of a semiconductor device assembly cover the intermediate conductive elements without covering a substantial portion...
6956286 Integrated circuit package with overlapping bond fingers  
An integrated circuit package comprises a set of bond fingers for connecting wire bonds from the chip, the bond fingers being placed overlapping on a transverse axis from the chip and extending...
6956294 Apparatus for routing die interconnections using intermediate connection elements secured to the die face  
A semiconductor device, such as an integrated circuit die, includes a plurality of bond pads on an active surface thereof electrically connected to internal circuitry of the semiconductor device,...
6953997 Semiconductor device with improved bonding pad connection and placement  
A semiconductor apparatus includes a substrate with a peripheral edge. A plurality of devices are situated on the substrate and adjacent the peripheral edge, with each device including a first end...
6953999 High density chip level package for the packaging of integrated circuits and method to manufacture same  
A package for mounting an integrated circuit die. In one embodiment the package comprises a metal substrate having first and second opposing primary surfaces and an aperture formed therebetween. A...
6952053 Metal bond pad for integrated circuits allowing improved probing ability of small pads  
The present invention is a metal bond pad that provides electrical and mechanical connection to an integrated circuit (IC). The metal bond pad is configured to accommodate for probe travel during...
6949816 Semiconductor component having first surface area for electrically coupling to a semiconductor chip and second surface area for electrically coupling to a substrate, and method of manufacturing same  
A semiconductor component for electrical coupling to a substrate ( 230 ) includes: a semiconductor chip ( 110 ); a non-leaded leadframe ( 120 ) including a plurality of electrical contacts ( 130 )...
6949837 Bonding pad arrangement method for semiconductor devices  
A variety of pad arrangements are provided for semiconductor devices for reducing the likelihood of bonding failures, particularly those due to shorts, and/or for reducing the difference in length...
6946732 Stabilizers for flip-chip type semiconductor devices and semiconductor device components and assemblies including the same  
Stabilizers for placement on a surface of a semiconductor device component and methods for fabricating and placing the stabilizers on semiconductor device components. Upon assembly of the...
6946747 Semiconductor device and its manufacturing method  
A semiconductor device of the MCM type capable of high-speed operation and low power consumption and its manufacturing method are provided. A plurality of semiconductor chips, each having an...
6946746 Method to reduce number of wire-bond loop heights versus the total quantity of power and signal rings  
A method for reducing the number of wire-bond loop heights which are required in comparison with a total quantity of power and signal rings employed in low profile wire-bond integrated circuit...
6943437 Smart card or similar electronic device  
The invention concerns an electronic device such as a smart card which includes at least a microcircuit embedded in a carrier medium and which includes exit hubs linked to interface elements...
6940154 Integrated circuit package and method of manufacturing the integrated circuit package  
The present invention relates to an integrated circuit package and method of manufacturing an integrated circuit package. In one aspect, the present invention relates to an integrated circuit...
6938335 Electronic component mounting method  
A component mounting method recognizes reference marks on a printed circuit board and an electronic component, and uses these reference marks to determine a shift between a position of the circuit...
6937477 Structure of gold fingers  
The present invention provides an improved structure of gold fingers, which is to redesign a conventional gold finger on a packaging substrate into a gold finger set that contains a plurality of...
6933617 Wafer interposer assembly  
A wafer interposer assembly and a system for building the same are disclosed. The wafer interposer assembly includes a semiconductor wafer ( 10 ) having a die ( 11 ) and a redistribution layer pad...
6933602 Semiconductor package having a thermally and electrically connected heatspreader  
Embodiments of the invention include a semiconductor integrated circuit package that includes a substrate having an integrated circuit die attached thereto. The substrate includes at least one...
6933600 Substrate for semiconductor package  
The invention provides a semiconductor package substrate, which includes a substrate, a chip contact area, an inner pad portion, an outer pad portion and a conductive layer. The chip contact area,...
6933599 Electromagnetic noise shielding in semiconductor packages using caged interconnect structures  
A semiconductor device has a die ( 10 ) overlying and electrically connected to a support structure ( 11 ), such as a substrate or a lead frame, via a plurality of interconnects. Aggressor...
6930378 Stacked semiconductor die assembly having at least one support  
A stack of semiconductor dies is disclosed. A first stack level includes a first semiconductor die and at least one first support that are attached to a substrate surface. A second level includes a...
6930400 Grid array microelectronic packages with increased periphery  
A grid array microelectronic package includes a substrate and an array of external connectors on the substrate that are arranged in rows and columns to define a periphery of the array and the...
6930377 Using adhesive materials as insulation coatings for leadless lead frame semiconductor packages  
A number of apparatus for packaging semiconductor devices using an epoxy ink or adhesive. In one embodiment, a pattern of epoxy is formed on the bottom surface of die attach pad of a leadless...
6927491 Back electrode type electronic part and electronic assembly with the same mounted on printed circuit board  
A back electrode type electronic part includes a main body including a circuit, and electrodes arranged for solder bumps on a back surface portion of the electronic part and connected to the...