Matches 151 - 200 out of 1417 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
Match Document Document Title
7399694 Semiconductor device and a manufacturing method of the same  
By preparing a package substrate which has a plurality of lands of NSMD structure, and the output wiring and dummy wiring which were connected to each of the lands, and have been arranged mutually...
7400032 Module assembly for stacked BGA packages  
Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays are disclosed. The ball grid array packages comprise flexible or rigid...
7397138 Semiconductor device  
Input/output cells are formed so as to be peripherally arranged adjacent to a corner cell on a surface of a semiconductor chip, and electrode pads are formed on the respective input/output cells....
7397127 Bonding and probing pad structures  
A pad structure includes a first metal-containing layer formed over a substrate. A first passivation layer is formed over the first metal-containing layer. The first passivation layer has a first...
7397129 Interposers with flexible solder pad elements  
Various embodiments of an interposer for mounting a semiconductor die, as well as methods for forming the interposer, are disclosed. The interposer includes flexible solder pad elements that are...
7394161 Chip structure with pads having bumps or wirebonded wires formed thereover or used to be tested thereto  
A chip structure comprising a semiconductor substrate, a plurality of dielectric layers, a plurality of circuit layers, a passivation layer, a metal layer and at least a bump. The semiconductor...
7394164 Semiconductor device having bumps in a same row for staggered probing  
A semiconductor device has a plurality of bumps in a same row for staggered probing. The bumps in a same row are disposed on a chip and include a plurality of regular bumps and a plurality of...
7394159 Delamination reduction between vias and conductive pads  
Vias and conductive pads configured and coupled in a manner to reduce delamination are described herein. The via and the conductive pads may be located in a substrate such as a carrier substrate, a...
7391100 Integrated circuit package for semiconductor devices having a reduced leadframe pad and an increased bonding area  
A semiconductor integrated circuit package having a leadframe ( 108 ) that includes a leadframe pad ( 103 a ) disposed under a die ( 100 ) and a bonding metal area ( 101 a ) that is disposed over...
7391122 Techniques for flip chip package migration  
Techniques for integrated circuit packaging in a flip chip configuration that ensures a migration path between related integrated circuits and utilizes core I/O (or area I/O) are provided. An...
7391110 Apparatus for providing capacitive decoupling between on-die power and ground conductors  
One embodiment of the present invention provides capacitive decoupling on the surface of a semiconductor die, instead of providing the decoupling on a package or printed circuit board to which the...
7391105 Unit semiconductor chip and multi chip package with center bonding pads and methods for manufacturing the same  
A unit semiconductor chip and stacked semiconductor package and method of manufacturing with center bonding pads and at least one circuit layer to reduce the length of bonding. The unit...
7391114 Electrode pad section for external connection  
A pad section serving as an electrode for external connection of a semiconductor device includes a first pad metal ( 61 ) formed in the top layer, a second pad metal ( 62 ) formed under the first...
7388283 Method and device for integrating an illumination source and detector into the same IC package that allows angular illumination with a common planar leadframe  
An optical navigation device includes an integrated package. The integrated package includes a planar leadframe, a light source die mounted on the leadframe, and a sensor die mounted on the...
7385298 Reduced-dimension microelectronic component assemblies with wire bonds and methods of making same  
The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a...
7382053 Power supply wiring structure  
Provided is a power supply wiring structure which comprises a first and a second power supply wirings, which are disposed on different planes to cross each other two-dimensionally. The first and...
7382050 Semiconductor device and method for producing the same  
A semiconductor device includes a tape carrier substrate having a flexible insulating film base, a plurality of conductor wirings provided on the film base, and wiring bumps respectively formed so...
7378747 Semiconductor device chip and semiconductor device chip package  
A semiconductor device chip includes channel blocks each of which includes channels, each of the channels including unit devices placed in a substrate and well regions; first metal interconnection...
7378745 Package substrate for a semiconductor device having thermoplastic resin layers and conductive patterns  
A plurality of film insulators having conductive patterns that are formed on surfaces and conductive vias that pass through the film insulators in the direction of thickness are stacked together...
7375419 Stacked mass storage flash memory package  
A stacked multiple offset chip device is formed of two or more dice of similar dimensions and bond pad arrangement, in which bond pads are located in fields along less than three edges of the...
7375432 Via attached to a bond pad utilizing a tapered interconnect  
An interconnect includes a pad and at least two vias coupled to the pad. In one embodiment, the pad has five substantially straight edges, one via directly coupled to the pad by being formed...
7372168 Semiconductor chip capable of implementing wire bonding over active circuits  
A semiconductor chip capable of implementing wire bonding over active circuits (BOAC) is provided. The semiconductor chip includes a bonding pad structure which includes a bondable metal pad, a top...
7372169 Arrangement of conductive pads on grid array package and on circuit board  
The present invention discloses a dense arrangement in the conductors of a package and the corresponding conductive pads of a circuit board. The conductors and the corresponding conductive pads are...
7372143 Printed circuit board including via contributing to superior characteristic impedance  
A via is formed in a printed circuit board to penetrate through an insulating layer. A guard pattern, made of an electrically-conductive material, extends on the front surface of the insulating...
7368821 BGA semiconductor chip package and mounting structure thereof  
In example embodiments of the present invention, a structure of a BGA semiconductor chip package includes a substrate having first and second surfaces, a semiconductor chip having a plurality of...
7368810 Invertible microfeature device packages  
Invertible microfeature device packages and associated methods for manufacture and use are disclosed. A package in accordance with one embodiment includes a microfeature device having a plurality...
7365441 Semiconductor device fabricating apparatus and semiconductor device fabricating method  
A semiconductor device fabricating method comprises a substrate forming step of forming a plurality of separate conductive pads 20 on an adhesive layer included in an adhesive sheet 50 , and a...
7365436 Substrate having a penetrating via and wiring connected to the penetrating via and a method for manufacturing the same  
A disclosed substrate includes a base member having a through-hole, and a conductive metal filling in the through-hole so as to form a penetrating via. The penetrating via contains a conductive...
7365415 High frequency semiconductor device  
A semiconductor device has a mounting substrate and a semiconductor package mounted on the mounting substrate. The mounting substrate has a substrate body, input/output line conductors on the upper...
7361990 Reducing cracking of high-lead or lead-free bumps by matching sizes of contact pads and bump pads  
A semiconductor package assembly comprises a first conductive pad on a semiconductor substrate; a second conductive pad on a package substrate; a bump physically coupled between the first...
7361997 Device package, a printed wiring board, and an electronic apparatus with efficiently spaced bottom electrodes including intervals between bottom electrodes of different lengths  
A device package, such as a BGA, to be mounted on a printed wiring board (PWB) is disclosed. The bottom electrodes of the device package are arranged in an array such that intervals between the...
7361981 Pad layout  
A pad layout suitable for being applied on a metal interconnection structure of an integrated circuit chip is provided. The pad layout includes a first signal pad, a second signal pad, a first...
7358616 Semiconductor stacked die/wafer configuration and packaging and method thereof  
A reciprocal design symmetry allows stacked wafers or die on wafer to use identical designs or designs that vary only by a few layers (e.g. metal interconnect layers). Flipping or rotating one die...
7358570 Liquid crystal display panel  
A COG type liquid crystal display panel 10 in which a rectangular chip mounting area MA for mounting an IC chip 14 is provided on one of a pair of substrates 11, 12 on which a plurality of...
7355272 Semiconductor device with stacked semiconductor chips of the same type  
A semiconductor device includes a wiring board, a first semiconductor chip (e.g. DRAM) that is flip-chip connected on the wiring board, a second semiconductor chip (e.g. DRAM) that is of the same...
7355283 Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging  
A rigid wave pattern formed on a first side of a substrate in a semiconductor die package. The rigid wave pattern aligns with and overlies the contact fingers formed on the second side of the...
7348680 Electronic device and use thereof  
The electronic device ( 100 ) comprises a semiconductor element ( 1 ) (e.g. a transistor), an encapsulation ( 5 ) and an electrically conductive layer ( 3 ) with a first and a second contact pad (...
7345366 Apparatus and method for testing component built in circuit board  
A multi-layered circuit board a built-in component including multiple terminals, at least one signal pad formed on a top surface of the multi-layered circuit board for signal transmission, each of...
7342320 Electronic component with semiconductor chips, electronic assembly composed of stacked semiconductor chips, and methods for producing an electronic component and an electronic assembly  
An electronic component includes a semiconductor chip with an active front face and a passive rear face, with contact connections and contact surfaces respectively being provided on the active...
7332816 Method of fabricating crossing wiring pattern on a printed circuit board  
A filet F is added to a portion constituting a corner portion C equal to or smaller than 90° in a crossing portion X of wiring patterns 58 b , 58 c and 58 d , and a wiring pattern 58 is...
7327042 Interconnection structure of electric conductive wirings  
Accumulating spaces for conductive particles are formed in gaps of wiring patterns for conductive wirings which are disposed on a surface of a supporting body. When interconnecting a pair of...
7327043 Two layer substrate ball grid array design  
A routing pattern for high speed signals for a package substrate. Electrically conductive bond fingers are disposed on a first surface of the package substrate. The first surface is adapted to...
7327039 Nanoparticle filled underfill  
The invention provides electronic articles and methods of making said articles. The electronic articles comprise an electronic component bonded and electrically connected to a substrate using an...
7327030 Apparatus and method incorporating discrete passive components in an electronic package  
An apparatus and method for incorporating discrete passive components into an integrated circuit package. A metal layer is formed over a surface of a substrate. A layer of photosensitive material...
7327018 Chip package structure, package substrate and manufacturing method thereof  
A package substrate for carrying a chip with a plurality of bumps thereon is provided. The package substrate includes a first substrate, and an interposer. The first substrate has a first circuit...
7323788 Semiconductor device and manufacturing method of them  
A semiconductor device which can meet the requirement for a further increase in pins, which multi-functionalization and faster operation would entail is to be provided. Bonding pads and bonding...
7323789 Multiple chip package and IC chips  
A clock output pad and a return clock receiving pad are disposed on a logic chip at a portion near a side of an integrated circuit chip and a portion near another side of the integrated circuit...
7321160 Multi-part lead frame  
A multi-part lead frame semiconductor device assembly is disclosed including a die bonded to a die paddle. A second lead frame including leads is superimposed and bonded onto the first lead frame....
7319272 Ball assignment system  
A pattern of contacts that includes high speed transmitter contacts disposed in a first portion of the pattern, where the high speed transmitter contacts are disposed in transmitter differential...
7317258 Thermal interface apparatus, systems, and fabrication methods  
An apparatus and system, as well as fabrication methods therefor, may include a unitary, substantially uniformly distributed transfer material coupled to a carrier material.
Matches 151 - 200 out of 1417 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >