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7557455 |
System and apparatus that reduce corrosion of an integrated circuit through its bond pads
A bond pad structure has a first conductive layer and an anti-reflective coating layer disposed on the first conductive layer. The first conductive layer includes first and second portions (which...
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RE40819 |
Semiconductor device with improved bond pads
A semiconductor device with improved bond pads. The semiconductor device includes bond pads electrically connected to an active circuit in the device and openings formed in the bonding surface of...
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7557453 |
Semiconductor device, method of manufacturing a semiconductor device and substrate to be used to manufacture a semiconductor device
A semiconductor device comprises a first electrode-lead having a first Au film, a first Ni film, a Cu film, a second Au film and a second Ni film stacked in order, a second electrode-lead having a...
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7554209 |
Semiconductor device having a metal plate conductor
The present invention provides a non-insulated type DC-DC converter having a circuit in which a power MOS•FET for a high side switch and a power MOS•FET for a low side switch are connected in...
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7554169 |
Semiconductor device and method of manufacturing the same
It is provided a contacting method when a plurality of films to be peeled are laminating. Reduction of total layout area, miniaturization of a module, weight reduction, thinning, narrowing a frame...
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7547977 |
Semiconductor chip having bond pads
In one embodiment, a semiconductor chip has one or more peripheral bond pads. The semiconductor chip comprises a semiconductor substrate having a cell region and a peripheral circuit region...
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7547961 |
IC card with bonding wire connections of different lengths
An IC card capable of reinforcing the prevention of the electrostatic damage without causing a rise in the cost of a semiconductor integrated circuit chip. The semiconductor integrated circuit chip...
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7547976 |
Electrode pad arrangement with open side for waste removal
A pad structure 100 includes an electrode pad (a first electrically conducting film 104 and a second electrically conducting film 110 ) and an insulating film provided over a peripheral region...
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7545031 |
Multipackage module having stacked packages with asymmetrically arranged die and molding
Semiconductor chip packages have die asymmetrically arranged on the respective substrates. Two such packages having complementary arrangements can be stacked, one inverted with respect to the...
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7545036 |
Semiconductor device that suppresses variations in high frequency characteristics of circuit elements
A semiconductor device includes a semiconductor substrate having a main surface, the main surface including a first and second areas formed with a high-frequency circuit element, and a third area...
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7541669 |
Semiconductor device package with base features to reduce leakage
A semiconductor device package comprises a container including a base and sidewalls. The base is configured to support a semiconductor device chip, and a lead frame extends through at least one of...
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7541683 |
Semiconductor integrated circuit device
A semiconductor integrated circuit device of improved wireability, fewer number of wiring layers and strengthened power supply includes a plurality of power pads placed on a semiconductor chip and...
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7541294 |
Semiconductor package and semiconductor package mounting method
To provide a semiconductor package mounting method, with excellent work efficiency, wherein the direction of a semiconductor package can be verified by a simple method before mounting. One corner...
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7541678 |
Printed wiring board, information processing apparatus, and method of manufacturing the printed wiring board
Disclosed is a printed wiring board comprising an insulating layer having a rectangular flat shape and provided with fibers in the layer, the direction of the fiber in the layer being almost...
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7538441 |
Chip with power and signal pads connected to power and signal lines on substrate
A semiconductor integrated circuit device is provided which comprises a semiconductor chip having wire bonding pads and a package encapsulating the semiconductor chip and connected via bonding...
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7538417 |
Semiconductor device with signal line having decreased characteristic impedance
A semiconductor device includes a semiconductor chip, electrodes pads, first and second insulating layers, first and second conductive patterns and external terminals. The electrode pads are formed...
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7538437 |
Infrared receiver chip
An infrared receiver chip is provided for installation in a standardized lead frame of an infrared receiver module having multiple contact areas for connection of associated function points of the...
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7538442 |
Semiconductor chip and semiconductor device
In the peripheral part of a semiconductor chip, third electrode pads for wire bonding and plate wiring and first electrode pads dedicated to wire bonding are provided. On the other hand, second...
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7535114 |
Integrated circuit devices including compliant material under bond pads and methods of fabrication
An integrated circuit device includes a die having an interconnect structure formed over a surface thereof. A volume of compliant material located within the interconnect structure underlies one or...
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7535087 |
Semiconductor device with lead frames
By disposing a rear surface of a first island 12 and a top surface of a second island 13 so as to at least partially overlap each other, a first semiconductor chip on the first island and a...
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7535112 |
Semiconductor constructions comprising multi-level patterns of radiation-imageable material
The invention includes a semiconductor construction having a wire bonding region associated with a metal-containing layer, and having radiation-imageable material over the metal-containing layer....
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7531899 |
Ball grid array package
An apparatus and method includes an integrated circuit disposed in a ball grid array (“BGA”) package having interconnects on at least one corner without signal assignments.
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7528495 |
Chip structure
A chip structure including a substrate, at least one chip bonding pad, a passivation layer, at least one compliant bump, and at least one redistribution conductive trace is provided. The substrate...
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7528491 |
Semiconductor components and assemblies including vias of varying lateral dimensions
Methods for forming vias are disclosed. The methods include providing a substrate having a first surface and an opposing, second surface. A first opening, a second opening, and a third opening are...
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7525181 |
Tape wiring substrate and tape package using the same
A tape wiring substrate may have dispersion wiring patterns. The dispersion wiring patterns may be provided between input/output wiring pattern groups to compensate for the intervals therebetween....
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7521276 |
Compliant terminal mountings with vented spaces and methods
A method of making chip assemblies includes providing an in-process assembly including a semiconductor wafer, a wafer compliant structure overlying a front surface of the wafer and cavities, and...
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7521797 |
Method of manufacturing substrate joint body, substrate joint body and electrooptical device
A method of manufacturing a substrate joint body by mounting a TFT on a wiring substrate includes a step of arranging an electrode pad of the wiring substrate and an electrode pad of the TFT at a...
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7521784 |
System for coupling wire to semiconductor region
A first device has a surface and includes a micrometer-scale or smaller geometry doped semiconductor region extending along the surface. A second device has a surface opposite the surface of the...
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7521781 |
Integrated circuit package system with mold clamp line critical area having widened conductive traces
An integrated circuit package system includes providing a substrate having a first plurality of conductive traces having a first width. An integrated circuit die is attached to the substrate. A...
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7518251 |
Stacked electronics for sensors
A stacked electronics module comprises a first layer including a first substrate having a front side and a backside, a first electrical interconnect layer disposed on the first substrate and a...
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7518211 |
Chip and package structure
The invention is directed to a chip comprising a substrate having a plurality of pads located thereon and a passivation layer located over the substrate, wherein the passivation layer has a...
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7518223 |
Semiconductor devices and semiconductor device assemblies including a nonconfluent spacer layer
A semiconductor device that includes at least one nonconfluent spacer layer on at least one surface thereof. The at least one nonconfluent spacer layer at least partially spaces the surface of the...
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7518239 |
Semiconductor device with substrate having penetrating hole having a protrusion
A semiconductor device includes a substrate, a semiconductor chip, a conductive member and an external electrode. A penetrating hole is formed in the substrate, the penetrating hole having an...
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7518227 |
Multiple die stack apparatus employing T-shaped interposer elements
Multiple integrated circuit devices in a stacked configuration that use a spacing element for allowing increased device density and increased thermal conduction or heat removal for semiconductor...
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7514796 |
Semiconductor chip capable of being laminated and a semiconductor device including the lamination of a plurality of semiconductor chips
To prevent short-circuit due to contact of bonding wires each other and to make a semiconductor device compact. A semiconductor chip with a rectangular main surface may comprise: a first side...
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7514798 |
Arrangement for the protection of three-dimensional structures on wafers
An electronic component includes a wafer and a number of bond pads disposed on the wafer. A number of functional 3-D structures are disposed on the wafer. Each functional 3-D structure includes a...
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7514800 |
Semiconductor device and wire bonding method therefor
A semiconductor device ( 10 ) that may have a wire bonding structure having reduced interference between bond wires and a path of a capillary has been disclosed. Semiconductor device ( 10 ) may...
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7514298 |
Printed wiring board for mounting semiconductor
A printed wiring board for mounting a semiconductor, which printed wiring board has a taper-shaped through hole connecting an upper surface circuit and a lower surface circuit, and/or an internal...
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7508082 |
Semiconductor device and method of manufacturing the same
There is provided a solution to the problem of the poor adhesion in the pad portion while inhibiting the dishing in the pad portion. An SiON film, which covers insulating areas and has an opening...
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7504719 |
Printed wiring board having a roughened surface formed on a metal layer, and method for producing the same
The present invention has for its object to provide a multilayer printed circuit board which is very satisfactory in facture toughness, dielectric constant, adhesion and processability, among other...
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7501709 |
BGA package with wiring schemes having reduced current loop paths to improve cross talk control and characteristic impedance
A Ball Grid Array (BGA) integrated circuit package having (i) an additional dedicated ground ring on the package substrate which provides a reduced area return current loop path to reduce wire bond...
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7501341 |
Interconnect array formed at least in part with repeated application of an interconnect pattern
An interconnect array formed at least in part using repeated application of an interconnect pattern is described. The interconnect pattern has at least ten interconnect locations. One of the ten...
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7501710 |
Semiconductor integrated circuit and method of manufacturing the same
A semiconductor integrated circuit ( 1 ) having an integrated circuit region ( 1 a ), and a plurality of I/O cells ( 6 ) each having an element formation region for external electrical connection...
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7501704 |
Integrated circuit chip with external pads and process for fabricating such a chip
An integrated circuit chip has a dielectric surface layer and, below this layer, internal pads. The chip is fabricated by producing multiplicities of vias made of an electrically conducting...
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7498679 |
Package substrate and semiconductor package using the same
A package substrate may have an improved surface structure for controlling the flow of an adhesive. The package substrate may have an upper surface and a lower surface covered with a passivation...
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7495327 |
Chip stacking structure
An efficient chip stacking structure is described that includes a leadframe having two surfaces to each of which can be attached stacks of chips. A chip stack can be formed by placing a chip active...
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7495296 |
Semiconductor integrated circuit device
The present invention relates to a layout of a multi-channel semiconductor integrated circuit and provides a layout of a semiconductor integrated circuit having ternary circuits in order to...
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7495326 |
Stacked electronic structures including offset substrates
An electronic device may include first, second, and third substrates wherein the second electronic substrate is between the first and second electronic substrates. A first electrical and mechanical...
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7495343 |
Pad over active circuit system and method with frame support structure
An integrated circuit and method of fabricating the same are provided. Included are an active circuit, and a metal layer disposed, at least partially, above the active circuit. Further provided is...
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7489035 |
Integrated circuit chip package having a ring-shaped silicon decoupling capacitor
A semiconductor package features a ring-shaped silicon decoupling capacitor that reduces simultaneous switching noise. The decoupling capacitor is fabricated on a substrate from silicon using a...
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