Matches 601 - 650 out of 1416 < 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 >
Match Document Document Title
6734504 Method of providing HBM protection with a decoupled HBM structure  
A semiconductor device that includes an integrated circuit and an HBM structure formed on different semiconductor substrates is provided. The HBM structure may include input or output or...
6734566 Recyclable flip-chip semiconductor device  
In a flip-chip type semiconductor device, a pad electrode and a passivation film are formed on a semiconductor substrate. An insulating resin layer is formed on the passivation film, and an opening...
6734570 Solder bumped substrate for a fine pitch flip-chip integrated circuit package  
A method of fabricating a solder bumped substrate for a flip-chip integrated circuit (IC) package is provided. The method includes the following steps. Providing a substrate material. Patterning a...
6730527 Chip and defect tolerant method of mounting same to a substrate  
A substrate is provided with a plurality of regions, at least one of which is operationally redundant. An integrated circuit to be placed onto the substrate has a plurality of functional units that...
6731014 Semiconductor package substrate, semiconductor package  
A semiconductor package substrate of the present invention includes a first wiring substrate which has an opening section for mounting a semiconductor chip, and a second wiring substrate which has...
6730989 Semiconductor package and method  
A semiconductor packaging arrangement, or module, includes a printed circuit board having an electrical interconnect thereon and a semiconductor package mounted to the printed circuit board. The...
6731013 Wiring substrate, semiconductor device and package stack semiconductor device  
A wiring substrate of the present invention includes a terminal section, provided on a first surface of an insulating substrate, for wire or flip-chip bondings; a land section, provided on the...
6727596 Semiconductor integrated circuit  
Bump areas for signals are spread on upper and lower positions with respect to Vdd and Vss lines in an I/O buffer. Thus, the direction of routing the lines from bumps for signals to the I/O buffers...
6727597 Integrated circuit device having C4 and wire bond connections  
An integrated circuit having a first plurality of wire bond pads located along a horizontal axis, a second plurality of wire bond pads located along a vertical axis, and a plurality of C4 pads...
6724092 Semiconductor device having a wiring pattern and method for manufacturing the same  
A semiconductor device has a wiring pattern formed by etching a conductive layer using a resist pattern as a mask. The semiconductor device includes a contact section and a wiring. The contact...
6720666 BOC BGA package for die with I-shaped bond pad layout  
Semiconductor die units for forming BOC BGA packages, methods of encapsulating a semiconductor die unit, a mold for use in the method, and resulting encapsulated packages are provided. In...
6717264 High density integrated circuit package  
A high-density integrated circuit package and a method for the same. The package includes a substrate having a plurality of bump pads and a plurality of conductive lines on the surface, wherein a...
6717238 Low-capacitance bonding pad for semiconductor device  
A low-capacitance bonding pad for a semiconductor device. A diffusion region is formed in a substrate, and a bonding pad is formed on the substrate and aligned with the diffusion region. The...
6717066 Electronic packages having multiple-zone interconnects and methods of manufacture  
To accommodate thermal stresses arising from different coefficients of thermal expansion (CTE) of a packaged or unpackaged die and a substrate, the package incorporates two or more different...
6717253 Assembly package with stacked dies and signal transmission plate  
An assembly package includes a substrate, a first die, at least one signal transmission plate, at least one second die, a plurality of conductive wires, and a molding compound. The first die is...
6713881 Semiconductor device and method of manufacturing same  
Object: To provide sufficient connection strength between the bonding pads and conductor wires in a wire bonding method. Means for Solution: The bonding pads 20 upon a semiconductor chip 18 ...
6713869 Wiring pattern of semiconductor device  
A semiconductor package of this invention comprises an electrode pad arranged on a semiconductor chip, a bonding wire, an end of which is coupled to the electrode pad, and a connection pad arranged...
6710459 Flip-chip die for joining with a flip-chip substrate  
A flip-chip package board having signal bump pads, power bump pads and ground bump pads grouped together into respective inner bump pad rows and sequentially laid down on one side of the group of...
6707145 Efficient multiple power and ground distribution of SMT IC packages  
An apparatus, comprising a substrate having a surface, comprising an array of electrical contacts, and a plurality of electrical planes, where the plurality of electrical planes are positioned...
6707143 Stacked semiconductor chips attached to a wiring board  
A semiconductor device includes: a wiring board; a first semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which is electrically connected...
6707164 Package of semiconductor chip with array-type bonding pads  
A package of a semiconductor chip with array-type bonding pads. The semiconductor chip has a plurality of bonding pads located about periphery of the chip, in which the semiconductor chip is...
6703286 Metal bond pad for low-k inter metal dielectric  
A method is provided whereby successive layers of bond pads can be created. A pattern is created in the preceding level of metal bond pad, a dielectric is deposited over this pattern, openings are...
6700188 Low-pin-count chip package having concave die pad and/or connections pads  
A low-pin-count chip package including a die pad for receiving a semiconductor chip and a plurality of connection pads electrically coupled to the semiconductor chip wherein the die pad and the...
6700208 Surface mounting substrate having bonding pads in staggered arrangement  
A surface mounting substrate is configured to surface mount a semiconductor element thereon, the semiconductor element having a plurality of protruding electrodes arranged in a staggered...
6686648 Electronic component with stacked semiconductor chips and method of producing the component  
The electronic component has semiconductor chips that are stacked on one another. On their active top sides, the chips having interconnects for rewiring to contact areas through contacts formed on...
6686666 Breaking out signals from an integrated circuit footprint  
Pads are arranged as an integrated circuit (IC) footprint, and are formed in a stackup that includes an insulating layer and multiple signal routing layers. The footprint has a polygonal shape....
6683323 Semiconductor chip  
To provide a semiconductor chip in which area occupied by TEG elements or area occupied by TEG-measuring electrode pads in the semiconductor chip can be reduced without reducing the number of TEG...
6683379 Semiconductor device with reinforcing resin layer  
A semiconductor device including a semiconductor substrate having a thickness of not more than 300 μm and a resin layer formed on a face thereof. A plurality of conductor sections formed in and...
6683387 Flip chip carrier package with adapted landing pads  
A carrier member is provided that has a plurality of landing pads thereon where at least one of the landing pads has a depression therein to hold at least one solder terminal of a device to be...
6680544 Flip-chip bump arrangement for decreasing impedance  
A bump arrangement of a flip-chip is disclosed. The bump arrangement comprises: a conductive bumps array formed at a core region of the flip-chip, a first ring of conductive bumps surrounding the...
6680543 Semiconductor integrated circuit and system  
A semiconductor integrated circuit 10 includes a semiconductor substrate 1 , an insulating layer 2 formed on the semiconductor substrate 1 , and a bonding pad 3 formed on the insulating...
6677522 Package for electronic component  
An electronic component such as a ceramic capacitor is coupled to a dielectric substrate package. Encapsulant material substantially surrounding the sides of the component, develops cracks therein,...
6674153 Semiconductor device utilizing pad to pad wire interconnection for improving detection of failed region on the device  
A semiconductor device has: an inner active region 3 including a first electronic circuit formed on a semiconductor substrate; an outer active region 4 positioned between the edges 2 a , 2 b ...
6670704 Device for electronic packaging, pin jig fixture  
A device ( 1,21,28, 36, 37, 86, 103, 121, 128 ) for electronic packaging, the device including a discrete solid body having a pair of opposing generally parallel major surfaces, the solid body...
6667546 Ball grid array semiconductor package and substrate without power ring or ground ring  
A ball grid array semiconductor package is proposed, wherein at least a chip is mounted on a substrate, and signal pads on the chip are electrically connected to signal fingers on the substrate by...
6667547 High current capacity semiconductor device package and lead frame with large area connection posts and modified outline  
A lead frame for a high power semiconductor device die has three external lead conductors, the outer two of which are reentrantly bent outwardly from the center of the lead frame. When the lead...
6667561 Integrated circuit capable of operating in multiple orientations  
An integrated circuit design is provided capable of operating in multiple insertion orientations. In particular, the inventive circuit design includes an integrated circuit package having a...
6664483 Electronic package with high density interconnect and associated methods  
An electronics package comprises an integrated circuit (IC) coupled to an IC substrate in a flip-chip ball grid array (FCBGA) configuration. The IC comprises a high density pattern of interconnect...
6661101 Semiconductor device  
There is provided a semiconductor device capable of properly processing RF signals even though the number of electrodes as well as terminals for external connection is large while pitches at which...
6657293 Chip scale package in which layout of wiring lines is improved  
A semiconductor device of the present invention includes: a semiconductor chip having an electrode at a periphery thereof, a wiring board having a first surface and a second surface, the first...
6657311 Heat dissipating flip-chip ball grid array  
A heat dissipating flip-chip Ball Grid Array (BGA) ( 10 ) including a substrate ( 12 ), a die ( 14 ), a first set of solder balls ( 16 ) coupling the die with the substrate, a thermal compound ( 20...
6657290 Semiconductor device having insulation layer and adhesion layer between chip lamination  
A semiconductor device includes a first semiconductor chip and a second semiconductor chip which are laminated on a substrate, wherein electrode terminals which are provided on each of the...
6650020 Resin-sealed semiconductor device  
The resin-sealed semiconductor device includes a die pad portion, a semiconductor element mounted on the die pad portion and having electrodes, a plurality of lead portions arranged with their...
6650014 Semiconductor device  
A semiconductor device has a plurality of bump electrodes for external connection arrayed two-dimensionally on the surface of a semiconductor chip where the desired elements and wirings are formed....
6649991 Image sensor semiconductor package  
A non-ceramic image sensor semiconductor package with improved moisture resistance, lower cost, higher reliability, and lower profile is provided. A semiconductor chip with a vision chip active...
6650008 Stacked semiconductor packaging device  
A stacked semiconductor packaging device consists of at least a stacked multi-chip device comprising a substrate. A first chip has a back surface faced towards the substrate and an active surface...
6650021 Recessed bond pad  
A recessed bond pad within an electronic device on a substrate, and associated method of fabrication. The electronic device includes N contiguous levels of interconnect metallurgy, with level N...
6650022 Semiconductor device exhibiting enhanced pattern recognition when illuminated in a machine vision system  
A bumped semiconductor device ( 10 ) exhibiting enhanced pattern recognition when illuminated in a machine vision system. The semiconductor device has a substantially coplanar array of solder bumps...
6646343 Matched impedance bonding technique in high-speed integrated circuits  
A method and an integrated circuit package support a high-speed integrated circuit operating at 10 GHz or higher switching speeds. The packaged integrated circuit has external terminals, a...
6646355 Structure comprising beam leads bonded with electrically conductive adhesive  
A new interconnection scheme is disclosed for a tape automated bonding (TAB) package, a flip chip package and an active matrix liquid crystal display (AMLCD) panel, where an electrically conducting...
Matches 601 - 650 out of 1416 < 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 >