Matches 151 - 200 out of 1477 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
Match Document Document Title
7446399 Pad structures to improve board-level reliability of solder-on-pad BGA structures  
The present invention is directed to a new bonding pad structure having a rugged contact interface that makes it more difficult for a crack to grow from the peripheral edge of the bonding pad. The...
7446396 Stacked integrated circuit leadframe package system  
A stacked integrated circuit leadframe package system including forming a leadframe, packaging a top integrated circuit on a one side of the leadframe, packaging a bottom integrated circuit on an...
7443042 Methods and apparatus for wire bonding with wire length adjustment in an integrated circuit  
An integrated circuit is wire bonded in a manner such that there is consistent RF performance from integrated circuit package to integrated circuit package. Bond distances within the integrated...
7443039 System for different bond pads in an integrated circuit package  
An integrated circuit package is provided with a substrate having first and second contact pads exposed through a passivation layer on the substrate. A first metallurgy layer is over the substrate....
7443043 Circuit device and method of manufacture thereof  
A circuit device 10 comprises a die pad 11 , bonding pads 12 , a circuit element 9 , affixed onto die pad 11 , and an insulating resin 14 , which seals die pad 11 , bonding pads 12 , and...
7443010 Matrix form semiconductor package substrate having an electrode of serpentine shape  
A matrix form semiconductor package substrate that has an electrode situated in-between a plurality of IC package substrates for providing electrical communication to conductive pads on the...
7443018 Integrated circuit package system including ribbon bond interconnect  
An integrated circuit package system including a ribbon bond interconnect is provided, having a semiconductor device with at least one pad thereon. An external connection is provided. A heavy...
7439612 Integrated circuit package structure with gap through lead bar between a die edge and an attachment point corresponding to a conductive connector  
In certain embodiments, a leadframe structure for forming one or more integrated circuit packages includes a number of adjacent substantially parallel lead bars adapted to receive a die associated...
7436074 Chip package without core and stacked chip package structure thereof  
A chip package without a core, including a patterned circuit layer, a chip, a solder mask, a molding compound and multiple outer terminals, is provided. The patterned circuit layer has a first...
7432585 Semiconductor device electronic component, circuit board, and electronic device  
A semiconductor device includes: a semiconductor substrate having an active face; a first electrode provided on or above the active face; an external connection terminal provided on or above the...
7432536 LED with self aligned bond pad  
A method is disclosed for attaching a bonding pad to the ohmic contact of a diode while reducing the complexity of the photolithography steps. The method includes the steps of forming a blanket...
7429703 Methods and apparatus for integrated circuit device power distribution via internal wire bonds  
An integrated circuit device comprising a die having a top surface with a peripheral region and an interior region surrounded by the peripheral region. Bond pads are disposed in the peripheral...
7429797 Electronic device and carrier substrate  
Consistent with an example embodiment, an electronic device comprises a semiconductor device, particularly an integrated circuit, and a carrier substrate with conductive layers on the first side...
7429786 Semiconductor package including second substrate and having exposed substrate surfaces on upper and lower sides  
A semiconductor package subassembly includes a die affixed to, and electrically interconnected with, a die attach side of a first package substrate, and a second substrate having a first side and a...
7429787 Semiconductor assembly including chip scale package and second substrate with exposed surfaces on upper and lower sides  
Semiconductor assemblies include a first package, each having at least one die affixed to, and electrically interconnected with, a die attach side of the first package substrate, and a second...
7425767 Chip structure with redistribution traces  
A semiconductor chip or wafer comprises a passivation layer and a circuit line. The passivation layer comprises an inorganic layer. The circuit line is over and in touch with the inorganic layer of...
7425758 Metal core foldover package structures  
Chip-scale packages and assemblies thereof and methods of fabricating such packages including Chip-On-Board, Board-On-Chip, and vertically stacked Package-On-Package modules are disclosed. The...
7425756 Semiconductor device and electronic device  
This invention provides a high frequency power module which is incorporated into a mobile phone and which incorporates high frequency portion analogue signal processing ICs including low noise...
7423334 Image sensor module with a protection layer and a method for manufacturing the same  
An image sensor module with a protection layer and a method for manufacturing the same includes a substrate with an upper surface and a lower surface, a chip is mounted on the upper surface of the...
7420280 Reduced stress under bump metallization structure  
An improved under bump structure for use in semiconductor devices is described. The under bump structure includes a passivation layer having a plurality of vias. The vias are positioned such that a...
7420283 Integration type semiconductor device and method for manufacturing the same  
A semiconductor device includes: a plurality of power MOS cells on a semiconductor substrate; a plurality of lead wires connecting to a source and a drain of each power MOS cell through a contact...
7420281 Stacked chip semiconductor device  
A stacked chip semiconductor device whose size is substantially reduced by high density packaging of two or more semiconductor chips. In the semiconductor device, four semiconductor chips are...
7420286 Reduced inductance in ball grid array packages  
Techniques are described for reducing inductance in ball grid array (BGA) packages for integrated circuits (ICs). The BGA package comprises a set of contacts disposed near an outer edge of the BGA...
7417295 Insulated gate semiconductor device and manufacturing method thereof  
Two metal electrode layers are provided. A first electrode layer is patterned with a minute separation distance according to an element region as in the case of the conventional case. Meanwhile, it...
7417324 Semiconductor device and method for manufacturing the same  
A semiconductor device is composed of a semiconductor chip, aluminum pads formed on the semiconductor chip, alloy ball bumps, which are formed on the aluminum pads, containing gold and Pd, and gold...
7417327 IC chip package with cover  
An IC (integrated circuit) chip package includes a substrate ( 2 ), a chip ( 3 ), a plurality of bonding wires ( 32 ), and a cover ( 5 ). The substrate has a top surface, a bottom surface, a...
7414313 Polymeric conductor donor and transfer method  
The present invention relates to a donor laminate for transfer of a conductive layer comprising at least one electronically conductive polymer on to a receiver, wherein the receiver is a component...
7414321 Wiring configuration for semiconductor component  
In a wiring configuration for a semiconductor component, an unused terminal is insulated from a third land via an insulating film, and thus no connecting member (solder) is required for the unused...
7414320 Semiconductor device and method of manufacturing same  
A semiconductor device having a first semiconductor element placed over a second semiconductor element, so that an edge of the first semiconductor element is not placed over a predetermined circuit...
7411294 Display device having misalignment detection pattern for detecting misalignment between conductive layer and insulating layer  
A display device includes a display panel, and the circuit substrate is separately formed and positioned different from the array substrate of the display panel and connected to the display panel....
7408260 Microelectronic assemblies having compliant layers  
A microelectronic assembly includes a microelectronic element such as a semiconductor chip or wafer having a first surface and contacts accessible at the first surface, a compliant layer overlying...
7408256 Integrated circuit chip module  
An integrated circuit chip module includes a first integrated circuit chip including a first power source pad for a first power voltage and an adjacent second power source pad for a second power...
7405467 Power module package structure  
A power module package structure is disclosed. The control circuits are fabricated on a circuit plate, instead of fabricating them directly on a main substrate. The fabrication cost is reduced...
7405109 Method of fabricating the routing of electrical signals  
A method for manufacturing a layered structure for routing electrical signals comprising the steps of providing a layout for the layered structure having an insulating layer with at least one...
7402904 Semiconductor device having wires that vary in wiring pitch  
A semiconductor device includes a first wiring layer having a first wiring pitch and a second wiring layer having a second wiring pitch that differs from the first wiring pitch. The device further...
7400036 Semiconductor chip package with a package substrate and a lid cover  
A semiconductor chip package includes a package substrate having a first bond pad pattern. A semiconductor chip resides on the package substrate. The semiconductor chip has a second bond pad...
7400032 Module assembly for stacked BGA packages  
Ball grid array packages that can be stacked to form highly dense components and the method for stacking ball grid arrays are disclosed. The ball grid array packages comprise flexible or rigid...
7397115 Folding chip planar stack package  
A folding chip planar stack package is realized by employing folding chips. The folding chip planar stack package includes a substrate, first and second semiconductor chips attached to an upper...
7397134 Semiconductor device mounted on and electrically connected to circuit board  
The invention provides a package type semiconductor device and a manufacturing method thereof where reliability is improved without increasing a manufacturing cost. A resin layer and a supporting...
7397137 Direct FET device for high frequency application  
A source mounted semiconductor device package is described which includes a semiconductor die having first and second opposing major surfaces, first and second major electrodes disposed on...
7397136 Multi-chip module and single-chip module for chips and proximity connectors  
A single-chip module is described. The module includes a first semiconductor die having a first surface and a second surface. The first semiconductor die is configured to communicate by capacitive...
7397121 Semiconductor chip with post-passivation scheme formed over passivation layer  
The invention provides a semiconductor chip comprising an interconnecting structure over said passivation layer. The interconnecting structure comprises a first contact pad connected to a second...
7397129 Interposers with flexible solder pad elements  
Various embodiments of an interposer for mounting a semiconductor die, as well as methods for forming the interposer, are disclosed. The interposer includes flexible solder pad elements that are...
7394161 Chip structure with pads having bumps or wirebonded wires formed thereover or used to be tested thereto  
A chip structure comprising a semiconductor substrate, a plurality of dielectric layers, a plurality of circuit layers, a passivation layer, a metal layer and at least a bump. The semiconductor...
7394164 Semiconductor device having bumps in a same row for staggered probing  
A semiconductor device has a plurality of bumps in a same row for staggered probing. The bumps in a same row are disposed on a chip and include a plurality of regular bumps and a plurality of...
7394148 Module having stacked chip scale semiconductor packages  
Stacked CSP (chip scale package) modules include a molded first (“top”) chip scale package having a molding side and a substrate side, and a second (“bottom”) package affixed to the...
7391107 Signal routing on redistribution layer  
A semiconductor wafer has a dielectric layer, a metal last layer, a passivation layer, and a redistribution layer. The metal last layer is formed over the dielectric layer, and the metal last layer...
7391100 Integrated circuit package for semiconductor devices having a reduced leadframe pad and an increased bonding area  
A semiconductor integrated circuit package having a leadframe ( 108 ) that includes a leadframe pad ( 103 a ) disposed under a die ( 100 ) and a bonding metal area ( 101 a ) that is disposed over...
7391101 Semiconductor pressure sensor  
A semiconductor pressure sensor can reduce the damage of bonding wires to increase their life time even under an environment in which the temperature and pressure change rapidly and radically. The...
7390699 Integrated circuit die connection methods and apparatus  
This invention generally relates to methods and apparatus for connecting to an integrated circuit die, in particular where the die includes both analogue/microwave radio frequency (rf) circuitry...
Matches 151 - 200 out of 1477 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >