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7122403 |
Method of interconnecting die and substrate
A low resistance package-to-die interconnect scheme for reduced die stresses includes a relatively low melting temperature and yield strength solder on the die and a relatively higher melting...
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7122907 |
Interposer substrate and wafer scale interposer substrate member for use with flip-chip configured semiconductor dice
A method and apparatus for increasing the integrated circuit density in a flip chip semiconductor device assembly and decreasing the time for dielectrically filling such assembly using less...
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7122401 |
Area array type semiconductor package fabrication method
An area array type semiconductor package includes a plurality of conductive media such as solder bumps or solder balls, attached to respective bond pads of a chip. The conductive media act as...
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7122895 |
Stud-cone bump for probe tips used in known good die carriers
A method of forming a membrane for use in conjunction with a semiconductor carrier and the membrane which includes an electrically insulating substrate and an interconnect pattern formed on the...
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7122882 |
Low cost power MOSFET with current monitoring
A semiconductor integrated circuit package having a common source current sensing circuit includes a main die having an integrated circuit, the main die including a source bonding pad and a gate...
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7119372 |
Flip-chip light emitting diode
A flip chip light emitting diode die ( 10, 10′, 10 ″) includes a light-transmissive substrate ( 12, 12′, 12 ″) and semiconductor layers ( 14, 14′, 14 ″) that are selectively patterned...
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7120069 |
Electronic circuit package
An electronic apparatus which includes a wiring substrate which includes wiring conductors, and a plurality of semiconductor bare chips that are formed on the wiring substrate. The semiconductor...
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7119445 |
Electronic component and semiconductor device, method of fabricating the same, circuit board mounted with the same, and electronic appliance comprising the circuit board
An integrated type semiconductor device that is capable of reducing cost or improving the reliability of connecting semiconductor chips together or chips to a circuit board. One embodiment of such...
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7116001 |
Bumped die and wire bonded board-on-chip package
An apparatus for making a semiconductor assembly and, specifically, interconnecting a semiconductor die to a carrier substrate. The carrier substrate includes a first surface and a second surface...
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7115990 |
Bumped die and wire bonded board-on-chip package
An apparatus for making a semiconductor assembly and, specifically, interconnecting a semiconductor die to a carrier substrate. The carrier substrate includes a first surface and a second surface...
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7117467 |
Methods for optimizing package and silicon co-design of integrated circuit
The present invention is directed to methods for optimizing package and silicon co-design of an integrated circuit. A composite bump pattern for an integrated circuit is created based on a first...
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7112882 |
Structures and methods for heat dissipation of semiconductor integrated circuits
Structures and methods for semiconductor integrated circuits with respect to heat dissipation are provided. The structure comprises a die having a first surface and a second surface. The first...
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7112880 |
Depopulation of a ball grid array to allow via placement
The present invention provides an apparatus and methods for the functionality of an integrated circuit. An exemplary embodiment according to an aspect of the present invention includes a ball grid...
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7112883 |
Semiconductor device with temperature control mechanism
A semiconductor device is provided, the semiconductor device including a semiconductor chip having a first metal heat-conductive medium in the inside thereof, a substrate having a second metal...
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7112887 |
Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
An electronic assembly is assembled by stacking two or more integrated circuit dies on top of one another. Prior to singulation, an opening is laser-drilled into an upper die, and subsequently...
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7112873 |
Flip chip metal bonding to plastic leadframe
A plastic substrate can be provided and thereafter a plurality of metal-to-metal connections can be ultrasonically bonded to the plastic substrate. One or more dies and a plurality of conductive...
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7105931 |
Electronic package and method
An electronic package substrate for an electronic package that includes an adhesive bonding member having two planar surfaces and an orifice there through for receiving a chip and a circuitized...
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7105933 |
Semiconductor integrated circuit device and manufacturing method of the same
To provide a semiconductor device which can be down-sized and integrated to a high degree. A semiconductor device including a rewiring mixedly includes an input/output (I/O) cell connected to a...
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7105860 |
Flip chip light-emitting diode package
A flip chip light-emitting diode package comprising a Schottky diode group, a light-emitting diode and a plurality of bumps is provided. The Schottky diode group comprises a plurality of Schottky...
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7105926 |
Routing scheme for differential pairs in flip chip substrates
A flip chip substrate is provided, which includes a plurality of conductive layers, including a top layer and a bottom layer. A first plurality of contacts, including first and second contacts...
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7105930 |
Semiconductor substrates including I/O redistribution using wire bonds and anisotropically conductive film, methods of fabrication and assemblies including same
Methods and apparatus for eliminating wire sweep and shorting while avoiding the use of under-bump metallization and high cost attendant to the use of conventional redistribution layers. An...
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7105920 |
Substrate design to improve chip package reliability
A substrate design to improve chip package reliability is provided. The chip package includes a substrate having a ceramic layer formed in a recess. A die is attached to the substrate on the...
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7102230 |
Circuit carrier and fabrication method thereof
A circuit carrier adapted for a pin grid array (PGA) package is disclosed. The circuit carrier comprises a substrate, at least one pin pad, at least one solder mask layer, at least one solder...
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7102221 |
Memory-Module with an increased density for mounting semiconductor chips
The invention is intended to increase the density for mounting the semiconductor chips on a memory-module, to increase the capacity of the memory-module, and to realize the memory-module capable of...
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7102240 |
Embedded integrated circuit packaging structure
An embedded IC packaging structure is disclosed. The embedded IC packaging structure allows a micro-electro-mechanical system (MEMS) having a great number of electrodes to be bonded to another...
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7100814 |
Method for preparing integrated circuit modules for attachment to printed circuit substrates
A method of preparing an integrated circuit module for attachment to a PC substrate. At least one uncased semiconductor die is affixed to a TAB tape frame having concentrically arranged an outer...
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7102239 |
Chip carrier for semiconductor chip
A chip carrier for a semiconductor chip is provided. A plurality of solder pads for bump soldering are formed on a chip mounting surface of the chip carrier, to allow a flip chip to be mounted and...
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7098543 |
Flip-chip packaged SMD-type LED with antistatic function and having no wire bonding
A flip-chip packaged SMD-type (surface-mount device) light emitting diode is provided. The light emitting diode chip is packaged in flip chip packages and is connected with an electrostatic...
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7098526 |
Bumped IC, display device and electronic device using the same
A driver IC, which is mounted on an active matrix substrate by means of COG, is provided. The driver IC includes an input-output circuit, an internal circuit region having a plurality of internal...
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7098542 |
Multi-chip configuration to connect flip-chips to flip-chips
A semiconductor structure includes a carrier having a cavity formed in a top portion thereof, and a plurality of conductive contacts formed on a top surface of the carrier and positioned around the...
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7098540 |
Electrical interconnect with minimal parasitic capacitance
The invention discloses an electrical interconnect with minimal parasitic capacitance. In one embodiment, an apparatus comprises a semiconductor substrate, and first and second support structures...
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7098541 |
Interconnect method for directly connected stacked integrated circuits
A method and related configuration for stacking and interconnecting multiple identical integrated circuit semiconductor die. A die designed in accordance with the present invention can be directly...
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7095621 |
Leadless leadframe electronic package and sensor module incorporating same
A leadless optical electronic package includes a lead frame having a die-attach pad and a plurality of leadless connection pads encapsulated in and extending through an encapsulation defining a...
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7095107 |
Ball assignment schemes for integrated circuit packages
The present disclosure is directed to ball assignment schemes for ball grid array packages in integrated circuits with increased signal count. The ball assignment scheme includes an array of...
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7095117 |
Semiconductor device and an electronic device
A semiconductor device has a reduced number of external power terminals and is scaled down while suppressing power noise, and an electronic device is efficiently equipped with a bypass condenser. A...
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7091619 |
Semiconductor device, semiconductor package, electronic device, electronic apparatus, and manufacturing methods of semiconductor device and electronic device
A method is provided to enhance the connection reliability in three-dimensional mounting while considering the warping of packages. Opening diameters of the openings provided corresponding to...
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7091608 |
Chip package
The chip package comprising a package substrate, a circuit layer, a chip and at least one conductive wire is provided. The circuit layer is disposed on a first surface of the substrate, and extends...
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7091620 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings...
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7087996 |
Etchant formulation for selectively removing thin films in the presence of copper, tin, and lead
The invention relates to a ball-limiting metallurgy (BLM) etching system and process. The BLM stack is provided for an electrical device that contains an aluminum layer disposed upon a metal first...
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7088008 |
Electronic package with optimized circuitization pattern
An electronic package, such as a chip carrier, with an optimized circuit pattern having a circuitized substrate with a first and second circuit pattern is provided. The circuitized substrate...
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7086147 |
Method of accommodating in volume expansion during solder reflow
Solder balls such as, low melt C4 solder balls, undergo volume expansion during reflow, such as may occur during attachment of chip modules to a PCB. Where the solder balls are encapsulated,...
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7084011 |
Forming a chip package having a no-flow underfill
A method of forming an underfilled chip package is provided. No-flow underfill material is deposited over a surface of a package substrate to form an underfill region. A die having a plurality of...
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7084513 |
Semiconductor device having a plurality of semiconductor chips and method for manufacturing the same
A semiconductor device includes a first semiconductor chip ( 5 ) having a first terminal ( 7 ) on one surface, a second semiconductor chip ( 1 a ) which is larger than the first semiconductor chip...
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7084517 |
Semiconductor device connecting structure, liquid crystal display unit based on the same connecting structure, and electronic apparatus using the same display unit
A semiconductor device connecting structure is provided for connecting a semiconductor IC to a substrate. A bonding layer is placed between the substrate and the semiconductor IC to accomplish...
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7081678 |
Multi-chip package combining wire-bonding and flip-chip configuration
A multi-chip package combining wire-bonding and flip-chip configuration includes a plurality of chips, a substrate and a molding compound. Chip(s) with wire-bonding type and a flip-chip type...
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7078819 |
Microelectronic packages with elongated solder interconnections
A soldered assembly for a microelectronic element includes a microelectronic element, solder columns extending from a surface of the microelectronic element and terminals connected to distal ends...
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7075177 |
Semiconductor chip package
A semiconductor chip package is formed by a first semiconductor chip and a second semiconductor chip, which have electrodes for wiring at surfaces thereof, being integrated and mounted in a state...
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7075184 |
Semiconductor device and manufacturing method, circuit board and electronic device thereof
The invention enhances the reliability of a semiconductor device. A semiconductor device includes: a semiconductor substrate that includes an active element region, an integrated circuit having an...
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7075180 |
Method and apparatus for applying body bias to integrated circuit die
In some embodiments, a method includes providing an integrated circuit (IC) die in a package. The IC die may have a metal layer on a back surface of the IC die. The method may also include applying...
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7071572 |
Pre-back-grind and underfill layer for bumped wafers and dies
Multi-purpose planarizing/back-grind/pre-under-fill arrangements for bumped wafers and dies, in which a planarizing coating provides improved and continued surface protection to the circuit surface...
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