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7268434 Semiconductor device and method of manufacturing the same  
There is disclosed a semiconductor device comprising at least one first insulating film provided above a substrate, being formed with at least one first recess having a first width, and being...
7268069 Method of fabricating semiconductor device having multilayer wiring structure  
A method of fabricating a semiconductor device includes forming a lower wiring layer on a semiconductor substrate, forming an interlayer insulating film on the lower wiring layer, layer, forming a...
7268408 Wiring board, method for manufacturing wiring board and electronic component using wiring board  
A wiring board which can realize a small and thin passive component such as solid condenser, resistor, coil, transistor or so on is provided. A wiring board which forms an electronic component by...
7268420 Semiconductor device having layered chips  
A semiconductor device includes an interface chip and a plurality of DRAM chips consecutively layered on the interface chip. A plurality of source electrodes, a plurality of ground electrodes, and...
7268432 Interconnect structures with engineered dielectrics with nanocolumnar porosity  
A method for forming an interconnect structure with nanocolumnar intermetal dielectric is described involving the construction of an interconnect structure using a solid dielectric, and introducing...
7268433 Semiconductor device  
A wiring layer is provided on a semiconductor substrate and extends in a predetermined direction. An external connection electrode terminal is provided on the wiring layer through a plurality of...
7265448 Interconnect structure for power transistors  
An integrated circuit according to the present invention includes first, second and third plane-like metal layers. A first transistor has a first control terminal and first and second terminals....
7262505 Selective electroless-plated copper metallization  
Structures and methods are provided which include a selective electroless copper metallization. The present invention includes a novel methodology for forming copper vias on a substrate, including...
7262500 Interconnection structure  
In a metal film production apparatus, a copper plate member is etched with a Cl 2 gas plasma within a chamber to form a precursor comprising a Cu component and a Cl 2 gas; and the temperatures of...
7262128 Method of forming multilayer interconnection structure, and manufacturing method for multilayer wiring boards  
Method of forming a multilayer interconnection structure that includes a contact hole for reliably connecting between layers, without damaging a substrate. A column shaped mask material is formed...
7259464 Vertical twist scheme for high-density DRAMs  
An interconnection array subunit and method for forming the interconnection array subunit are provided, the interconnection array subunit including a first pair of line conductors in first and...
7256070 Substrate-based housing component with a semiconductor chip  
The invention, which relates to an electronic component with a semiconductor chip, which is connected to a carrier substrate and surrounded by a housing, is based on presenting a substrate-based,...
7256497 Semiconductor device with a barrier layer and a metal layer  
This invention provides a semiconductor device that can minimize deterioration of electric characteristics of the semiconductor device while minimizing the amount of etching required. In the...
7256502 Metal interconnections for semiconductor devices including a buffer layer on a trench sidewall  
A metal interconnection for an integrated circuit device is fabricated by forming a trench in an integrated circuit substrate and a via hole beneath a portion of the trench. The trench includes a...
7256496 Semiconductor device having adhesion increasing film to prevent peeling  
A semiconductor device includes at least one semiconductor constructing body provided on one side of a base member, and having a semiconductor substrate and a plurality of external connecting...
7253525 Semiconductor device including contact holes between adjacent conductor patterns and method for fabricating the same  
The semiconductor device comprises a semiconductor substrate 10, a conducting film 20 formed on the semiconductor substrate 10 and including two conductor patterns adjacent to each other; an...
7253519 Chip packaging structure having redistribution layer with recess  
A chip structure comprising a chip, a redistribution layer, a second passivation layer and at least a bump is provided. The chip has a first passivation layer and at least a bonding pad. The first...
7253520 CSP semiconductor device having signal and radiation bump groups  
A semiconductor device comprises a semiconductor chip which has a first surface, a pad which is formed directly on the first surface, an oxide film which is formed on the first surface, an...
7253526 Semiconductor packaging substrate and method of producing the same  
A semiconductor packaging substrate and a process for producing the same is disclosed. An internal circuit is formed by lamination. Then, external circuit is formed on the internal circuit by...
7253527 Semiconductor chip production method, semiconductor device production method, semiconductor chip, and semiconductor device  
A semiconductor chip production method including the steps of: forming a front side recess in a semiconductor substrate; depositing a metal material in the front side recess to form a front side...
7250681 Semiconductor device and a method of manufacturing the semiconductor device  
A semiconductor device includes first level wires; a low-dielectric constant film on the first level wires; first flat vias embedded in the low-dielectric constant film connected to the first level...
7250683 Method to solve via poisoning for porous low-k dielectric  
A method of forming a via in a low-k dielectric material and without the attendant via poisoning problem, or a dual damascene structure formed in the same dielectric and without the same problem...
7250679 Semiconductor device and method for fabricating the same  
The semiconductor device comprises a lower interconnection part 12 which is formed on a silicon substrate 10 and includes an inter-layer insulation film 36 formed of a low-k film 32 and a...
7250327 Silicon die substrate manufacturing process and silicon die substrate with integrated cooling mechanism  
In one embodiment a method is provided. The method comprises inserting a first end of a P-type semiconductor pin in a first through hole via in a substrate; inserting a first end of an N-type...
7247948 Semiconductor device and method for fabricating the semiconductor device  
A semiconductor device has a semiconductor substrate, at least a first and second rewiring device on a first surface of the semiconductor substrate for the provision of an electrical...
7247943 Integrated circuit with at least one bump  
In an integrated circuit ( 1 ) having a substrate ( 3 ) and having a signal-processing circuit ( 4 ) which is produced at a surface ( 8 ) of the substrate ( 3 ), there is provided on the substrate...
7247897 Conductive line for a semiconductor device using a carbon nanotube including a memory thin film and semiconductor device manufactured  
In a method of forming a conductive line for a semiconductor device using a carbon nanotube and a semiconductor device manufactured using the method, the method includes activating a surface of an...
7247939 Metal filled semiconductor features with improved structural stability  
A method for forming a metal filled semiconductor feature with improved structural stability including a semiconductor wafer having an anisotropically etched opening formed through a plurality of...
7245019 Semiconductor device with improved wiring arrangement utilizing a projecting portion and a method of manufacturing the same  
In a method of manufacturing a semiconductor device having a first wiring extending in a first direction and a second wiring connected to the first wiring through a connection and extending in a...
7245022 Semiconductor module with improved interposer structure and method for forming the same  
Under the present invention, a semiconductor chip is electrically connected to a substrate (e.g., organic, ceramic, etc.) by an interposer structure. The interposer structure comprises an...
7242094 Semiconductor device having capacitor formed in multilayer wiring structure  
A semiconductor device having a capacitor formed in a multilayer wiring structure, the semiconductor device comprising a multilayer wiring structure including a plurality of wiring layers formed on...
7242098 Barrier film integrity on porous low k dielectrics by application of a hydrocarbon plasma treatment  
A method for treating a dielectric material using hydrocarbon plasma is described, which allows for thinner films of barrier material to be used to form a robust barrier.
7242102 Bond pad structure for copper metallization having increased reliability and method for fabricating same  
According to one exemplary embodiment, a structure in a semiconductor die comprises a metal pad situated in an interconnect metal layer, where the metal pad comprises copper. The structure further...
7239002 Integrated circuit device  
In a temperature sensor section of a semiconductor integrated circuit device, first vias of tungsten are formed at the topmost layer of a multi-layer wiring layer and pads of titanium are provided...
7239019 Selectively converted inter-layer dielectric  
An inter-layer dielectric structure and method of making such structure are disclosed. A composite dielectric layer, initially comprising a porous matrix and a porogen, is formed. Subsequent to...
7235884 Local control of electrical and mechanical properties of copper interconnects to achieve stable and reliable via  
The present invention is a novel method whereby voids or solid opens at the bottom of via can be avoided without drastically altering the resistivity or parasitic capacitances of the whole metal...
7233073 Semiconductor device and method for fabricating the same  
After forming a hole in an insulating film, a first tungsten film is formed over the wall and bottom surfaces of the hole. Then, a second tungsten film is formed by using the first tungsten film as...
7233063 Borderless contact structures  
A borderless contact structure and method of fabricating the structure, the method including: (a) providing a substrate; (b) forming a polysilicon line on the substrate, the polysilicon line having...
7229913 Stitched micro-via to enhance adhesion and mechanical strength  
A method for forming a via in an integrated circuit packaging substrate includes embedding an interfacial adhesion layer at a base of a via, and heating the materials at the base of the via....
7230337 Semiconductor device including ladder-shaped siloxane hydride and method for manufacturing same  
The present invention reduces the effective dielectric constant of the interlayer insulating film while inhibiting the decrease of the reliability of the semiconductor device, which otherwise is...
7230318 RF and MMIC stackable micro-modules  
A new method to form shielded vias with microstrip ground plane in the manufacture of an integrated circuit device is achieved. The method comprises, first, providing a substrate. The substrate is...
7230335 Inspection methods and structures for visualizing and/or detecting specific chip structures  
The present invention provides inspection methods and structures for facilitating the visualization and/or detection of specific chip structures. Optical or fluorescent labeling techniques are used...
7227256 Die-up ball grid array package with printed circuit board attachable heat spreader  
An electrically and thermally enhanced die-up tape substrate ball grid array (BGA) package and die-up plastic substrate BGA package are described. A substrate that has a first surface and a second...
7224060 Integrated circuit with protective moat  
A method of manufacturing an integrated circuit provides a substrate having a semiconductor device, and includes forming an intermetal dielectric layer over the substrate and the semiconductor...
7224068 Stable metal structure with tungsten plug  
In the preferred embodiment, a thick regular-k dielectric is formed on a substrate. A tungsten plug is formed in the thick regular-k dielectric. The thick regular-k dielectric is recessed and a...
7224064 Semiconductor device having conductive interconnections and porous and nonporous insulating portions  
A semiconductor device and manufacturing method, wherein the semiconductor device has a semiconductor substrate on which a plurality of elements constituting a logic type device have been formed; a...
7224046 Multilayer wiring board incorporating carbon fibers and glass fibers  
A multilayer wiring board (X 1 ) comprises a core portion ( 100 ) and out-core wiring portion ( 30 ). The core portion ( 100 ) comprises a carbon fiber reinforced portion ( 10 ) composed of a...
7224069 Dummy structures extending from seal ring into active circuit area of integrated circuit chip  
An integrated circuit chip is provided, which includes an active circuit area, a seal ring structure, and a first dummy structure. The seal ring structure is formed at least partially around the...
7222776 Printed wiring board and manufacturing method therefor  
A printed wiring board has a circuit substrate 6 having a conductor circuit 5 and a through hole 60, and also has a joining pin 1 inserted into the through hole. The joining pin is...
7221050 Substrate having a functionally gradient coefficient of thermal expansion  
A substrate and a method of making a substrate having a functionally gradient coefficient of thermal expansion are described herein. A system having a silicon die, an organic package substrate, and...