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7317255 Reliable printed wiring board assembly employing packages with solder joints  
An exemplary assembly comprises a printed wiring board having a first surface, and a package including a plurality of solder joints, such as solder balls, on one surface of the package. An anchor...
7315072 Semiconductor device capable of suppressing current concentration in pad and its manufacture method  
An interlayer insulating film is formed on a semiconductor substrate. An intra-layer insulating film is formed on the interlayer film. A recess is formed through the intra-layer film. The recess...
7315084 Copper interconnection and the method for fabricating the same  
A copper interconnection where holes in the vicinity of an interface are reduced to lower contribution of interface diffusion to Cu the EM, increase a lifetime, and simultaneously increase...
7312530 Semiconductor device with multilayered metal pattern  
A semiconductor device comprises a first insulating film formed on a semiconductor substrate, a first metal pattern formed on the first insulating film, a second insulating film formed on the first...
7312532 Dual damascene interconnect structure with improved electro migration lifetimes  
A dual damascene interconnect structure is formed by patterning a first dielectric to form a metal line. A second dielectric is disposed on the first dielectric and patterned to form a via. The...
7312523 Enhanced via structure for organic module performance  
A circuit board comprises a resin-filled plated (RFP) through-hole; a dielectric layer over the RFP through-hole; a substantially circular RFP cap in the dielectric layer and connected to an upper...
7309922 Lower substrate, display apparatus having the same and method of manufacturing the same  
In a lower substrate, a display apparatus having the lower substrate and a method of manufacturing the lower substrate, the lower substrate includes a pixel area and a circuit area. An image is...
7309921 Semiconductor device  
Leakage current generated in a PN junction diode is reduced, and charge-up current caused by plasma treatment in formation of wiring connected to the PN junction diode is controlled. An N + region...
7309917 Multilayer board and a semiconductor device  
Preparing a bottom grounding layer eliminates grounding pins, thereby the number of signal pins can be increased in a multilayer board that includes a grounding layer, a signal layer, a power...
7307348 Semiconductor components having through wire interconnects (TWI)  
A semiconductor component includes a semiconductor substrate having a substrate contact, and a through wire interconnect (TWI) bonded to the substrate contact. The through wire interconnect (TWI)...
7304390 Anisotropic conductive sheet and manufacture thereof  
An anisotropic conductive sheet manufactured through improved manufacturing steps and a method of manufacturing the same. Conductive portions are unevenly arranged in a nonconductive elastomer...
7303987 Contact structure of a wires and method manufacturing the same, and thin film transistor substrate including the contact structure and method manufacturing the same  
In a method of fabricating a thin film transistor array substrate for a liquid crystal display, a gate line assembly is formed on a substrate with a chrome-based under-layer and an aluminum...
7304389 Semiconductor device and supporting plate  
A semiconductor device includes a semiconductor element, a resin substrate where the semiconductor element is mounted, and a supporting plate configured to support the resin substrate. A first gas...
7301237 Semiconductor device  
An etching stopper film is formed on an interlayer insulating film. A conductive layer is formed on the etching stopper film. An etching stopper film is formed to cover the conductive layer. An...
7301236 Increasing electromigration lifetime and current density in IC using vertically upwardly extending dummy via  
An integrated circuit with increased electromigration lifetime and allowable current density and methods of forming same are disclosed. In one embodiment, an integrated circuit includes a...
7300860 Integrated circuit with metal layer having carbon nanotubes and methods of making same  
A method of fabricating an integrated circuit comprises forming or providing a solution containing carbon nanotubes and forming a metal layer utilizing the solution.
7301240 Semiconductor device  
A semiconductor device is disclosed, which includes at least two layers superposed on each other in a stacking direction above a substrate, each of the layers including an insulating film a...
7297998 Semiconductor devices having a buried and enlarged contact hole and methods of fabricating the same  
According to embodiments of the invention, a bit line interlayer insulating layer is placed over a semiconductor substrate. Two adjacent bit line patterns are placed in parallel on the bit line...
7298050 Semiconductor device, method of manufacturing the same, capacitor structure, and method of manufacturing the same  
A semiconductor device is disclosed that includes an interposer and a semiconductor chip. The interposer includes a Si substrate; multiple through vias provided through an insulating material in...
7294921 System-on-a-chip with multi-layered metallized through-hole interconnection  
The present invention is directed to a high-performance system on a chip which uses multi-layer wiring/insulation through-hole interconnections to provide short wiring and controlled low-impedance...
7294935 Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide  
Semiconducting devices, including integrated circuits, protected from reverse engineering comprising metal traces leading to field oxide. Metallization usually leads to the gate, source or drain...
7294907 Solid-state imaging device and method for manufacturing the same  
A solid-state imaging device includes a housing having a resin-molded base and ribs; metal lead pieces embedded in the housing, the metal lead pieces each having an inner terminal portion facing an...
7291922 Substrate with many via contact means disposed therein  
A substrate having many via contact means disposed therein. Each of the via contact means is composed of a via hole, as a through-hole, formed in the substrate, a metal film disposed on the inner...
7291904 Downsized package for electric wave device  
A package substrate includes signal pads provided on a main surface of the package substrate, footpads provided on a backside of the package substrate, and a sealing electrode provided on the main...
7291875 Semiconductor device with double barrier film  
A semiconductor device comprising a first insulation layer, a second insulation layer, a first barrier film, a second barrier film, a diffusion layer. The device further comprises an upper contact...
7291908 Quad flat no-lead package structure and manufacturing method thereof  
The present invention provides a QFN package structure, comprising a chip carrier and at least a chip. The chip is disposed on the top surface of the chip carrier, while the back surface of the...
7288847 Assembly including a circuit and an encapsulation frame, and method of making the same  
An assembly for a circuit board includes a substrate, at least one circuit component formed on the substrate, and a frame. The frame comprises a first substantially planar surface attached to the...
7288464 MEMS packaging structure and methods  
A MEMS article is made by forming a MEMS device on a first substrate, providing a second substrate, depositing a layer of etchable dielectric material, forming at least one lateral post-bond...
7288792 Method of manufacturing semiconductor device, method of manufacturing electronic apparatus, semiconductor device, and electronic apparatus  
Exemplary embodiments of the present invention are intended to provide a semiconductor device that can readily address or achieve high integration. Exemplary embodiments provide a semiconductor...
7285863 Pad structures including insulating layers having a tapered surface  
Embodiments include a semiconductor device comprising: a pad formed on an insulating layer and having an electric connection region with external components; and a protective insulating layer which...
7285867 Wiring structure on semiconductor substrate and method of fabricating the same  
A semiconductor device includes a semiconductor substrate having a plurality of connecting pads on one surface, an insulating film formed on one surface of the semiconductor substrate. The...
7285814 Dynamic random access memory circuitry and integrated circuitry  
A method of forming a conductive contact to a conductive structure includes forming a conductive structure received within and projecting outwardly from a first insulative material. A second...
7285850 Support elements for semiconductor devices with peripherally located bond pads  
A support structure for a semiconductor device with peripherally disposed contacts includes a support substrate and at least one conductive column protruding from the support substrate. The at...
7282648 Capacitor-embedded PCB having blind via hole and method of manufacturing the same  
The present invention relates to a capacitor-embedded PCB and a method of manufacturing the same. The capacitor-embedded PCB includes a dielectric layer, a lower electrode layer formed under the...
7282802 Modified via bottom structure for reliability enhancement  
The present invention provides an interconnect structure that can be made in the BEOL which exhibits good mechanical contact during normal chip operations and does not fail during various...
7282784 Methods of manufacture of a via structure comprising a plurality of conductive elements and methods of forming multichip modules including such via structures  
A method of forming a multiconductor via includes forming at least one seed layer in at least one through-hole of a substrate, selectively patterning the seed layer to form a plurality of laterally...
7282803 Integrated electronic circuit comprising a capacitor and a planar interference inhibiting metallic screen  
An electronic circuit includes a substrate. A capacitor and at least one semiconductor component are supported by a surface of the substrate. A substantially planar screen, oriented parallel to the...
7279750 Semiconductor device incorporating a semiconductor constructing body and an interconnecting layer which is connected to a ground layer via a vertical conducting portion  
A semiconductor device includes metal foil to which a ground potential is applied, at a semiconductor constructing body provided on the metal foil and having a semiconductor substrate and a...
7279788 Device for establishing non-permanent electrical connection between an integrated circuit device lead element and a substrate  
A spring contact for establishing electrical contact between a lead element of an IC device and a substrate. The spring contact generally comprises a contact portion and a base portion. The contact...
7279771 Wiring board mounting a capacitor  
In a capacitor-mounted wiring board, a plurality of wiring layers each patterned in a required shape are stacked with insulating layers interposed therebetween and are connected to each other via...
7279776 Method of manufacturing semiconductor device and semiconductor device  
A silicon substrate has a protective film formed on each side. A semiconductor surface opening not smaller than a given region is formed by removing the protective film. A through-hole having an...
7275316 Method of embedding passive component within via  
A method of forming a device associated with a via includes forming an opening or via, and forming at least a pair of conducting paths within the via. Also disclosed is a via having at pair of...
7276786 Stacked board-on-chip package having mirroring structure and dual inline memory module on which the stacked board-on-chip packages are mounted  
Embodiments of the invention include a stacked board-on-chip (BOC) package having a mirroring structure and a dual inline memory module (DIMM) on which the stacked BOC package is mounted. A bottom...
7276794 Junction-isolated vias  
A process for forming a junction-isolated, electrically conductive via in a silicon substrate and a conductive apparatus to carry electrical signal from one side of a silicon wafer to the other...
7276797 Structure and method for fabricating a bond pad structure  
A structure and method for an improved a bond pad structure. A top wiring layer and a top dielectric (IMD) layer over a semiconductor structure are provided. The buffer dielectric layer is formed...
7276787 Silicon chip carrier with conductive through-vias and method for fabricating same  
A carrier structure and method for fabricating a carrier structure with through-vias each having a conductive structure with an effective coefficient of thermal expansion which is less than or...
7274105 Thermal conductive electronics substrate and assembly  
An electronics assembly is provided including a circuit board substrate having a top surface and a bottom surface and a plurality of thermal conductive vias extending from the top surface to the...
7274104 Semiconductor device having an interconnect that increases in impurity concentration as width increases  
The present invention provides a semiconductor device capable of suppressing an increase in electrical resistance of a narrow interconnect, while keeping reliability of a wide interconnect from...
7271487 Semiconductor device and method of manufacturing the same  
The present invention is to improve yield and reliability in a wiring step of a semiconductor device. When an Al wiring on an upper layer is connected through an connection pillar onto an Al wiring...
7271495 Chip bond layout for chip carrier for flip chip applications  
A chip carrier for flip chip applications, according to the present invention, provides peripheral bumps and inner bumps. The inputs and outputs related to the inner bumps are routed out on an...