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7355265 Semiconductor integrated circuit  
A semiconductor integrated circuit comprising a power supply wiring and a ground wiring and a decoupling capacitor formed between the power supply wiring and the ground wiring, wherein at least one...
7355267 Substrate, semiconductor die, multichip module, and system including a via structure comprising a plurality of conductive elements  
A method of forming a multiconductor via includes forming at least one seed layer in at least one through-hole of a substrate, selectively patterning the seed layer to form a plurality of laterally...
7352066 Silicon based optical vias  
Method of fabricating a semiconductor die with a microlens associated therewith. More particularly, a method for fabricating a vertical channel guide optical via through a silicon substrate wherein...
7352061 Flexible core for enhancement of package interconnect reliability  
An IC package is disclosed that comprises a core region disposed between upper and lower build-up layer regions. In one embodiment, the core region comprises a low modulus material. In an...
7352052 Semiconductor device and manufacturing method therefor  
There is disclosed a semiconductor device comprising at least one semiconductor element, one chip mounting base being provided at least one first interconnection on one major surface thereof and at...
7352053 Insulating layer having decreased dielectric constant and increased hardness  
A method of manufacturing a mechanically robust insulating layer, including forming a low-k dielectric layer having a first dielectric constant on a substrate and forming a carbon nitride cap layer...
7352060 Multilayer wiring substrate for providing a capacitor structure inside a multilayer wiring substrate  
A multilayer wiring substrate for providing a capacitor structure inside a multilayer wiring structure is disclosed. The multilayer wiring substrate includes a dielectric layer including a resin...
7348672 Interconnects with improved reliability  
An interconnect architecture with improved reliability. An interconnect with rounded top corners is inlaid in a dielectric layer. A filler borders the interconnect along the corners of the...
7348677 Method of providing printed circuit board with conductive holes and board resulting therefrom  
A method of making a printed circuit board in which conductive thru-holes are formed within two dielectric layers of the board's structure so as to connect designated conductive layers. One hole...
7348676 Semiconductor device having a metal wiring structure  
After an insulation layer is formed on a substrate, a contact hole is formed through the insulation layer. A recessed plug is formed to partially fill up the contact hole. The recessed plug has a...
7348679 Electronic part having reinforcing member  
A method for manufacturing an electronic part, including: cutting a wiring substrate, which contains a base substrate, a wiring pattern provided on a first surface of the base substrate, and a...
7345352 Insulating tube, semiconductor device employing the tube, and method of manufacturing the same  
An insulating tube includes a underlying insulating film, a first sidewall insulating film disposed on the underlying insulating film, a second sidewall insulating film disposed on the underlying...
7345365 Electronic component with die and passive device  
An integrated chip package structure and method of manufacturing the same is by adhering dies on an organic substrate and forming a thin-film circuit layer on top of the dies and the organic...
7341938 Single mask via method and device  
A method of connecting elements such as semiconductor devices and a device having connected elements such as semiconductor devices. A first element having a first contact structure is bonded to a...
7342301 Connection device with actuating element for changing a conductive state of a via  
A connection device includes a plurality of re-configurable vias that connect a first metal layer to a second metal layer. An actuating element is disposed between the first metal layer and the...
7342317 Low coefficient of thermal expansion build-up layer packaging and method thereof  
A build-up layer packaging comprising a first ceramic substrate, a second ceramic substrate, and a circuit layer is provided. The first ceramic substrate has a through hole to dispose a die...
7339272 Semiconductor device with scattering bars adjacent conductive lines  
A semiconductor device and method of manufacture thereof wherein scattering bars are disposed on both sides of an isolated conductive line of a semiconductor device to improve the lithography...
7339273 Semiconductor device with a via hole having a diameter at the surface larger than a width of a pad electrode  
The invention is directed to a semiconductor device having a penetrating electrode and a manufacturing method thereof in which reliability and a yield of the semiconductor device are enhanced. A...
7339260 Wiring board providing impedance matching  
A wiring board comprising: a plate core having a first main surface and a second main surface; conductor layers including a conductor line; dielectric layers laminated alternately with said...
7339271 Metal-metal oxide etch stop/barrier for integrated circuit interconnects  
Described is a method and apparatus for forming interconnects with a metal-metal oxide electromigration barrier and etch-stop. In one embodiment of the invention, the method includes depositing a...
7335970 Semiconductor device having a chip-size package  
Disclosed are a semiconductor device, a method for manufacturing the same, and a method for mounting the same. The method for manufacturing a semiconductor device includes the steps of: preparing a...
7335592 Wafer level package, multi-package stack, and method of manufacturing the same  
A semiconductor chip package includes a semiconductor chip having a through hole extending there through from an active first surface to an inactive second surface. A first conductive pad at least...
7335972 Heterogeneously integrated microsystem-on-a-chip  
A microsystem-on-a-chip comprises a bottom wafer of normal thickness and a series of thinned wafers can be stacked on the bottom wafer, glued and electrically interconnected. The interconnection...
7332812 Memory card with connecting portions for connection to an adapter  
Semiconductor devices having conductive lines with extended ends and methods of extending conductive line ends by a variable distance are disclosed. An end of a first conductive feature of an...
7332449 Method for forming dual damascenes with supercritical fluid treatments  
A method for forming a damascene structure by providing a single process solution for resist ashing while avoiding and repairing plasma etching damage as well as removing absorbed moisture in the...
7329953 Structure for reducing leakage currents and high contact resistance for embedded memory and method for making same  
A method for fabricating an insulating layer having contact openings of varying depths for logic/DRAM circuits is achieved using a single mask and etch step. After forming stacked or trench...
7327022 Assembly, contact and coupling interconnection for optoelectronics  
A novel micro optical system as a platform technology for electrical and optical interconnections, thermal and mechanical assembly and integration of electronic, optoelectronic, passive and active...
7326907 Wiring substrate and radiation detector using same  
A wiring substrate section 2 , which has a wiring substrate 20 with through holes 20 c each filled with a conductive member 21 serving as a conduction path for guiding a detected signal, is...
7323784 Top via pattern for bond pad structure  
Top via pattern for a bond pad structure has at least one first via group and at least one second via group adjacent to each other. The first via group has at least two line vias extending in a...
7323781 Semiconductor device and manufacturing method thereof  
The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring...
7323785 Semiconductor device  
A through-electrode that penetrates a semiconductor substrate and that is insulatively separated from the semiconductor substrate includes an inner through-electrode, a quadrangular ring-shaped...
7321171 Semiconductor integrated circuit device  
A barrier layer and a copper film are successively formed on a silicon oxide film including a groove for wiring in the silicon oxide film and a silicon nitride film, both formed on a semiconductor...
7321164 Stack structure with semiconductor chip embedded in carrier  
A stack structure with semiconductor chips embedded in carriers comprises two carriers stacking together as a whole, at least two semiconductor chips having active surfaces with electrode pads and...
7319270 Multi-layer electrode and method of forming the same  
An interconnect includes an opening formed in a dielectric layer. A conductive barrier is deposited in the opening, over which a first conductive layer is deposited. A conductive oxide is deposited...
7319269 Semiconductor device power interconnect striping  
A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls, pads or other interconnects) used to...
7319274 Methods for selective integration of airgaps and devices made by such methods  
Methods for the production of airgaps in semiconductor devices and devices produced using such methods are disclosed. An example semiconductor device includes a damascene stack formed using such...
7319049 Method of manufacturing an electronic parts packaging structure  
A method of manufacturing an electronic parts packaging structure of the present invention, includes the steps of forming a first uncured resin layer on a substrate, arranging an electronic parts...
7317201 Method of producing a microelectronic electrode structure, and microelectronic electrode structure  
In a method for producing a microelectronic electrode structure a first wiring plane is prepared, an insulating region on the first wiring plane is provided, a through-hole in the insulating region...
7317208 Semiconductor device with contact structure and manufacturing method thereof  
A plurality of gate lines are formed on a substrate. After depositing a gate insulating layer, a semiconductor layer and a doped amorphous silicon layer are sequentially formed thereon. A lower...
7317255 Reliable printed wiring board assembly employing packages with solder joints  
An exemplary assembly comprises a printed wiring board having a first surface, and a package including a plurality of solder joints, such as solder balls, on one surface of the package. An anchor...
7315072 Semiconductor device capable of suppressing current concentration in pad and its manufacture method  
An interlayer insulating film is formed on a semiconductor substrate. An intra-layer insulating film is formed on the interlayer film. A recess is formed through the intra-layer film. The recess...
7315084 Copper interconnection and the method for fabricating the same  
A copper interconnection where holes in the vicinity of an interface are reduced to lower contribution of interface diffusion to Cu the EM, increase a lifetime, and simultaneously increase...
7312530 Semiconductor device with multilayered metal pattern  
A semiconductor device comprises a first insulating film formed on a semiconductor substrate, a first metal pattern formed on the first insulating film, a second insulating film formed on the first...
7312532 Dual damascene interconnect structure with improved electro migration lifetimes  
A dual damascene interconnect structure is formed by patterning a first dielectric to form a metal line. A second dielectric is disposed on the first dielectric and patterned to form a via. The...
7312523 Enhanced via structure for organic module performance  
A circuit board comprises a resin-filled plated (RFP) through-hole; a dielectric layer over the RFP through-hole; a substantially circular RFP cap in the dielectric layer and connected to an upper...
7309922 Lower substrate, display apparatus having the same and method of manufacturing the same  
In a lower substrate, a display apparatus having the lower substrate and a method of manufacturing the lower substrate, the lower substrate includes a pixel area and a circuit area. An image is...
7309921 Semiconductor device  
Leakage current generated in a PN junction diode is reduced, and charge-up current caused by plasma treatment in formation of wiring connected to the PN junction diode is controlled. An N + region...
7309917 Multilayer board and a semiconductor device  
Preparing a bottom grounding layer eliminates grounding pins, thereby the number of signal pins can be increased in a multilayer board that includes a grounding layer, a signal layer, a power...
7307348 Semiconductor components having through wire interconnects (TWI)  
A semiconductor component includes a semiconductor substrate having a substrate contact, and a through wire interconnect (TWI) bonded to the substrate contact. The through wire interconnect (TWI)...
7304390 Anisotropic conductive sheet and manufacture thereof  
An anisotropic conductive sheet manufactured through improved manufacturing steps and a method of manufacturing the same. Conductive portions are unevenly arranged in a nonconductive elastomer...