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Match Document Document Title
7622808 Semiconductor device and having trench interconnection  
A semiconductor device includes a first interconnection layer and a interlayer insulating layer. The first interconnection layer is formed on a upper side of a substrate, and includes a first...
7619310 Semiconductor interconnect and method of making same  
An integrated circuit interconnect structure includes a conductive line, a first barrier layer disposed on a bottom surface of conductive line, a second barrier layer disposed on the top surface of...
7619283 Methods of fabricating glass-based substrates and apparatus employing same  
Methods and apparatus provide for a glass or glass ceramic substrate, including: a bulk layer; an enhanced positive ion concentration layer; and a reduced positive ion concentration layer, wherein...
7612453 Semiconductor device having an interconnect structure and a reinforcing insulating film  
A semiconductor device includes in an interconnect structure which includes a first interconnect made of a copper-containing metal, a first Cu silicide layer covering the upper portion of the first...
7608928 Laminated body and semiconductor device  
A laminate includes a copper wiring layer ( 20 ) provided over a semiconductor layer and having a specific pattern, a protective layer ( 30 ) formed of a polybenzoxazole resin layer provided on the...
7608926 Nonvolatile semiconductor memory device  
A new method to polish down conductive lines in the manufacture of an integrated circuit device is achieved. The method comprises providing a plurality of conductive lines overlying a substrate. A...
7605472 Interconnections having double capping layer and method for forming the same  
Provided are an interconnection of a semiconductor device which includes a capping layer and a method for forming the interconnection. The interconnection of the semiconductor device is a copper...
7605471 Semiconductor devices and methods for manufacturing the same  
Semiconductor devices having a copper line layer and methods for manufacturing the same are disclosed. An illustrated semiconductor device comprises a damascene insulating layer having a contact...
7602067 Hetero-structure variable silicon rich nitride for multiple level memory flash memory device  
Charge storage stacks containing hetero-structure variable silicon richness nitride for memory cells and methods for making the charge storage stacks are provided. The charge storage stack can...
7602066 Method of filling structures for forming via-first dual damascene interconnects  
A method of forming via-first, dual damascene interconnect structures by using a gap-filling, bottom anti-reflective coating material whose thickness is easily controlled by a solvent is provided....
7602048 Semiconductor device and semiconductor wafer having a multi-layered insulation film  
The object of the present invention is to improve the interfacial adhesion between the film with low dielectric constant and protective film, without damaging the excellent dielectric, flatness and...
7595556 Semiconductor device and method for manufacturing the same  
Embodiments relate to a semiconductor device and a method for manufacturing the same. According to embodiments, the semiconductor device may include a semiconductor substrate formed with a metal...
7595555 Method of forming air gaps in a dielectric material using a sacrificial film and resulting structures  
A method of forming air gaps surrounding conductors in a dielectric layer, the dielectric layer comprising, for example, part of the interconnect structure of an integrated circuit device. The air...
7595010 Method for producing a doped nitride film, doped oxide film and other doped films  
Adding at least one non-silicon precursor (such as a germanium precursor, a carbon precursor, etc.) during formation of a silicon nitride, silicon oxide, silicon oxynitride or silicon carbide film...
7592710 Bond pad structure for wire bonding  
A bond pad structure of an integrated circuit is provided. The bond pad structure includes a conductive bond pad, a first dielectric layer underlying the bond pad, and an M top plate located in...
7592660 Semiconductor device and method for manufacturing the same  
There is provided a semiconductor device which includes a base insulating film formed on a semiconductor substrate, a capacitor formed on the base insulating film, an interlayer insulating film...
7586132 Power FET with low on-resistance using merged metal layers  
In one embodiment, relatively thin but wide metal bus strips overlying a high power FET are formed to conduct current to the source and drain narrow metal strips. A passivation layer is formed over...
7582970 Carbon containing silicon oxide film having high ashing tolerance and adhesion  
A semiconductor device includes an interlayer insulating film formed on or over a semiconductor substrate. An opening is formed in the interlayer insulating film and reaches a lower layer metal...
7582969 Hermetic interconnect structure and method of manufacture  
A hermetic interconnect is fabricated on a substrate by forming a stud of conductive material over a metallization layer, and then overcoating the stud of conductive material and the metallization...
7576440 Semiconductor chip having bond pads and multi-chip package  
A semiconductor chip comprises a semiconductor substrate having integrated circuits formed on a cell region and a peripheral circuit region adjacent to each other. A bond pad-wiring pattern is...
7572728 Semiconductor device and method for manufacturing the same  
A semiconductor device and method with a dual damascene pattern uses buffer layers to prevent photoresist layer poisoning due to a reaction between an interlayer dielectric and a photoresist layer....
7572571 Image sensor and method for manufacturing the same  
In a solid state imaging device, and a method of manufacture thereof, the efficiency of the transfer of available photons to the photo-receiving elements is increased beyond that which is currently...
7564132 Semiconductor chip  
A semiconductor chip 100 includes a semiconductor substrate (not shown), and a stacked film 150 formed over the semiconductor substrate, which includes carbon-containing insulating films such...
7554200 Semiconductor devices including porous insulators  
Semiconductor devices with porous insulative materials are disclosed. The porous insulative materials may include a consolidated material with voids dispersed therethrough. The voids may be defined...
7553757 Semiconductor device and method of manufacturing the same  
An interlayer insulator includes a first interlayer insulator and a second interlayer insulator formed on the first interlayer insulator and having a property of preventing diffusion of copper. A...
7550824 Low k interconnect dielectric using surface transformation  
Systems, devices and methods are provided to improve performance of integrated circuits by providing a low-k insulator. One aspect is an integrated circuit insulator structure. One embodiment...
7550823 Nonvolatile memory cell, array thereof, fabrication methods thereof and device comprising the same  
A nonvolatile memory cell is capable of reducing an excessive current leakage due to a rough surface of a polysilicon and of performing even at a low temperature process by forming the first oxide...
7550822 Dual-damascene metal wiring patterns for integrated circuit devices  
Methods of forming dual-damascene metal wiring patterns include forming a first metal wiring pattern (e.g., copper wiring pattern) on an integrated circuit substrate and forming an etch-stop layer...
7550788 Semiconductor device having fuse element arranged between electrodes formed in different wiring layers  
A semiconductor device includes a lower electrode, an upper electrode, and a fuse element that connects the lower electrode and the upper electrode. The height of the fuse element is greater than...
7547977 Semiconductor chip having bond pads  
In one embodiment, a semiconductor chip has one or more peripheral bond pads. The semiconductor chip comprises a semiconductor substrate having a cell region and a peripheral circuit region...
7544992 Illuminating efficiency-increasable and light-erasable embedded memory structure  
An illuminating efficiency-increasable and light-erasable embedded memory structure including a substrate, a memory device, many dielectric layers, many cap layers and at least three metal layers...
7544983 MTJ read head with sidewall spacers  
Following CMP, a magnetic tunnel junction stack may protrude through the oxide that surrounds it, making it susceptible to possible shorting to its sidewalls. The present invention overcomes this...
7544608 Porous and dense hybrid interconnect structure and method of manufacture  
A method for manufacturing a structure includes depositing a dense dielectric over the entire wafer, which includes areas that require low dielectric capacitance and areas that require high...
7541646 Thin film transistor device and method of manufacturing the same  
A thin film transistor device according to an embodiment of the invention includes: a thin film transistor having a silicon layer including a source region, a drain region, and a channel region, a...
7541638 Symmetrical and self-aligned non-volatile memory structure  
A memory structure in a semiconductor substrate essentially comprises a first conductive line, two conductive blocks, two first dielectric spacers, a first dielectric layer, and a second conductive...
7535107 Tiled construction of layered materials  
A method is described for combining the diverse strengths of two materials in a tiled film construction. The first material provides a foundation of intersecting grid lines on a substrate and the...
7521802 Semiconductor device having a refractory metal containing film and method for manufacturing the same  
A semiconductor device and a method for manufacturing the same of the present invention in which the semiconductor device is provided with a fuse structure or an electrode pad structure, suppress...
7521381 Method for producing silicon wafer and silicon wafer  
A silicon wafer is thermal-annealed in an atmosphere to form new vacancies therein by thermal annealing and the atmosphere in the thermal annealing contains a nitride gas having a lower...
7518246 Atomic layer deposition of CeO2/Al2O3 films as gate dielectrics  
The use of atomic layer deposition (ALD) to form a nanolaminate layered dielectric layer of cerium oxide and aluminum oxide acting as a single dielectric layer with a ratio of approximately two to...
7518242 Semiconductor testing device  
A semiconductor device has a bonding pad configured to be bonded to a bonding member, a test pad configured to contact with a test probe at a test, and an internal circuit electrically connected to...
7514779 Multilayer build-up wiring board  
Mesh holes 35 a and 59 a of upper solid layers 35 and upper solid layers 59 are formed to overlie on one another, so that the insulating properties of interlayer resin insulating layers 50...
7508076 Information handling system including a circuitized substrate having a dielectric layer without continuous fibers  
An information handling system which includes as part thereof a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a...
7507656 Method and structure for low k interlayer dielectric layer  
An integrated circuit interconnect structure. The structure includes a substrate and a layer of transistor elements overlying the substrate. A first interlayer dielectric layer is formed overlying...
7504731 Interconnect structure to reduce stress induced voiding effect  
An interconnect structure that may reduce or eliminate stress induced voids is provided. In an embodiment, a via is formed below a conductive line to provide an electrical connection to an...
7504699 Fabrication of a semiconductor device with air gaps for ultra-low capacitance interconnections  
A method of forming an air gap or gaps within solid structures and specifically semiconductor structures to reduce capacitive coupling between electrical elements such as metal lines, wherein a...
7495337 Dual-gate device and method  
A dual-gate device is formed over and insulated from a semiconductor substrate which may include additional functional circuits that can be interconnected to the dual-gate device. The dual-gate...
7488428 Method for forming stacked via-holes in printed circuit boards  
A method for forming stacked via-holes on a printed circuit board includes the steps of: providing a printed circuit board having a conductive trace formed on a side surface thereof; forming a...
7485964 Dielectric material  
A dielectric material formed by contacting a low dielectric constant polymer with liquid or supercritical carbon dioxide, under thermodynamic conditions which maintain the carbon dioxide in the...
7485915 Semiconductor device and method having capacitor and capacitor insulating film that includes preset metal element  
A semiconductor device includes a capacitor which includes a capacitor insulating film at least including a first insulating film and a ferroelectric film formed in contact with the first...
7485569 Printed circuit board including embedded chips and method of fabricating the same  
A printed circuit board having embedded chips, composed of a central layer having an embedded chip, an insulating layer formed on one surface or both surfaces of the central layer and having a via...
Matches 1 - 50 out of 709 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >