Matches 151 - 200 out of 977 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
Match Document Document Title
7141879 Semiconductor device  
There is described an improved semiconductor device of chip-scale package (CSP) comprising posts provided on respective electrode pads of a semiconductor chip, and solder balls which are provided...
7138715 Interconnect, interconnect forming method, thin film transistor, and display device  
An interconnect forming method according to the present invention includes a step of forming a barrier film for metal diffusion on an insulator film, a step of selectively forming a metal seed...
7135776 Semiconductor device and method for manufacturing same  
A technology for inhibiting the dielectric breakdown occurred in a semiconductor device is provided. A semiconductor device includes a semiconductor substrate (not shown), an interlayer insulating...
7135783 Contact etching utilizing partially recessed hard mask  
A method for forming contact holes using a partially recessed hard mask. A substrate with a device region and an alignment region having an opening therein, acting as an alignment mark, is...
7132751 Memory cell using silicon carbide  
A memory includes an insulating layer; a plurality of spaced-apart semiconductor lines formed on the insulating layer; and a plurality of spaced-apart conductive gate lines formed on the insulating...
7132726 Integrated semiconductor circuit having a logic and power metallization without intermetal dielectric  
An integrated semiconductor circuit having a first and a second portion of a substrate, in which a power semiconductor circuit structure and a logic circuit structure are respectively formed. The...
7132750 Semiconductor component having conductors with wire bondable metalization layers  
A semiconductor component includes a semiconductor die, a low k polymer layer on the die and redistribution conductors on the polymer layer. The component also includes bonding pads on the...
7129166 Method of forming an electronic device  
A method of forming an electronic circuit component using the technique of drop on demand printing to deposit droplets of deposition material, said method comprising depositing a plurality of...
7126198 Protruding spacers for self-aligned contacts  
A protruding spacer that protrudes above the top surface of a gate electrode structure provides enhanced resistance to exposure of the gate electrode during the etch process used to form...
7122901 Semiconductor device  
In a semiconductor device, a plurality of wiring layers each patterned in a required shape are laminated over both surfaces of an insulating base material with insulating layers interposed...
7122870 Methods of forming a multilayer stack alloy for work function engineering  
A method of forming a gate electrode is described, comprising forming a dielectric layer on a substrate, forming a first metal layer having a first work function on the dielectric layer, forming a...
7109115 Methods of providing ohmic contact  
Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material overlying the silicon-containing material...
7098536 Structure for strained channel field effect transistor pair having a member and a contact via  
A structure is provided which includes a semiconductor device region including a first portion and a second portion. A current-conducting member is provided, which extends horizontally over the...
7095124 Semiconductor device  
A semiconductor device comprises a semiconductor chip in which a multilayer interconnection structure having an interlayer insulation film with a low relative dielectric constant is formed on a...
7087998 Control of air gap position in a dielectric layer  
A method for controlling the position of air gaps in intermetal dielectric layers between conductive lines and a structure formed using such a method. A first dielectric layer is deposited over at...
7088983 Semiconductor device for radio communication device, and radio communication device using said semiconductor device  
A chip-on-chip-structure semiconductor device for a radio communication device, having a base band chip and a high-frequency chip piled up on and bonded to the surface thereof. The base band chip...
7087997 Copper to aluminum interlayer interconnect using stud and via liner  
Tungsten studs of a size comparable to vias are provided to integrate and interface between copper and aluminum metallization layers in an integrated circuit and/or package therefor by lining a via...
7087983 Manufacturing methods of semiconductor devices and a solid state image pickup device  
A manufacturing method of manufacturing a semiconductor device having a plurality of wiring layers. The method includes the steps of forming a wiring by a first wiring layer as a pattern by...
7084497 Physically deposited layer to electrically connect circuit edit connection targets  
Disclosed is a layer to electrically connect targets during a circuit edit of an integrated circuit and systems and methods for forming the layer. The layer contains a conductive material, such as...
7067919 Semiconductor device  
A semiconductor device including a second insulating film formed on a substantially flat surface, on which a surface of a first wiring and a surface of a first insulating film are continued, to...
7064439 Integrated electrical circuit and method for fabricating it  
An integrated electrical circuit having a plurality of structure planes is described. Electrically active elements are situated on at least one element structure plane, where at least one...
7053487 Semiconductor device  
A semiconductor device has first interlayer insulating film having a wiring trench; a wiring portion having a first barrier metal layer formed over side walls and bottom surface of the wiring...
7049703 Semiconductor device having a tapered interconnection with insulating material on conductive sidewall thereof within through hole  
A semiconductor device includes a fine interconnection structure with low resistance at a through hole. A first interconnection is formed on a surface of a first layer insulating film. The first...
7045898 Semiconductor device and manufacturing method thereof  
There is presented a structure in which outlines of a metal interconnection 111 that is laid in an interlayer insulating film are covered with a barrier metal film 110. As the material for the...
7045908 Semiconductor device and method for manufacturing the same  
A semiconductor device which is manufactured through a process of forming a second structure on a first structure, by using a photolithography technique, the semiconductor device includes a mark...
7045198 Prepreg and circuit board and method for manufacturing the same  
The present invention provides a prepreg and a circuit board that can achieve, e.g., low interstitial via connection resistance, excellent connection stability, and high durability, regardless of...
7042095 Semiconductor device including an interconnect having copper as a main component  
Provided are a semiconductor device comprising a semiconductor substrate, a first insulating film formed thereover, interconnects formed over the first insulating film and having copper as a main...
7038318 Compound structure for reduced contact resistance  
Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material overlying the silicon-containing material...
7034397 Oxygen bridge structures and methods to form oxygen bridge structures  
A method is proposed for improving the adhesion between a diffusion barrier film and a metal film. Both the diffusion barrier film and the metal film can be deposited in either sequence onto a...
7030004 Method for forming bond pad openings  
The invention provides a method for forming bond pad openings through a three-layer passivation structure, which protects the semiconductor device prior to bonding and packaging. Two passivation...
7023089 Low temperature packaging apparatus and method  
Some embodiments disclose a low temperature semiconductor packaging apparatus and method. An apparatus generally comprises a heat spreader, a silicon die, and a thermal interface material disposed...
7019396 Electronic chip component and method for manufacturing electronic chip component  
An electronic chip component includes a component body and a plurality of terminal electrodes disposed on outer surfaces of the component body. At least one of the terminal electrodes includes a...
7015531 FeRAM having bottom electrode connected to storage node and method for forming the same  
A FeRAM device in which a bottom electrode of a ferroelectric capacitor is connected to a source/drain region of a transistor and a top electrode is connected to a plate line. The FeRAM device...
7015582 Dummy metal fill shapes for improved reliability of hybrid oxide/low-k dielectrics  
A semiconductor structure and a process for fabricating the semiconductor structure. The structure includes a first and second rigid dielectric layer and a first non-rigid dielectric wiring level...
7015581 Low-K dielectric material system for IC application  
A low-k dielectric for use as an interlayer for an interconnect structure is provided. The dielectric of the present invention is an alkaline boron silicate glass which when formulated in certain...
7015584 High force metal plated spring structure  
Lithographically defined and etched spring structures are produced by various methods such that they avoid the formation of a plated metal wedge on an underside of the spring structure after...
7012017 Partially etched dielectric film with conductive features  
Provided are partially etched dielectric films with raised conductive features. Also provided are methods for forming the raised conductive features in the dielectric films, which methods include...
7009298 Low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer  
A contact structure is provided incorporating an amorphous titanium nitride barrier layer formed via low-pressure chemical vapor deposition (LPCVD) utilizing tetrakis-dialkylamido-titanium, Ti(NMe...
7009280 Low-k interlevel dielectric layer (ILD)  
An interlevel dielectric layer (ILD) comprises a low-k dielectric layer; and a low-k dielectric film, deposited under compressive stress, atop the dielectric layer. The dielectric layer comprises a...
7005752 Direct bumping on integrated circuit contacts enabled by metal-to-insulator adhesion  
A semiconductor device including a contact pad and circuit metallization on the surface of an integrated circuit (IC) chip comprises a stack of protection layers over the surface of the chip. The...
7005745 Method and structure to reduce risk of gold embrittlement in solder joints  
A method for reducing gold embrittlement in solder joints, and a copper-bearing solder according to the method, are disclosed. Embodiments of the invention comprise adding copper to non-copper...
7005724 Semiconductor device and a method of manufacture therefor  
The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the aforementioned semiconductor device. The semiconductor device, in...
7002215 Floating entrance guard for preventing electrical short circuits  
Methods and apparatuses are provided for protecting an interconnect line in a microelectromechanical system. The interconnect line is disposed over a substrate for conducting electrical signals,...
6998711 Method of forming a micro solder ball for use in C4 bonding process  
A method of forming micro solder balls for use in a C4 process is described. The solder balls are formed by laying down a peel-away photoresist layer, forming holes in the photoresist layer to...
6995471 Self-passivated copper interconnect structure  
An embodiment for a method for forming a self-passivated copper interconnect structure. An insulating layer is formed over a semiconductor structure. An opening is formed in the insulating layer....
6992388 Formation of micro rough polysurface for low sheet resistant salicided sub-quarter micron polylines  
This invention relates to a method for manufacturing a semiconductor device having polysilicon lines with micro-roughness on the surface. The micro-rough surface of the polysilicon lines help...
6992390 Liner with improved electromigration redundancy for damascene interconnects  
An interconnection structure for semiconductor integrated circuits is disclosed. The interconnection structure comprises a redundant layer, and at least one adhesion/diffusion barrier layer. The...
6989604 Conformal barrier liner in an integrated circuit interconnect  
An integrated circuit having a substrate and a semiconductor device thereon. A stop layer over the substrate has a first dielectric layer formed thereon having an opening into which a first...
6989601 Copper damascene with low-k capping layer and improved electromigration reliability  
The electromigration resistance of Cu lines is significantly improved by depositing a low-k capping layer thereon, e.g., a silicon carbide capping layer having a dielectric constant of about 4.5 to...
6987296 Semiconductor device having contact hole with improved aspect ratio  
A semiconductor device includes a semiconductor substrate, a lower conductive layer formed over the semiconductor substrate, an intermediate insulating layer formed over the lower conductive layer...
Matches 151 - 200 out of 977 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >