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5965938 |
Integrated two-tiered via-plug to improve metal lithography # 4
A semiconductor structure is disclosed where the topography of the semiconductor substrate is improved by forming a two-tiered via. The two-tiered structure has a top portion and a bottom portion....
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5966293 |
Minimal length computer backplane
An electrical interconnection structure. The electrical interconnection structure includes a mother board substrate having a plurality of layers. At least one layer includes a signal path having a...
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5962923 |
Semiconductor device having a low thermal budget metal filling and planarization of contacts, vias and trenches
The present invention pertains to a carrier layer and a contact enabled by the carrier layer which enables the fabrication of aluminum (including aluminum alloys and other conductive materials...
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5945739 |
Semiconductor device having a conductor through an inter-level layer and a spin-on-glass in the inter-level layer with substantially planar upper surfaces of the conductor, the inter-level layer, and the spin-on-glass
A multi-layered wiring structure includes a lower wiring having an upper surface, a first inter-level insulating layer having a first flat upper surface substantially coplanar with the upper...
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5945740 |
Semiconductor device
A semiconductor device comprising a lower level pattern formed on a semiconductor substrate, an interlayer insulator film covering the lower level pattern, and an upper level pattern formed on the...
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5932929 |
Tungsten tunnel-free process
An improved method of forming a tunnel-free tungsten plug is described. Semiconductor device structures are provided in and on a semiconductor substrate. An insulating layer of...
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5932928 |
Semiconductor circuit interconnections and methods of making such interconnections
Interconnections to a semiconductor structure are formed by alternating ribs and contact lines which are substantially orthogonal to each other and separated from one another in two dimensions....
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5929523 |
Os rectifying Schottky and ohmic junction and W/WC/TiC ohmic contacts on SiC
Metallic osmium on SiC (either β or α)forms a contact that remains firmly attached to the SiC surface and forms an effective barrier against diffusion from the conductive metal. On n-type SiC, Os...
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5929528 |
Semiconductor device and method of manufacturing the same
The semiconductor of this invention is provided with a first inter-layer insulating film formed on the surface of a semiconductor substrate to a first film thickness; a plurality of first wiring...
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5925930 |
IC contacts with palladium layer and flexible conductive epoxy bumps
An apparatus and method for forming a substrate having a palladium metal layer over at least one contact point of the substrate and having a flexible conductive polymer bump, preferably a two-stage...
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5923072 |
Semiconductor device with metallic protective film
A semiconductor device has a metal pattern composed of a material reacting on water and a metal protective film formed between an intrusion path of water and the metal pattern on the surface of a...
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5917707 |
Flexible contact structure with an electrically conductive shell
An interconnection contact structure assembly including an electronic component having a surface and a conductive contact carried by the electronic component and accessible at the surface. The...
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5912506 |
Multi-layer metal sandwich with taper and reduced etch bias and method for forming same
A multi-layer metal sandwich structure with taper and reduced etch bias formed on a substrate includes a first metal layer formed on the substrate and a second metal layer formed on the first metal...
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5909059 |
Semiconductor device having contact plug and method for manufacturing the same
On a main surface of a silicon substrate of one conductivity type, a diffusion layer of the opposite conductivity type is formed, and the main surface of the silicon substrate is covered by an...
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5905308 |
Bond pad for integrated circuit
A bond pad (18, 58) may comprise a base (20, 60) of bondable material. The base (20, 60) may have a periphery (26, 66). A segment of an interconnect (24, 64) may contact an extended section (28,...
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5892273 |
Semiconductor package integral with semiconductor chip
A semiconductor chip having a semiconductor substrate, a plurality of pads formed above the semiconductor substrate a first passivating film formed over an entire surface of the semiconductor...
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5892284 |
Semiconductor integrated circuit
A semiconductor integrated circuit includes upper level and lower level substrate interconnection layers which are positioned in a scribing line area and which are separated from each other an...
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5892254 |
Integrated circuit capacitors including barrier layers having grain boundary filling material
A barrier layer is included in an integrated circuit capacitor, between a conductive plug and a lower capacitor electrode. The barrier layer includes refractory metal and grain boundary filling...
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5889317 |
Leadframe for integrated circuit package
A leadframe for an IC package and a method of manufacturing the same are provided. The leadframe can be manufactured in such a manner as to provide suitable bondability, molding compound...
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5883433 |
Semiconductor device having a critical path wiring
Disclosed is a semiconductor device, which has: a wiring corresponding to a critical path, a wiring delay time of which determines an operating speed of an entire circuity, and a wiring...
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5883434 |
Semiconductor device having capped contact plug capable of suppressing increase of resistance
In a semiconductor device including a first insulating layer formed on a semiconductor substrate, a plurality of lower wiring layers made of one of aluminum and aluminum alloy and formed on the...
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5877557 |
Low temperature aluminum nitride
A process for metallizing semiconductor devices is provided, wherein a plurality of aluminum contacts is formed. The plurality of aluminum contacts is at least partially nitrided in a...
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5872402 |
Interlayer insulating film for semiconductor device
Disclosed is an interlayer insulating film using low dielectric constant films, which can be improved in rigidity without any effect exerted on the reliability of a semiconductor device. The...
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5866484 |
Semiconductor device and process of producing same
The object of the present invention is to provide a semiconductor device and a process of producing the same, in which a low contact resistance is ensured, the interwiring connection of a...
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5861671 |
Process for removing seams in tungsten plugs
A method for fabricating seamless, tungsten filled, small diameter contact holes, has been developed. The process features initially creating a tungsten plug, in the small diameter contact hole,...
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5856913 |
Multilayer semiconductor device having high packing density
A semiconductor power module has semiconductor components mounted on a substrate. The semiconductor components are in electrical contact with the substrate. Internal circuit wiring is achieved by...
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5847457 |
Structure and method of forming vias
A method is provided for forming a contact opening or via of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A first metal region is formed over an...
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5847466 |
Semiconductor device and manufacturing method for the same
A semiconductor device having a multilayer interconnection structure, includes a substrate having a metal interconnect layer provided thereon and N number (N being an integer of 2 or greater) of...
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5838062 |
Corrosion-resistant lead frame
A lead frame for a semiconductor chip package, including a die pad onto which a semiconductor chip will be attached; leads which will be electrically connected to the chip; and side rails...
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5838068 |
Integrated circuitry with interconnection pillar
A semiconductor processing method includes: a) providing a substrate having a base region to which electrical connection is to be made; b) providing a first layer of a conductive first material; c)...
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5831334 |
Field effect transistors comprising electrically conductive plugs having monocrystalline and polycrystalline silicon
A method of forming a field effect transistor relative to a monocrystalline silicon substrate, where the transistor has an elevated source and an elevated drain, includes: a) providing a transistor...
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5831329 |
Layered system with an electrically activatable layer
An electronic component has electrically activatable layer, e.g. in electroluminescent layer of porous silicon on a body of which two multiarthogonal grids are buried. A conductive layer on the...
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5825078 |
Hermetic protection for integrated circuits
This invention relates to integrated circuits which are protected from the environment. Such circuits are hermetically sealed by applying additional ceramic layers to the primary passivation.
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5814889 |
Intergrated circuit with coaxial isolation and method
A die 810 has an outer, annular via 814 filled with conductive material in order to electrically shield an inner via 816. A die 820 can be electrically shielded from another area 822 by use of a...
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5811851 |
Pre-oxidizing high-dielectric-constant material electrodes
Generally, according to the present invention, the sidewall of the adhesion layer (e.g. TiN 36) in a lower electrode is pre-oxidized after deposition of an unreactive noble metal layer (e.g. Pt 38)...
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5808361 |
Intergrated circuit interconnect via structure having low resistance
Interconnect via structures in a semiconductor integrated circuit having low resistance. The interconnect via structures connect metal layer structures in the semiconductor device and extend down...
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5801419 |
High frequency MOS device
A high frequency power MOS device (90) that is built by MOS technology having high speed switching capability. The device provides improved turn-on and turn-off capabilities by providing gate...
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5801443 |
Semiconductor device with short circuit prevention and method of manufacturing thereof
A semiconductor device including a first wiring layer formed on a main surface of a semiconductor substrate, and a first insulating film layer having first and second contact holes which reach the...
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5798569 |
Semiconductor device having multilayered wiring structure
In a semiconductor device having a metal wiring conductor connected to a contact hole formed through an interlayer insulator layer formed on a lower level circuit, a lower level tungsten film is...
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5793110 |
MOS transistor with good hot carrier resistance and low interface state density
After a MOS transistor having a gate electrode layer is formed on the surface of a semiconductor substrate, a first interlayer insulating film and a moisture blocking film are sequentially formed....
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5789818 |
Structure with selective gap fill of submicron interconnects
A semiconductor device and method having a low-permittivity material between closely-spaced leads in order to decrease unwanted capacitance, while having a more structurally strong dielectric...
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5783849 |
Semiconductor device
On a semiconductor substrate (1) is provided an insulator film, on which is formed a lower gate electrode including a first lower gate electrode (5a) and a second lower gate electrode (5b), on...
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5777265 |
Multilayer molded plastic package design
A multi-layer integrated circuit package which contains layers of dielectric that substantially reduce metal migration between the metal conductors of the package. The package has metal baseplates...
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5767558 |
Structures for preventing gate oxide degradation
The degradation of integrity of the gate oxide in a CMOS transistor due to the formation of a tungsten silicide strapping layer on the polycrystalline silicon gate as a result of the migration of...
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5760483 |
Method for improving visibility of alignment targets in semiconductor processing
Methods are disclosed that enhance the contrast between alignment targets and adjacent materials on a semiconductor wafer. According to a first embodiment, the TiN layer that is deposited during an...
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5760421 |
Semiconductor device including indices for identifying positions of elements in the device.
A semiconductor device having a plurality of elements arranged in a one-dimensional or a two-dimensional array includes indices for identifying positions of elements in the device formed in at...
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5760429 |
Multi-layer wiring structure having varying-sized cutouts
An integrated circuit having a multi-layered metal wiring structure with interlayer insulating films therebetween. A small cutout is made in a metal wiring when it is desirous to have the metal...
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5747878 |
Ohmic electrode, its fabrication method and semiconductor device
An ohmic electrode for III-V compound semiconductors such as GaAs semiconductors is provided to have satisfactory practical characteristics. Provided on an n + -type GaAs substrate is an ohmic...
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5744865 |
Highly thermally conductive interconnect structure for intergrated circuits
A method and structure for improving the thermal conductivity and therefore the heat dissipation of densely interconnected semiconductor circuits, particularly those utilizing low dielectric...
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5734177 |
Semiconductor device, active-matrix substrate and method for fabricating the same
A semiconductor device formed on an insulating substrate of the present invention includes: a gate wiring provided on the insulating substrate; a first insulating film provided so as to cover the...
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