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9041181 Land grid array package capable of decreasing a height difference between a land and a solder resist  
A land grid array (LGA) package including a substrate having a plurality of lands formed on a first surface of the substrate, a semiconductor chip mounted on a second surface of the substrate, a...
9035454 Element mounting board and semiconductor module  
Prepared in advance is a substrate formed of metallic material where slits are formed between mounting regions. Oxide films are generated all over the substrate including end faces of the...
9029196 Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask  
A semiconductor device has a semiconductor die with a die bump pad. A substrate has a conductive trace with an interconnect site. A conductive bump material is deposited on the interconnect site...
9030007 Semiconductor device and manufacturing method thereof  
A semiconductor device includes a first circuit base member including a surface having multiple first electrodes formed thereon, a second circuit base member being provided above the first circuit...
9030019 Semiconductor device and method of manufacture thereof  
A semiconductor device and a method of making a semiconductor device are disclosed. The semiconductor device comprises a redistribution layer arranged over a chip, the redistribution layer...
9030017 Z-connection using electroless plating  
An assembly includes a substrate having a substrate conductor and a contact at a first surface and a terminal at a second surface for electrically interconnecting the assembly with a component...
9024427 Multiple helix substrate and three-dimensional package with same  
A three dimensional package includes a substrate having a columnar part including a sidewall, and stairs or steps arranged along the sidewall of the columnar part in the form of multiple helixes...
9018744 Semiconductor device having a clip contact  
A semiconductor device comprises a carrier. Further, the semiconductor devices comprises a semiconductor chip comprising a first main surface and a second main surface opposite to the first main...
9018758 Cu pillar bump with non-metal sidewall spacer and metal top cap  
A bump has a non-metal sidewall spacer on a lower sidewall portion of Cu pillar, and a metal top cap on a top surface and an upper sidewall portion of the Cu pillar. The metal top cap is formed by...
9013038 Semiconductor device with post-passivation interconnect structure and method of forming the same  
A semiconductor device, including a protective layer overlying a contact pad and a dummy pad on a semiconductor substrate, an interconnect structure overlying the protective layer and contacting...
9013043 Semiconductor element applicable to optical products  
A semiconductor element includes: a transparent substrate; a stack structure formed on the transparent substrate and having a metal oxide layer partially exposed through sidewalls of the stack...
9006890 Solder in cavity interconnection structures  
The present disclosure relates to the field of fabricating microelectronic packages, wherein cavities are formed in a dielectric layer deposited on a first substrate to maintain separation between...
9006885 Semiconductor device having electrode pads arranged between groups of external electrodes  
The semiconductor device has the CSP structure, and may include a plurality of electrode pads formed on a semiconductor integrated circuit in order to input/output signals from/to exterior; solder...
9006889 Flip chip packages with improved thermal performance  
Systems and methods for improving thermal performance, such as thermal dissipation, of flip chip packages that include one or more flip chip dies are disclosed. In some embodiments, a thermal...
9006884 Three dimensional semiconductor device including pads  
A semiconductor device includes a substrate in which a cell region and a contact region are defined, a pad structure including a plurality of first conductive layers and a plurality of first...
9000587 Wafer-level thin chip integration  
A wafer-level package device and techniques for fabricating the device are described that include embedding a silicon chip onto an active device wafer or a passive device wafer, where the embedded...
8994193 Semiconductor package including a metal plate, semiconductor chip, and wiring structure, semiconductor apparatus and method for manufacturing semiconductor package  
A semiconductor package includes: a metal plate including a first surface, a second surface and a side surface; a semiconductor chip on the first surface of the metal plate, the semiconductor chip...
8994190 Low-temperature flip chip die attach  
A mechanism for electrically coupling a semiconductor device die to a semiconductor device package substrate that avoids introduction of excessive temperature induced stresses to the semiconductor...
8994158 Semiconductor packages having lead frames  
Semiconductor packages having lead frames include a lead frame, which supports a semiconductor chip and is electrically connected to the semiconductor chip by bonding wires, and a molding layer...
8981550 Semiconductor package with alternating thermal interface and adhesive materials and method for manufacturing the same  
A semiconductor package improves reliability of heat emitting performance by maintaining a heat emitting lid stacked on a top surface of a semiconductor chip at a tightly adhered state. A highly...
8981385 Silicon carbide semiconductor device  
A silicon carbide semiconductor device includes a silicon carbide substrate. The silicon carbide substrate is composed of an element region provided with a semiconductor element portion and a...
8981542 Semiconductor power module and method of manufacturing the same  
A semiconductor power module according to the present invention includes a base member, a semiconductor power device having a surface and a rear surface with the rear surface bonded to the base...
8981557 Method for forming photovoltaic cell, and resulting photovoltaic cell  
A photovoltaic cell manufacturing method is disclosed. Methods include manufacturing a photovoltaic cell having a selective emitter and buried contact (electrode) structure utilizing nanoimprint...
8980696 Method of packaging semiconductor die  
A method of packaging a semiconductor die includes the use of an embedded ground plane or drop-in embedded unit. The embedded unit is a single, stand-alone unit with at least one cavity. The...
8975751 Vias in porous substrates  
A microelectronic unit can include a substrate having front and rear surfaces and active semiconductor devices therein, the substrate having a plurality of openings arranged in a symmetric or...
8975759 Manufacturing method of semiconductor device, adhesive sheet used therein, and semiconductor device obtained thereby  
The present invention includes a temporary fixing step of temporarily fixing a semiconductor element on an adherend interposing an adhesive sheet therebetween, a wire-bonding step of bonding wires...
8975762 Semiconductor device  
A semiconductor device includes a substantially rectangular semiconductor chip having an obverse surface, a first long side, a second long side opposite the first long side, a first short side and...
8975734 Semiconductor package without chip carrier and fabrication method thereof  
A semiconductor package without a chip carrier formed thereon and a fabrication method thereof. A metallic carrier is half-etched to form a plurality of grooves and metal studs corresponding to...
8970042 Circuit board, comprising a core insulation film  
A circuit board is provided including a core insulation film having a thickness and including a first surface and an opposite second surface, an upper stack structure and a lower stack structure....
8970020 Semiconductor device  
Provided is a semiconductor device which includes a bonding wire, one end of which is connected to a bipolar device, the other end of which is connected to a conductive member, and the center of...
8970031 Semiconductor die terminal  
A method of making semiconductor die terminals and a semiconductor device with die terminals made according to the present method. At least a first mask layer is selectively printed on at least a...
8963325 Power device and power device module  
According to example embodiments of inventive concepts, a power device includes a semiconductor structure having a first surface facing a second surface, an upper electrode, and a lower electrode....
8963329 Semiconductor device  
Provided is a semiconductor device capable of increasing the number of signals. A semiconductor device according to an embodiment of the invention includes memories; a controller that designates...
8963327 Semiconductor device including wiring board with semiconductor chip  
A semiconductor device includes lands having an NSMD (non-solder mask defined) structure for mounting thereon solder balls placed in an inner area of a chip mounting area. The lands for mounting...
8963321 Semiconductor device including cladded base plate  
A semiconductor device includes a semiconductor chip joined with a substrate and a base plate joined with the substrate. The base plate includes a first metal layer clad to a second metal layer....
8957507 Technology of reducing radiation noise of semiconductor device  
A first lead frame group is constituted by a plurality of lead frames that are connected to the first circuit, terminals of the plurality of lead frames being provided on a first side of the...
8957530 Integrated circuit packaging system with embedded circuitry and post  
An integrated circuit packaging system includes: an integrated circuit device; a conductive post adjacent the integrated circuit device, the conductive post with a contact surface having...
8955219 Method for fabricating a bond  
The invention relates to a method for fabricating a bond by providing a body including a metallic surface provided with an inorganic, dielectric protective layer. The protective layer covers at...
8957527 Microelectronic package with terminals on dielectric mass  
A package for a microelectronic element, such as a semiconductor chip, has a dielectric mass overlying the package substrate and microelectronic element and has top terminals exposed at the top...
8952511 Integrated circuit package having bottom-side stiffener  
Embodiments of a bottom-side stiffening element are disclosed. The stiffening element may be disposed between an integrated circuit package and an underlying circuit board. In some embodiments,...
8952529 Semiconductor device with conductive layer over substrate with vents to channel bump material and reduce interconnect voids  
A semiconductor device has a semiconductor die with a plurality of bumps formed over a surface of the semiconductor die. A first conductive layer having first and second segments is formed over a...
8952712 Tagging of functional blocks of a semiconductor component on a wafer  
Methods and apparatus are disclosed to simultaneously, wirelessly test semiconductor components formed on a semiconductor wafer. The semiconductor components transmit respective outcomes of a...
8951916 Super-self-aligned contacts and method for making the same  
A number of first hard mask portions are formed on a dielectric layer to vertically shadow a respective one of a number of underlying gate structures. A number of second hard mask filaments are...
8952534 Semiconductor device and semiconductor assembly with lead-free solder  
A semiconductor device includes a semiconductor substrate, a pad region on the semiconductor substrate, a passivation layer over the semiconductor substrate and at least a portion of the pad...
8952540 In situ-built pin-grid arrays for coreless substrates, and methods of making same  
A coreless pin-grid array (PGA) substrate includes PGA pins that are integral to the PGA substrate without the use of solder. A process of making the coreless PGA substrate integrates the PGA pins...
8952539 Methods for fabrication of an air gap-containing interconnect structure  
Methods for producing air gap-containing metal-insulator interconnect structures for VLSI and ULSI devices using a photo-patternable low k material as well as the air gap-containing interconnect...
8952512 Wafer-level package structure of light emitting diode and manufacturing method thereof  
A wafer-level package structure of a light emitting diode and a manufacturing method thereof are provided in the present invention. The wafer-level package structure of a light emitting diode...
8946890 Power/ground layout for chips  
Embodiments of the present disclosure provide a chip that comprises a base metal layer formed over a first semiconductor die and a first metal layer formed over the base metal layer. The first...
8941152 Semiconductor device  
A method of forming a semiconductor device comprises forming a base wafer comprising a first chip package portion, a second chip package portion, and a third chip package portion. The method also...
8937392 Semiconductor device  
A semiconductor device includes an insulating substrate including a first surface and an opposing second surface, and a semiconductor chip. The semiconductor chip is mounted over the first...