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8461675 Substrate panel with plating bar structured to allow minimum kerf width  
A semiconductor die substrate panel is disclosed including a minimum kerf width between adjoining semiconductor package outlines on the panel, while ensuring electrical isolation of plated...
8456881 Stacked memory and devices including the same  
In one embodiment, the stacked memory includes a first group of stacked memory chips, a second group of stacked memory chips, and connection terminals configured to electrically connect a first...
8450843 Semiconductor device and method for designing the same  
The semiconductor device comprises a semiconductor chip and a printed wiring board having a recess in which the semiconductor chip is housed face-down, wherein the printed wiring board comprises...
8445328 Method for producing chip elements equipped with wire insertion grooves  
The invention relates to a method for producing chip elements provided with a groove, comprising the following steps: on an interconnect substrate, providing a conductive track arranged to connect...
8446005 Semiconductor device having a bus configuration which reduces electromigration  
A semiconductor device includes: a first transistor; a second transistor; an interlayer insulating film covering the transistors; a rectangular-shaped first bus formed on the interlayer insulating...
8441127 Bump-on-trace structures with wide and narrow portions  
A device includes a package component, and a metal trace on a surface of the package component. A first and a second dielectric mask cover a top surface and sidewalls of the metal trace, wherein a...
8443306 Planar compatible FDSOI design architecture  
A multi-operation mode application specific integrated circuit (ASIC) implemented in fully-depleted silicon-on-insulator (FDSOI) includes an ASIC implemented in FDSOI having a plurality of...
8436459 Power semiconductor module  
A wiring process between the provided power semiconductor module and the external circuit is simple. In the power semiconductor module, a power semiconductor element and a cylindrical conductor...
8431827 Circuit modules and method of managing the same  
Circuit modules including identification codes and a method of managing them are provided. A module substrate includes signal input output terminals and outer ground terminals provided at the...
8432031 Semiconductor die including a current routing line having non-metallic slots  
A semiconductor die that includes a plurality of non-metallic slots that extend through a current routing line is disclosed. The semiconductor die comprises a semiconductor circuit that includes a...
8427833 Thermal power plane for integrated circuits  
A mechanism is provided for a thermal power plane that delivers power and constitutes minimal thermal resistance. The mechanism comprises a processor layer coupled, via a first set of coupling...
8426981 Composite layered chip package  
A composite layered chip package includes first and second subpackages that are stacked. Each subpackage includes a main body and wiring. The main body includes: a main part having a top surface...
8426960 Wafer level chip scale packaging  
A method for making back-to-front electrical connections in a wafer level chip scale packaging process is disclosed. A wafer containing a plurality of semiconductor chips is mounted on a package...
8426978 Semiconductor device including a first wiring having a bending portion and a via including the bending portion  
A first wiring (1) has a bending portion (2), a first wiring region (1a) extending from the bending portion (2) in the X direction, and a second wiring region (1b) extending from the bending...
8421163 Power module  
A power module comprises: first and second terminals; first and second switching elements having a first electrode and a second electrode which is connected to the second terminal; first and...
8421205 Power layout for integrated circuits  
A power layout of an integrated circuit includes at least one power grid cell. Each power gird cell includes at least one first power layer configured to be coupled to a high power supply voltage...
8415803 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Method and system for routing electrical connections of semiconductor chips
 
A method and a system for routing electrical connections are disclosed. A semiconductor device includes a first semiconductor chip and a routing plane having a plurality of routing lines. A first...
8415785 Metal ring techniques and configurations  
Embodiments of the present disclosure provide an apparatus comprising a substrate layer, a metal ring structure disposed on the substrate layer, the metal ring structure having an opening defined...
8415793 Wafer and substructure for use in manufacturing electronic component packages  
A wafer for electronic component packages is used for manufacturing a plurality of electronic component packages, each of the plurality of electronic component packages including: a base...
8415207 Module including a sintered joint bonding a semiconductor chip to a copper surface  
A module includes a substrate including a first copper surface and a semiconductor chip. The module includes a first sintered joint bonding the semiconductor chip directly to the first copper surface.
8405195 Arrangement comprising at least one power semiconductor module and a transport packaging  
An arrangement comprising: at least one power semiconductor module and a transport packaging. The power semiconductor module has a base element, a housing and connection elements. The transport...
8405229 Electronic package including high density interposer and circuitized substrate assembly utilizing same  
An electronic package for interconnecting a high density pattern of conductors of an electronic device (e.g., semiconductor chip) of the package and a less dense pattern of conductors on a...
8399978 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Power semiconductor chip package
 
A device includes a vertical power semiconductor chip having an epitaxial layer and a bulk semiconductor layer. A first contact pad is arranged on a first main face of the power semiconductor chip...
8400778 Layout schemes and apparatus for multi-phase power switch-mode voltage regulator  
A multi-phase voltage regulator is disclosed where each phase is comprised of an array of high and low side transistors that are integrated onto a single substrate. Further, a system of mounting...
8394678 Semiconductor chip stacked body and method of manufacturing the same  
A plurality of chip sealing bodies stacked on a wiring substrate with a connection terminal. The chip sealing body includes a semiconductor chip having a semiconductor integrated circuit, a pad...
8373263 Interconnection structure and its design method  
An interconnection structure includes a semiconductor chip, a mounting substrate on which the semiconductor chip is mounted, and a group of bonding wires provided to connect the semiconductor chip...
8368207 Pressure-contact power semiconductor module and method for producing the same  
A pressure-contact power semiconductor module is arranged on a heat sink. The power semiconductor module is used with at least one substrate provided with conductor tracks and power semiconductor...
8362614 Fine pitch grid array type semiconductor device  
A semiconductor device has a semiconductor chip in which a plurality of semiconductor components and a plurality of pads are arranged, a plurality of external connection contacts arranged in...
8362613 Flip chip device having simplified routing  
The present disclosure is directed to a semiconductor die having a chip outline boundary, a die seal, a row of input/output contact pads separated from the chip outline boundary by the die seal, a...
8362602 Layered chip package and method of manufacturing same  
A layered chip package includes a main body, and wiring that includes a plurality of wires disposed on a side surface of the main body. The main body includes: a main part including a plurality of...
8358000 Double side cooled power module with power overlay  
A power module includes one or more semiconductor power devices having a power overlay (POL) bonded thereto. A first heat sink is bonded to the semiconductor power devices on a side opposite the...
8350375 Flipchip bump patterns for efficient I-mesh power distribution schemes  
Disclosed is a flipchip scheme where power and ground bumps are arranged in a striped configuration. Specifically, there are a plurality of lines of power bumps, and a plurality of lines of ground...
8350376 Bondwireless power module with three-dimensional current routing  
According to an exemplary embodiment, a bondwireless power module includes a common output pad coupling an emitter/anode node of a high side device to a collector/cathode node of a low side...
8350374 Multi-chip package including chip address circuit  
A multi-chip package according to an aspect of this disclosure includes a plurality of multi-chips. Each of the multi-chips includes a lead configured to receive an external power supply voltage,...
8350372 Semiconductor device including a DC-DC converter  
The present invention provides a non-insulated type DC-DC converter having a circuit in which a power MOS•FET for a high side switch and a power MOS•FET for a low side switch are connected in...
8345434 High frequency circuit having multi-chip module structure  
According to one embodiment, there is a high frequency circuit having a multi-chip module structure, including a semiconductor substrate set formed with discrete transistors connected in series, a...
8344496 Distributing power with through-silicon-vias  
An integrated circuit with distributed power using through-silicon-vias (TSVs) is presented. The integrated circuit has conducting pads for providing power and ground located within the peripheral...
8344464 Multi-transistor exposed conductive clip for high power semiconductor packages  
One exemplary disclosed embodiment comprises a semiconductor package including multiple transistors coupled to an exposed conductive clip. A driver integrated circuit (IC) may control the...
8344492 Semiconductor device and method of manufacturing the same, and electronic apparatus  
A first multilayer wiring structure has a first surface and a second surface positioned on an opposite side to the first surface, a first wiring pattern formed on the second surface side and a...
8338936 Semiconductor device and manufacturing method  
A semiconductor device and manufacturing method. One embodiment provides a semiconductor chip. An encapsulating material covers the semiconductor chip. A metal layer is over the semiconductor chip...
8330265 RF transistor packages with internal stability network and methods of forming RF transistor packages with internal stability networks  
A packaged RF transistor device includes an RF transistor die including a plurality of RF transistor cells. Each of the plurality of RF transistor cells includes a control terminal and an output...
8324720 Power semiconductor module assembly with heat dissipating element  
A power semiconductor module assembly is disclosed including a power semiconductor module comprising a load terminal electrically conductively joined to a contact conductor. Part of the heat...
8324741 Layered chip package with wiring on the side surfaces  
A layered chip package has a main body including pairs of layer portions, and wiring disposed on a side surface of the main body. Each layer portion includes a semiconductor chip. The pairs of...
8324725 Stacked die module  
Semiconductor dies are stacked offset from one another so that terminals located along two edges of each die are exposed. The two edges of the dies having terminals may be oriented in the same...
8309977 Organic light-emitting diode module  
An organic light-emitting diode (OLED) module includes a substrate, a bus line, an organic light-emitting device layer, a plurality of conductive elements, and at least one conductive wire. The...
8304907 Top layers of metal for integrated circuits  
The present invention adds one or more thick layers of polymer dielectric and one or more layers of thick, wide metal lines on top of a finished semiconductor wafer, post-passivation. The thick,...
8304864 Lead frame routed chip pads for semiconductor packages  
A redistributed lead frame for use in a molded plastic semiconductor package is formed from an electrically conductive substrate by a sequential metal removal process. The process includes...
8299620 Semiconductor device with welded leads and method of manufacturing the same  
A semiconductor device and a manufacturing method for preventing mechanical and thermal damage to the semiconductor chip. A laser beam welds a first connection pad formed on a first external lead...
8299599 Semiconductor device  
To improve the performance and reliability of semiconductor devices. For the semiconductor chip CP1, power MOSFETs Q1 and Q2 for the switch, a diode DD1 for detecting the heat generation of the...
8294247 High-power device having thermocouple embedded therein and method for manufacturing the same  
Provided is a high-power device having a thermocouple (thermoelectric couple) for measuring the temperature of a transistor constituting a high-power device. The high-power device includes a...