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8643189 Packaged semiconductor die with power rail pads  
A packaged semiconductor die has a die support mounting surface mounted to a die support having external connectors. A die connection pad surface opposite to die supporting mount surface has...
8637964 Low stray inductance power module  
A power module includes a substrate including an insulating member and a patterned metallization on the insulating member. The patterned metallization is segmented into a plurality of spaced apart...
8637972 Two-sided substrate lead connection for minimizing kerf width on a semiconductor substrate panel  
A semiconductor die substrate panel is disclosed including a minimum kerf width between adjoining semiconductor package outlines on the panel, while ensuring electrical isolation of plated...
8629548 Clock network fishbone architecture for a structured ASIC manufactured on a 28 NM CMOS process lithographic node  
A clock architecture for a Structured ASIC chip, manufactured using a CMOS process is shown. A via-configurable logic block (VCLB) architecture in the Structured ASIC has a core region containing...
8624379 Semiconductor device  
A semiconductor device is improved in reliability. A switching power MOSFET and a sense MOSFET for sensing a current flowing in the power MOSFET, which is smaller in area than the power MOSFET,...
8624242 Semiconductor integrated circuit  
There is offered a semiconductor integrated circuit provided with a function to electrically identify a location where a defect such as chipping of an LSI die or separation of resin is caused....
8624366 Semiconductor package structure and method of fabricating the same  
A semiconductor package structure is provided, including: a semiconductor chip having electrode pads disposed thereon and metal bumps disposed on the electrode pads; an encapsulant encapsulating...
8624378 Chip-housing module and a method for forming a chip-housing module  
A chip-housing module including a carrier configured to carry one or more chips; the carrier including: a first plurality of openings, wherein each opening of the first plurality of openings is...
8598709 Method and system for routing electrical connections of semiconductor chips  
A method and a system for routing electrical connections are disclosed. A semiconductor device includes a first semiconductor chip and a routing plane having a plurality of routing lines. A first...
8598631 Semiconductor integrated circuit chip and layout method for the same  
A semiconductor integrated circuit chip mounted on a substrate by flip chip bonding includes: a plurality of electrode pads; a corner portion of a flat periphery of an inner layer; a first linear...
8592966 RF transistor packages with internal stability network including intra-capacitor resistors and methods of forming RF transistor packages with internal stability networks including intra-capacitor resistors  
A packaged RF transistor device includes an RF transistor die including a plurality of RF transistor cells. Each of the plurality of RF transistor cells includes a control terminal and an output...
8593817 Power semiconductor module and method for operating a power semiconductor module  
A power semiconductor module is provided in which power semiconductor chips with an aluminum-based chip metallization and power semiconductor chips with a copper-based chip metallization are...
8576000 3D chip stack skew reduction with resonant clock and inductive coupling  
There is provided a clock distribution network for synchronizing global clock signals within a 3D chip stack having two or more strata. The clock distribution network includes a plurality of clock...
8575761 Segmented supply rail configuration for a digital integrated circuit  
An array of functional cells includes a subset of cells powered by at least one supply rail. That supply rail is formed of first segments located on a first metallization level and second segments...
8575743 Printed board and semiconductor integrated circuit  
An IC which includes a first circuit and a plurality of first paired terminals each including a first power supply terminal and a first GND terminal which are connected to the first circuit, and a...
8575742 Semiconductor device with increased I/O leadframe including power bars  
A semiconductor device or semiconductor package (e.g., a QFP package) including a uniquely configured leadframe sized and configured to maximize the available number of exposed leads in the...
8564112 Semiconductor device  
To improve the performance and reliability of semiconductor devices. For the semiconductor chip CP1, power MOSFETs Q1 and Q2 for the switch, a diode DD1 for detecting the heat generation of the...
8564141 Chip unit and stack package having the same  
A chip unit includes: a first semiconductor chip and a second semiconductor chip disposed such that their surfaces for forming first bonding pads and second bonding pads face each other; first and...
8566068 Trace routing network  
Hardware emulation produces relevant and irrelevant trace data. Verification of a design under test requires knowledge of the relevant trace data. Data lines are provided to capture trace data...
8546903 Ionic isolation ring  
There has been very little (if any) attention to address contamination diffusion within an integrated circuit (IC) because there are very few applications where a protective overcoat will be...
8546943 Ball grid array substrate with insulating layer and semiconductor chip package  
Provided is a ball grid array substrate, a semiconductor chip package, and a method of manufacturing the same. The ball grid array substrate includes an insulating layer having a first surface...
8546939 RF module including control IC without the aid of a relay pad  
A technology is provided so that RF modules used for cellular phones etc. can be reduced in size. Over a wiring board constituting an RF module, there are provided a first semiconductor chip in...
8536716 Supply voltage or ground connections for integrated circuit device  
Embodiments disclosed herein may relate to supply voltage or ground connections for integrated circuit devices. As one example, two or more supply voltage bond fingers may be connected together...
8531023 Substrate for semiconductor package and method of manufacturing thereof  
Disclosed is a substrate for a semiconductor package in which leakage of radiation noise from a gap between a semiconductor element and a mounting substrate can be prevented. The substrate for the...
8531038 Top layers of metal for high performance IC's  
A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a...
8525322 Semiconductor package having a plurality of input/output members  
A semiconductor package has a first substrate having a plurality of electrically conductive patterns formed thereon. A first semiconductor die is coupled to the plurality of conductive patterns. A...
8519532 Semiconductor device including cladded base plate  
A semiconductor device includes a semiconductor chip coupled to a substrate and a base plate coupled to the substrate. The base plate includes a first metal layer clad to a second metal layer. The...
8519513 Semiconductor wafer plating bus  
A semiconductor wafer includes a die, an edge seal, a bond pad, a plating bus, and trace. The die is adjacent to a saw street. The edge seal is along a perimeter of the die and includes a...
8519546 Stacked multi-die electronic device with interposed electrically conductive strap  
An electronic device includes a first semi-conductor die, a second semi-conductor die and an electrically conductive element. The electrically conductive element includes a first electrically...
8513034 Method of manufacturing layered chip package  
A method of manufacturing a layered chip package that includes a main body, and wiring disposed on a side surface of the main body. The main body includes a plurality of layer portions. The method...
8513811 Electronic device and method for connecting a die to a connection terminal  
An electronic device including a die-pad area, a die fixed to the die-pad area, a connection terminal, and a ribbon of conductive material. The ribbon is electrically connected to the die and to...
8514579 Power semiconductor module including substrates spaced from each other  
The invention relates to a power semiconductor module including a module underside, a module housing, and at least two substrates spaced from each other. Each substrate has a topside facing an...
8513663 Signal repowering chip for 3-dimensional integrated circuit  
A signal repowering chip comprises an input; at least one inverter connected in series to the input; and at least one switch connected to a test enable signal, the at least one switch configured...
8513798 Power semiconductor chip package  
A device includes a vertical power semiconductor chip having an epitaxial layer and a bulk semiconductor layer. A first contact pad is arranged on a first main face of the power semiconductor chip...
8502385 Power semiconductor device  
A power semiconductor device has the power semiconductor elements having back surfaces bonded to wiring patterns and surface electrodes, cylindrical communication parts having bottom surfaces...
8502374 Power module package and method for manufacturing the same  
Disclosed herein are a power module package and a method for manufacturing the same. The power module package includes: a base substrate having grooves formed between a plurality of semiconductor...
8497574 High power semiconductor package with conductive clips and flip chip driver IC  
In one implementation, a high power semiconductor package is configured as a buck converter including a control transistor and a sync transistor disposed on a leadframe, a flip chip driver...
8497573 High power semiconductor package with conductive clip on multiple transistors  
In one implementation, a high power semiconductor package is configured as a buck converter including a control transistor, a sync transistor, a driver integrated circuit (IC) for driving the...
8492762 Electrical interface for a sensor array  
An interface circuit for a sensor array is provided. The interface circuit may be made up of an integrated circuit package that provides a first region and a second region. The first region may be...
8487407 Low impedance gate control method and apparatus  
According to one embodiment of a module, the module includes a plurality of gate driver chips coupled in parallel and having a common gate input, a common supply voltage and a common output. The...
8487423 Interconnect structure of semiconductor integrated circuit and semiconductor device including the same  
In a semiconductor integrated circuit chip including an interconnect layer in which there is a limitation on the lengths of interconnects or areas occupied by the interconnects, empty spaces...
8482109 Integrated circuit packaging system with dual connection and method of manufacture thereof  
A method of manufacture of an integrated circuit packaging system includes: forming a peripheral lead having a peripheral contact layer surrounding the peripheral lead with a non-horizontal side...
8482111 Stackable molded microelectronic packages  
A microelectronic package has a microelectronic element overlying or mounted to a first surface of a substrate and substantially rigid conductive posts projecting above the first surface or...
8476749 High-bandwidth ramp-stack chip package  
A chip package is described. This chip package includes a stack of semiconductor dies or chips that are offset from each other, thereby defining a terrace with exposed pads. A high-bandwidth ramp...
8471379 Semiconductor device  
A semiconductor device includes a semiconductor chip with first and second low noise amplifier for amplifying an inputted signal. The chip is mounted over a wiring substrate which includes first...
8473762 Power delivery in a heterogeneous 3-D stacked apparatus  
A heterogeneous three-dimensional (3-D) stacked apparatus is provided that includes multiple layers arranged in a stacked configuration with a lower layer configured to receive a board-level...
8471378 Power semiconductor device and method therefor  
A power transistor includes a plurality of transistor cells. Each transistor cell has a first electrode coupled to a first electrode interconnection region overlying a first major surface, a...
8466739 3D chip stack skew reduction with resonant clock and inductive coupling  
There is provided a clock distribution network for synchronizing global clock signals within a 3D chip stack having two or more strata. The clock distribution network includes a plurality of clock...
8466497 Semiconductor integrated circuit chip and layout method for the same  
A semiconductor integrated circuit chip mounted on a substrate by flip chip bonding includes: a plurality of electrode pads; a corner portion of a flat periphery of an inner layer; a first linear...
8466541 Low inductance power module  
A power module includes a housing, a power semiconductor die enclosed within the housing and a first power terminal embedded in the housing and electrically connected to the power semiconductor...