|
Match
|
Document |
Document Title |
|
|
7196411 |
Heat dissipation for chip-on-chip IC packages
Disclosed herein are IC package devices and related methods of manufacturing. In one embodiment, an package device includes first and second package substrates, and a first IC chip having at least...
|
|
|
7196427 |
Structure having an integrated circuit on another integrated circuit with an intervening bent adhesive element
Two or more semiconductor packages are stacked with an intervening element that is positioned between within an area surrounded by conductive bumps of a bottom surface of the overlying package....
|
|
|
7193308 |
Intermediate chip module, semiconductor device, circuit board, and electronic device
An intermediate chip for electrically connecting semiconductor chips includes: a substrate having a first side and a second side; a trans-substrate conductive plug which projects to the first side...
|
|
|
7193309 |
Semiconductor package with stacked chips and method for fabricating the same
A semiconductor package with stacked chips and a method for fabricating the same are proposed. The semiconductor package includes a lead frame having a plurality of leads and supporting extensions;...
|
|
|
7193307 |
Multi-layer FET array and method of fabricating
A power array includes a plurality of FET power assemblies and each FET power assembly has at least one field effect transistor mounted to a ciruit board. The circuit boards are arranged atop each...
|
|
|
7193306 |
Semiconductor structure having stacked semiconductor devices
A semiconductor structure includes flip chips or other semiconductor devices that are mounted on printed circuit boards. The printed circuit boards are stacked to increase the circuit density of...
|
|
|
7193310 |
Stacking system and method
A chip stack comprising a flex circuit including a flex substrate having a first conductive pattern disposed thereon and a plurality of leads extending therefrom. Also included in the chip stack...
|
|
|
7191516 |
Method for shielding integrated circuit devices
A high reliability radiation shielding integrated circuit device comprising a plurality of package layers; a radiation shielding lid or base coupled to the plurality of package layers; wherein the...
|
|
|
7193239 |
Three dimensional structure integrated circuit
A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately...
|
|
|
7192847 |
Ultra-thin wafer level stack packaging method
A method of forming an ultra-thin wafer level stack package and structure thereof are provided. The method includes providing a first wafer having a plurality of base chips thereon, selectively...
|
|
|
7190061 |
stack package made of chip scale packages
A stack package of the present invention is made by stacking at least two area array type chip scale packages. Each chip scale package of an adjacent pair of chip scale packages is attached to the...
|
|
|
7190060 |
Three-dimensional stacked semiconductor package device with bent and flat leads and method of making same
A three-dimensional stacked semiconductor package device includes first and second semiconductor package devices and a conductive bond. The first device includes a first insulative housing, a first...
|
|
|
7190059 |
Electronic component with a stack of semiconductor chips and a method for producing the electronic component
The invention relates to a method for producing an electronic component, a stack of semiconductor chips, and an electronic component including a stack of semiconductor chips. The stack has at least...
|
|
|
7190062 |
Embedded leadframe semiconductor package
A semiconductor package comprising a substrate having opposed top and bottom surfaces and a conductive pattern formed thereon. Disposed on the top surface of the substrate is a semiconductor die...
|
|
|
7186576 |
Stacked die module and techniques for forming a stacked die module
Embodiments of the present technique relate to forming die stacks. Specifically, embodiments of the present technique include a method of forming and testing semiconductor die comprising forming a...
|
|
|
7187070 |
Stacked package module
A Stackable package module comprises a plurality of semiconductor devices in stack. One of the semiconductor devices includes a chip with an active surface and a corresponding back surface, a...
|
|
|
7187068 |
Methods and apparatuses for providing stacked-die devices
Methods and apparatuses to provide a stacked-die device comprised of stacked sub-packages. For one embodiment of the invention, each sub-package has interconnections formed on the die-side of the...
|
|
|
7183643 |
Stacked packages and systems incorporating the same
A microelectronic assembly incorporates units stacked one above the other and may include a plurality of similar stacks mounted to a circuit board. Some of the stacks may be inverted, rotated or...
|
|
|
7183655 |
Packaged semiconductor device
A packaged semiconductor device has an integrated chip and a non-integrated chip. The integrated chip has an integrated circuit and first bump pads formed with a narrow pitch. The non-integrated...
|
|
|
7183606 |
Flash memory cell and manufacturing method thereof
A flash memory cell including a p-type substrate, an n-type deep well, a stacked gate structure, a source region, a drain region, a p-type pocket doped region, spacers, a p-type doped region and a...
|
|
|
7184264 |
Connectable memory devices to provide expandable memory
A memory device is described that is capable of expanding an amount of storage capacity available to a host computer without requiring a user to purchase a new, higher capacity memory device that...
|
|
|
7180165 |
Stackable electronic assembly
On implementation of the invention provides a stackable chip-scale package for improving memory density that may be mounted within a limited area or module. A novel staggered routing scheme enables...
|
|
|
7180752 |
Method and structures for implementing enhanced reliability for printed circuit board high power dissipation applications
A method and structures are provided for implementing enhanced reliability for printed circuit board high power dissipation applications. An external return current member provides a return current...
|
|
|
7180166 |
Stacked multi-chip package
A stacked multi-chip package comprising a substrate, a first chip, a lead frame, and a second chip is provided. The first chip is placed on and electrically connected with the substrate. The lead...
|
|
|
7180168 |
Stacked semiconductor chips
A groove is formed on a semiconductor substrate having integrated circuits and electrodes from a first surface. An insulating layer is formed on an inner surface of the groove. A conductive layer...
|
|
|
7180164 |
Semiconductor device
This is a semiconductor apparatus capable of realizing a sharing of parts without introducing enlargement of the apparatus and deterioration in reliability of the wire bonding in case of responding...
|
|
|
7180167 |
Low profile stacking system and method
The present invention provides a system and method that mounts integrated circuit devices onto substrates and a system and method for employing the method in stacked modules. The contact pads of a...
|
|
|
7176560 |
Semiconductor device having a chip—chip structure
A semiconductor device having a chip-on-chip structure wherein; a first semiconductor chip with a memory macro control circuit where a plurality of inter-chip connection terminals and a plurality...
|
|
|
7174627 |
Method of fabricating known good dies from packaged integrated circuits
A known good die is economically fabricated. A tested integrated circuit is provided which includes a die having a bonding location on an upper surface and a lead. An upper portion of the...
|
|
|
7176565 |
Capacitors having separate terminals on three or more sides
A multilayer capacitor comprises separate terminals on at least three sides, and on as many as six sides. The capacitor can be fabricated in a large number of different configurations, types, and...
|
|
|
7176559 |
Integrated circuit package with a balanced-part structure
An integrated circuit package includes a balanced-part structure. The condition of thermal stress of chips connected on a substrate decides the amount, locations, weights, and the material of at...
|
|
|
7173340 |
Daisy chaining of serial I/O interface on stacking devices
A bottom die and a top die stacked on the bottom die are configured to provide a daisy chain function. Both die include an input/output function control bonding pad ( 20 G), a first bonding pad (...
|
|
|
7173325 |
Expansion constrained die stack
Structures and techniques for mounting semiconductor dies are disclosed. In one embodiment, the invention includes a stack of printed wiring board assemblies that are connected via interconnection...
|
|
|
7170145 |
Method of manufacturing semiconductor device, flexible substrate, and semiconductor device
A semiconductor chip 6 is mounted on a flexible substrate 1 wherein internal connecting electrodes 4 to be connected to protruding electrodes 7 on an element surface of the semiconductor...
|
|
|
7170157 |
Semiconductor package having multiple embedded chips
A semiconductor package includes multiple embedded chips, each chip including a common circuit having substantially the same common function. The common circuit in a selected one of the chips is...
|
|
|
7170183 |
Wafer level stacked package
Disclosed are a wafer level stacked package and its manufacturing method. As one example, in such a wafer level stacked package, a first semiconductor die is electrically connected to an upper...
|
|
|
7170159 |
Low CTE substrates for use with low-k flip-chip package devices
Disclosed are techniques that teach the replacement of the typical organic, plastic, or ceramic package substrate used in semiconductor package devices with a low-CTE package substrate. In one...
|
|
|
7170160 |
Chip structure and stacked-chip package
A chip structure including a chip, a first passivation layer, a redistribution layer and a second passivation layer is provided. The chip has a wire bonding area adjacent to one side or two sides...
|
|
|
7170184 |
Treatment of a ground semiconductor die to improve adhesive bonding to a substrate
Methods are provided to improve the adhesive bonding of a semiconductor die to a substrate through an adhesive paste by forming a layer of silicon dioxide on the back surface of the semiconductor...
|
|
|
7170158 |
Double-sided circuit board and multi-chip package including such a circuit board and method for manufacture
A multi-chip package comprises a double-sided circuit board having first and second surfaces. Each surface has a package area and a peripheral area. Each package area has a chip mounting area on...
|
|
|
7166917 |
Semiconductor package having passive component disposed between semiconductor device and substrate
A semiconductor package includes a semiconductor device and a passive component mounted and electrically coupled to a substrate. The passive component is disposed within a cavity portion formed on...
|
|
|
7167373 |
Stacking multiple devices using flexible circuit
One embodiment of the invention includes a flexible circuit and a stiffener. The flexible circuit has first, second, and third portions. The first portion is folded on an upper surface of the third...
|
|
|
7164113 |
Solid state imaging device with semiconductor imaging and processing chips
The present invention provides a small, high-performance imaging device and its application to products at low cost by preventing noise superimposed on a timing pulse feed line from affecting the...
|
|
|
7161234 |
Semiconductor component and production method suitable therefor
A semiconductor component has a lower semiconductor element and an upper semiconductor element. A contact-making region is provided between the lower and the upper semiconductor element that makes...
|
|
|
7159309 |
Method of mounting electronic component on substrate without generation of voids in bonding material
When an electronic component is mounted on a substrate, the electronic component is first placed on the substrate with a solid support interposed between the electronic component and the substrate....
|
|
|
7161249 |
Multi-chip package (MCP) with spacer
A multi-chip package includes a substrate having first bonding pads and second bonding pads, a first chip having chip pads on an active surface, spacers attached to the substrate between the first...
|
|
|
7157309 |
Manufacture of microelectronic fold packages
An elongated strip of a sheetlike substrate bearing microelectronic elements such as semiconductor chips is advanced in a downstream direction through one or more folding stations where successive...
|
|
|
7157787 |
Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices
A method of vertically stacking wafers is provided to form three-dimensional (3D) wafer stack. Such method comprising: selectively depositing a plurality of metallic lines on opposing surfaces of...
|
|
|
7151316 |
Semiconductor device
A semiconductor device includes a substrate, a plurality of bonding fingers formed on the surface of the substrate, and a semiconductor element arranged above the surface of the substrate and...
|
|
|
7148565 |
Etch stop layer for silicon (Si) via etch in three-dimensional (3-D) wafer-to-wafer vertical stack
A method of forming a silicon (Si) via in vertically stacked wafers is provided with a contact plug extending from selected metallic lines of a top wafer and an etch stop layer formed prior to the...
|