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7619264 |
Semiconductor device
An electric fuse includes a wide interconnect and a narrow interconnect. The electric fuse has a juxtaposed region in which a plurality of straight line portions are juxtaposed with each other by...
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7608913 |
Noise isolation between circuit blocks in an integrated circuit chip
An integrated circuit includes a p-well block region having a high resistivity due to low doping concentration formed in a region of a substrate for providing noise isolation between a first...
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7582952 |
Method for providing and removing discharging interconnect for chip-on-glass output leads and structures thereof
Microelectronic devices may be fabricated while being protected from damage by electrostatic discharge. In one embodiment, a shorting circuit is connected to elements of the microelectronic device,...
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7579673 |
Semiconductor device having electrical fuse
A semiconductor device includes a semiconductor substrate, and an electrical fuse provided on the semiconductor substrate. The electrical fuse includes a first fuse link and a second fuse link...
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7576374 |
Semiconductor device with robust polysilicon fuse
A new method is provided to create a polysilicon fuse. The invention provides for applying a first oxide plasma treatment to the surface of the created polysilicon fuse, creating a thin layer of...
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7569907 |
Hybrid chip fuse assembly having wire leads and fabrication method therefor
A chip fuse includes a substrate, a fuse element extending on the substrate, and first and second wire leads coupled to the fuse element. Contact pads may extend over portions of the fuse element...
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7566952 |
On-chip circuit pad structure
Shielded circuit pad is provided where the parasitic capacitance is tuned out by the inclusion of a shunt transmission line stub which reduces the substrate induced loss in millimeter-wave...
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7565637 |
Method of designing package for semiconductor device, layout design tool for performing the same, and method of manufacturing semiconductor device using the same
A package design method for a semiconductor device of designing a package including a package substrate provided with a wiring pattern, a chip mounted on the package substrate, and a sealing resin...
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7550788 |
Semiconductor device having fuse element arranged between electrodes formed in different wiring layers
A semiconductor device includes a lower electrode, an upper electrode, and a fuse element that connects the lower electrode and the upper electrode. The height of the fuse element is greater than...
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7538414 |
Semiconductor integrated circuit device
Disclosed is a semiconductor IC device capable of suppressing the interference of noise generated in one functional block with other functional blocks therein while protecting against electrostatic...
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7504925 |
Electric component with a protected current feeding terminal
An electric device generates a predetermined amount of heat in the event of a malfunction. The electric device is protected from overheating in that it is arranged, with a fuse in a circuit, such...
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7470986 |
Mounting structure, electro-optical device, and electronic apparatus
A mounting structure is provided. The mounting structure includes: a substrate; a line formed on the substrate; an electronic component in which a terminal having a protrusion protruded to the...
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7468546 |
Semiconductor device with a noise prevention structure
A semiconductor device. The device includes a substrate of the first semiconductor type comprising a pad region and a noise prevention structure in the substrate, on least one side of the pad...
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7443020 |
Minimizing number of masks to be changed when changing existing connectivity in an integrated circuit
Dummy stacks, each providing a common point of connectivity potentially across all metal layers, are incorporated along with the functional block in an integrated circuit. When the connectivity of...
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7414313 |
Polymeric conductor donor and transfer method
The present invention relates to a donor laminate for transfer of a conductive layer comprising at least one electronically conductive polymer on to a receiver, wherein the receiver is a component...
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7413936 |
Method of forming copper layers
A programmable package with a fuse embedded therein, and fabrication method are provided. The fuse has first and second terminal ends joined by a central portion defining a fusible link. The ends...
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7402442 |
Physically highly secure multi-chip assembly
A physically secure processing assembly is provided that includes dies mounted on a substrate so as to sandwich the electrical contacts of the dies between the dies and the substrate. The substrate...
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7375982 |
Thin film deposition as an active conductor and method therefor
A method includes populating components in a cavity of a substrate, disposing a polymer over the components and within the cavity. The polymer is cured and a thin film is formed on the polymer. In...
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7354805 |
Method of making electrically programmable fuse for silicon-on-insulator (SOI) technology
A fuse structure and method of forming the same is described, wherein the body of the fuse is formed from a crystalline semiconductor body on an insulator, preferably of a silicon-on-insulator...
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7352050 |
Fuse region of a semiconductor region
In a fuse region of a semiconductor device, and a method of fabricating the same, the fuse region includes an interlayer insulating layer on a semiconductor substrate, a plurality of fuses on the...
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7332791 |
Electrically programmable polysilicon fuse with multiple level resistance and programming
A method to form a programmable resistor device in an integrated circuit device is achieved. The method comprises depositing a semiconductor layer overlying a substrate. The semiconductor layer is...
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7327022 |
Assembly, contact and coupling interconnection for optoelectronics
A novel micro optical system as a platform technology for electrical and optical interconnections, thermal and mechanical assembly and integration of electronic, optoelectronic, passive and active...
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7309898 |
Method and apparatus for providing noise suppression in an integrated circuit
A method and apparatus for improving the latchup tolerance of circuits embedded in an integrated circuit while avoiding the introduction of noise from such tolerance into the power rails.
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7291923 |
Tapered signal lines
In an integrated circuit, a layer including a plurality of conductive wires is described. A first wire, having sidewalls, is tapered from a proximal end which has a first width to a distal end...
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7291902 |
Chip component and method for producing a chip component
A chip component ( 1 ) includes a semiconductor body ( 2 ), in which at least one switchable element ( 6, 62 ) is arranged in a partial region ( 24 ) of the semiconductor body ( 2 ). The partial...
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7245028 |
Split control pad for multiple signal
A control pad is split into two sections for output one of three signals selected from the group consisted of 00, 01, and 11 on an integrated circuit. Each section is internally connected to...
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7242072 |
Electrically programmable fuse for silicon-on-insulator (SOI) technology
A fuse structure and method of forming the same is described, wherein the body of the fuse is formed from a crystalline semiconductor body on an insulator, preferably of a silicon-on-insulator...
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7230319 |
Electronic substrate
A substrate for mounting a device is disclosed. The substrate includes at least one transition for providing an RF connection to a lead of the device, the lead extending from a device input to an...
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7227238 |
Integrated fuse with regions of different doping within the fuse neck
An integrated fuse has regions of different doping located within a fuse neck. The integrated fuse includes a polysilicon layer and a silicide layer. The polysilicon layer includes first and second...
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7215007 |
Circuit and method for suppression of electromagnetic coupling and switching noise in multilayer printed circuit boards
Apparatus for suppressing noise and electromagnetic coupling in the printed circuit board of an electronic device includes an upper conductive plate and an array of conductive coplanar patches...
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7211887 |
connection arrangement for micro lead frame plastic packages
A connection arrangement for a micro lead frame plastic (MLP) package is provided that includes a paddle configured to be connected to a circuit board and a first ground pad and a second ground pad...
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7211843 |
System and method for programming a memory cell
The present invention relates to systems and methods for programming a memory cell. More specifically, the present invention relates to a controlled application of current to a memory cell over a...
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7170148 |
Semi-fusible link system for a multi-layer integrated circuit and method of making same
A semi-fusible link system and method for a multi-layer integrated circuit including active circuitry on a first layer having a metal one layer including a semi-fusible link element on a second...
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7151001 |
Fabrication method of self-aligned ferroelectric gate transistor using buffer layer of high etching selectivity
A fabrication method of a self-aligned ferroelectric gate transistor using a buffer layer of high etching selectivity is disclosed. A stacked structure is formed with a buffer layer with high...
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7135758 |
Surface mount solder method and apparatus for decoupling capacitance and process of making
A system to package high performance microelectronic devices, such as processors, responds to component transients. In one embodiment, the system includes a decoupling capacitor that is disposed...
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7126204 |
Integrated semiconductor circuit with an electrically programmable switching element
The invention relates to a semiconductor circuit ( 20 ) having an electrically programmable switching element ( 10 ), an “antifuse”, which includes a substrate electrode ( 2 ), produced in a...
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7105917 |
Semiconductor device having a fuse connected to a pad and fabrication method thereof
A semiconductor device and a fabrication method thereof are provided. The semiconductor device has a probing pad formed on a chip. The probing pad is connected to an output pad and an internal...
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7091564 |
Semiconductor chip with fuse unit
A semiconductor chip includes a logic circuit unit, at least one memory macro unit having a redundant memory cell which recovers a defect cell, electrode pad rows being arranged around the outside...
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7075107 |
Semiconductor wafer and manufacturing process thereof
A semiconductor wafer includes a wafer body, a plurality of analog IC dies spacedly and alignedly formed on the wafer body to define a scribe line as a margin formed between each two dies wherein...
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7067897 |
Semiconductor device
A semiconductor device comprising a substrate, a plurality of dielectric films formed on the substrate, laid one upon another, and a fuse interconnect-wire formed above the substrate and covered...
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7064409 |
Structure and programming of laser fuse
A method and structure for fabricating a laser fuse and a method for programming the laser fuse. The laser fuse includes a first dielectric layer having two vias filled with a first self-passivated...
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7061070 |
Semiconductor device with fuse arrangement
A semiconductor device is disclosed, which comprises a semiconductor substrate, an interlayer insulation film formed above the semiconductor substrate, a fuse formed on or in the interlayer...
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7057217 |
Fuse arrangement and integrated circuit device using the same
A fuse circuit according to the present invention includes first and second fuses, each of which has a first end and a second end. The first and second ends of the first fuse are connected in a...
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7053495 |
Semiconductor integrated circuit device and method for fabricating the same
A semiconductor integrated circuit device includes: Si substrate; multilevel interconnect layer formed on the Si substrate; and dielectric layer formed on the multilevel interconnect layer....
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7038319 |
Apparatus and method to reduce signal cross-talk
A semiconductor chip package with reduced cross-talk between adjacent signals in a layer of a carrier is disclosed. A first pair of conductors for carrying a first signal is provided in a layer of...
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7033865 |
Thermally conductive substrate, thermally conductive substrate manufacturing method and power module
By providing an end portion of a radiation plate located on and near an end portion of an insulator sheet, to which a lead frame extends, at a position away from the end portion of the insulator...
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7009222 |
Protective metal structure and method to protect low-K dielectric layer during fuse blow process
A method to protect a low-K IMD layer underlying a fuse link during a fuse blowing process including a guarded fuse and method for forming the same including forming a fuse portion comprising two...
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7005727 |
Low cost programmable CPU package/substrate
A programmable package with a fuse embedded therein, and fabrication method are provided. The fuse has first and second terminal ends joined by a central portion defining a fusible link. The ends...
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6989577 |
Semiconductor device having multiple insulation layers
A semiconductor device includes a multiple insulation layer structure in which multiple insulation layers each having interconnection layer are built up and either one of the interconnection layer...
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6936911 |
Semiconductor integrated circuit device
A semiconductor integrated circuit device has a semiconductor integrated circuit chip, a package enclosing the chip, and a plurality of conductors connecting the bonding pads of the chip to the...
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