Matches 1 - 50 out of 395 1 2 3 4 5 6 7 8 >
Match Document Document Title
7629673 Contact etch stop film  
A system and method for improved dry etching system. According to an embodiment, the present invention provides a partially completed integrated circuit device. The partially completed integrated...
7626244 Stressed dielectric devices and methods of fabricating same  
A structure and a method of making the structure. The structure includes a field effect transistor including: a first and a second source/drain formed in a silicon substrate, the first and second...
7625641 Method of forming a crystalline phase material  
A method of forming a crystalline phase material includes: providing stress inducing material within or operatively adjacent a material of a first crystalline phase; and annealing under conditions...
7602012 Semiconductor memory devices with charge traps  
A memory cell in a semiconductor memory device has a pair of charge traps formed on opposite sides of a control electrode, above variable resistance regions in the semiconductor substrate. Each...
7598540 High performance CMOS devices comprising gapped dual stressors with dielectric gap fillers, and methods of fabricating the same  
The present invention relates to complementary metal-oxide-semiconductor (CMOS) devices having gapped dual stressors with dielectric gap fillers. Specifically, each CMOS device of the present...
7586177 Semiconductor-on-insulator silicon wafer  
A method of fabricating a semiconductor-on-insulator semiconductor wafer is described that includes providing first and second semiconductor substrates. A first insulating layer is formed on the...
7566950 Flexible pixel array substrate  
The present invention provides a method for fabricating a flexible pixel array substrate as follows. First, a release layer is formed on a rigid substrate. Next, on the release layer, a polymer...
7564100 Silicon on sapphire wafer  
The present invention provides an SOS wafer comprising a non-transparent polysilicon layer provided on a back surface of a sapphire substrate, a silicon nitride layer which protects the polysilicon...
7550822 Dual-damascene metal wiring patterns for integrated circuit devices  
Methods of forming dual-damascene metal wiring patterns include forming a first metal wiring pattern (e.g., copper wiring pattern) on an integrated circuit substrate and forming an etch-stop layer...
7518193 SRAM array and analog FET with dual-strain layers comprising relaxed regions  
Disclosed is a semiconductor structure and associated method of performing the structure with good performance and stability trade-offs for digital circuits and SRAM cells and/or analog FETs on the...
7446395 Device having dual etch stop liner and protective layer  
The present invention provides a semiconductor device having dual nitride liners, a silicide layer, and a protective layer beneath one of the nitride liners for preventing the etching of the...
7397073 Barrier dielectric stack for seam protection  
The present invention provides a semiconducting device including a gate dielectric atop a semiconducting substrate, the semiconducting substrate containing source and drain regions adjacent the...
7368804 Method and apparatus of stress relief in semiconductor structures  
A method, apparatus and system are provided for relieving stress in the via structures of semiconductor structures whenever a linewidth below a via is larger than a ground-rule, including providing...
7358595 Method for manufacturing MOS transistor  
Disclosed is a method for fabricating a MOS transistor. The present method includes forming a buffer layer pattern including nitrogen on the semiconductor substrate; forming a gate insulating layer...
7352053 Insulating layer having decreased dielectric constant and increased hardness  
A method of manufacturing a mechanically robust insulating layer, including forming a low-k dielectric layer having a first dielectric constant on a substrate and forming a carbon nitride cap layer...
7315076 Display device and manufacturing method of the same  
A display device is provided in which contact holes, each having a sidewall with an ideal tapered shape, are formed in a structure in which a silicon oxide film, a silicon nitride film and a...
7304386 Semiconductor device having a multilayer wiring structure  
The present invention provides a semiconductor device having a multilayer wiring structure including a lower Cu buried-wiring layer, a SiC film, a SiOC film of 400 nm in thickness functioning as an...
7253501 High performance metallization cap layer  
A semiconductor device having a nonconductive cap layer comprising a first metal element. The nonconductive cap layer comprises a first metal nitride, a first metal oxide, or a first metal...
7242096 Semiconductor device and method for manufacturing the same  
The present invention provides a semiconductor device having a multilayer wiring structure including a lower Cu buried-wiring layer, a SiC film, a SiOC film of 400 nm in thickness functioning as an...
7202568 Semiconductor passivation deposition process for interfacial adhesion  
A method of passivating an integrated circuit (IC) is provided. An insulating layer is formed onto the IC. An adhesion layer is formed onto a surface of the insulating layer by treating the surface...
7192851 Semiconductor laser manufacturing method  
A method for manufacturing a semiconductor laser. As a preparative step for coating an end face of a resonator with a dielectric film, a cleavage plane of a semiconductor laminated structure that...
7190033 CMOS device and method of manufacture  
A CMOS device and manufacturing method thereof wherein a bilayer etch stop is used over a PMOS transistor, and a single etch stop layer is used for an NMOS transistor, for forming contacts to the...
7173296 Reduced hydrogen sidewall spacer oxide  
An embodiment of the invention is a method of making a semiconductor structure 10 where the spacer oxide layer 90 is formed by a hydrogen free precursor CVD process. Another embodiment of the...
7141848 Memory device and dissimilar capacitors formed on same substrate  
A semiconductor device has a split-gate type memory transistor, a capacitor element, and another capacitor element formed on the same chip, in which the capacitor values of the capacitor element...
7122878 Method to fabricate high reliable metal capacitor within copper back-end process  
A new method is provided for the creation of a high-reliability metal capacitor as part of back-end processing. A first layer of metal interconnect is created, ac contact point is provided in the...
7118987 Method of achieving improved STI gap fill with reduced stress  
A shallow trench isolation (STI) structure and method of forming the same with reduced stress to improve charge mobility the method including providing a semiconductor substrate comprising at least...
7115954 Semiconductor device including stress inducing films formed over n-channel and p-channel field effect transistors and a method of manufacturing the same  
A semiconductor device has an n channel conductivity type field effect transistor having a channel formation region formed in a first region on one main surface of a semiconductor substrate and a p...
7109101 Capping layer for reducing amorphous carbon contamination of photoresist in semiconductor device manufacture; and process for making same  
In the fabrication of semiconductor devices using the PECVD process to deposit hardmask material such as amorphous carbon, structure and process are described for reducing migration of species from...
7095083 Methods for making semiconductor structures having high-speed areas and high-density areas  
Methods for making a semiconductor structure are discussed. The methods include forming openings in a high-density area and a high-speed area, and forming a metallization layer simultaneously into...
7078815 Semiconductor integrated circuit device  
A semiconductor integrated circuit device has a semiconductor substrate, an interlayer insulating film including SiOF films formed on a main surface of the semiconductor substrate, a wiring groove...
7071538 One stack with steam oxide for charge retention  
A semiconductor device includes a substrate that further includes source, drain and channel regions. The device may further include a bottom oxide layer formed upon the substrate, a charge storage...
7071111 Sealed nitride layer for integrated circuits  
The present invention relates to an integrated circuit having a sealed nitride layer. In one embodiment, a method of forming a sealing nitride layer overlaying a silicon oxide layer in a contact...
7057263 Semiconductor wafer assemblies comprising photoresist over silicon nitride materials  
In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the...
7038303 Semiconductor device and method for manufacturing the same  
An object of the present invention is to increase adhesiveness between thin films, particularly a high molecular film formed on an insulating surface, and the present invention provides a...
7019385 Semiconductor device and method of fabricating same  
There are disclosed TFTs having improved reliability. An interlayer dielectric film forming the TFTs is made of a silicon nitride film. Other interlayer dielectric films are also made of silicon...
7009281 Small volume process chamber with hot inner surfaces  
A system and method of processing a substrate including loading a substrate into a plasma chamber and setting a pressure of the plasma chamber to a pre-determined pressure set point. Several inner...
7005724 Semiconductor device and a method of manufacture therefor  
The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the aforementioned semiconductor device. The semiconductor device, in...
6995472 Insulating tube  
An insulating tube includes a underlying insulating film, a first sidewall insulating film disposed on the underlying insulating film, a second sidewall insulating film disposed on the underlying...
6992370 Memory cell structure having nitride layer with reduced charge loss and method for fabricating same  
According to one embodiment, a memory cell structure comprises a semiconductor substrate, a first silicon oxide layer situated over the semiconductor substrate, a charge storing layer situated over...
6960809 Polysilicon thin film transistor and method of forming the same  
A polysilicon thin film transistor and a method of forming the same is provided. A poly-island layer is formed over a substrate. A gate insulation layer is formed over the poly-island layer. A gate...
6960794 Formation of thin channels for TFT devices to ensure low variability of threshold voltages  
A thin film transistor with a channel less than 100 angstroms thick, preferably less than 80 angstroms thick, preferably less than 60 angstroms thick. The very thin channel reduces variability of...
6943432 Semiconductor constructions  
The invention includes a semiconductor construction comprising a semiconductor substrate, and a first layer comprising silicon and nitrogen over the substrate. A second layer comprising at least 50...
6940151 Silicon-rich low thermal budget silicon nitride for integrated circuits  
A low-thermal budget, silicon-rich silicon nitride film may include a concentration of hydrogen in Si—H bonds being at least 1.5 times as great as a concentration of hydrogen in N—H bonds. The...
6914309 Semiconductor device with double sidewall spacer and layered contact  
A semiconductor device has a pair of impurity regions in a semiconductor substrate. A silicon layer is formed on the impurity region. A gate insulating film is formed between the impurity regions....
6911707 Ultrathin high-K gate dielectric with favorable interface properties for improved semiconductor device performance  
An ultrathin gate dielectric having a graded dielectric constant and a method for forming the same are provided. The gate dielectric is believed to allow enhanced performance of semiconductor...
6903422 Semiconductor integrated circuits, fabrication method for the same and semiconductor integrated circuit systems  
A semiconductor integrated circuit is disclosed, which includes a semiconductor substrate, a memory cell formed on the semiconductor substrate and having a first gate insulating layer of a stacked...
6894369 Semiconductor device having a high-dielectric gate insulation film and fabrication process thereof  
An ultra high-speed semiconductor device has a high-K dielectric gate insulator layer, wherein spread of impurities to a Si substrate from a gate electrode through the high-K dielectric gate...
6888225 Process of final passivation of an integrated circuit device  
A process for forming a final passivation layer over an integrated circuit comprises a step of forming, over a surface of the integrated circuit, a protective film by means of High-Density Plasma...
6887776 Methods to form metal lines using selective electrochemical deposition  
Methods are provided for forming a transistor for use in an active matrix liquid crystal display (AMLCD). In one aspect a method is provided for processing a substrate including providing a glass...
6887774 Conductor layer nitridation  
Methods and apparatus for forming word line stacks comprise forming a thin nitride layer coupled between a bottom silicon layer and a conductor layer. In a further embodiment, a diffusion barrier...
Matches 1 - 50 out of 395 1 2 3 4 5 6 7 8 >