Patents in Class 257/639

Matches 1 - 50 out of 160

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Match	Document	Document Title
1	8183647	Semiconductor device and manufacturing method for silicon oxynitride film The present invention provides a semiconductor device comprising: a silicon based semiconductor substrate provided with a step including an non-horizontal surface, a horizontal surface and a...
2	8183136	Method of forming insulating layer and method of manufacturing transistor using the same Provided are a method of forming an insulating layer and a method of manufacturing a transistor using the method. The method of forming the insulating layer includes forming a preliminary...
3	8013392	High mobility CMOS circuits Semiconductor structure formed on a substrate and process of forming the semiconductor. The semiconductor includes a plurality of field effect transistors having a first portion of field effect...
4	7928512	Semiconductor device A semiconductor device is provided herein, which includes a substrate having a first-type MOS transistor, an input/output (I/O) second-type MOS transistor, and a core second-type MOS transistor...
5	7898065	Structure and method for device-specific fill for improved anneal uniformity Disclosed are embodiments of a wafer that incorporates fill structures with varying configurations to provide uniform reflectance. Uniform reflectance is achieved by distributing across the wafer...
6	7855416	Semiconductor device and manufacturing method thereof Channel doping is an effective method for controlling Vth, but if Vth shifts to the order of −4 to −3 V when forming circuits such as a CMOS circuit formed from both an n-channel TFT and a P-c...
7	RE41948	Semiconductor device having multi-layered wiring A semiconductor device is provided with a first insulating film, a first wiring layer formed in the first insulating film, a second insulating film formed above the first wiring layer and the first...
8	7834427	Integrated circuit having a semiconductor arrangement An integrated circuit including a semiconductor arrangement, a power semiconductor component and an associated production method is disclosed. One embodiment includes a carrier substrate, a first...
9	7825443	Semiconductor constructions In one aspect, the invention includes a semiconductor processing method. An antireflective material layer is formed over a substrate. At least a portion of the antireflective material layer is...
10	7804115	Semiconductor constructions having antireflective portions In one aspect, the invention includes a semiconductor processing method. An antireflective material layer is formed over a substrate. At least a portion of the antireflective material layer is...
11	7786552	Semiconductor device having hydrogen-containing layer A method for reducing leakage current in a semiconductor structure is disclosed. One or more dielectric layers are formed on a semiconductor substrate, on which at least one device is constructed....
12	7732923	Impurity doped UV protection layer An ultra-violet (UV) protection layer is formed over a semiconductor workpiece before depositing a UV curable dielectric layer. The UV protection layer prevents UV light from reaching and damaging...
13	7675118	Semiconductor structure with enhanced performance using a simplified dual stress liner configuration A semiconductor structure including an nFET having a fully silicided gate electrode wherein a new dual stress liner configuration is used to enhance the stress in the channel region that lies...
14	7651959	Method for forming silazane-based dielectric film A method of forming a dielectric film includes: introducing a source gas essentially constituted by Si, N, H, and optionally C and having at least one bond selected from Si—N, Si—Si, and Si—H into ...
15	7642203	Passivation layer for semiconductor device and manufacturing method thereof Embodiments relate to a passivation layer for a semiconductor device that may be formed in a substrate having a plurality of semiconductor devices. The passivation layer may includes a first...
16	7638859	Interconnects with harmonized stress and methods for fabricating the same Interconnects with harmonized stress and methods for fabricating the same. An interconnect comprises a substrate having a conductive member. A composite low-k dielectric layer interposed with at...
17	7566950	Flexible pixel array substrate The present invention provides a method for fabricating a flexible pixel array substrate as follows. First, a release layer is formed on a rigid substrate. Next, on the release layer, a polymer...
18	7550823	Nonvolatile memory cell, array thereof, fabrication methods thereof and device comprising the same A nonvolatile memory cell is capable of reducing an excessive current leakage due to a rough surface of a polysilicon and of performing even at a low temperature process by forming the first oxide...
19	7518193	SRAM array and analog FET with dual-strain layers comprising relaxed regions Disclosed is a semiconductor structure and associated method of performing the structure with good performance and stability trade-offs for digital circuits and SRAM cells and/or analog FETs on the...
20	7456474	Semiconductor device having insulating film Channel doping is an effective method for controlling Vth, but if Vth shifts to the order of −4 to −3 V when forming circuits such as a CMOS circuit formed from both an n-channel TFT and a P-c...
21	7432216	Semiconductor device and manufacturing method thereof The technique capable of reducing the power consumption in the MISFET by suppressing the scattering of the carriers due to the fixed charges is provided. A silicon oxynitride film with a physical...
22	7372114	Semiconductor device, and method of fabricating the same A silicon oxynitride film is manufactured using SiH4, N2O and H2 by plasma CVD, and it is applied to the gate insulating film (1004 in FIG. 1A) of a TFT. The characteristics of the silicon...
23	7358595	Method for manufacturing MOS transistor Disclosed is a method for fabricating a MOS transistor. The present method includes forming a buffer layer pattern including nitrogen on the semiconductor substrate; forming a gate insulating layer...
24	7329956	Dual damascene cleaning method A semiconductor structure having a pore sealed portion of a dielectric layer is provided. Exposed pores of the dielectric material are sealed using an anisotropic plasma so that pores along the...
25	7301219	Electrically erasable programmable read only memory (EEPROM) cell and method for making the same An asymmetrically doped memory cell has first and second N+ doped junctions on a P substrate. A composite charge trapping layer is disposed over the P substrate and between the first and the second...
26	7253501	High performance metallization cap layer A semiconductor device having a nonconductive cap layer comprising a first metal element. The nonconductive cap layer comprises a first metal nitride, a first metal oxide, or a first metal...
27	7217989	Composition for selectively polishing silicon nitride layer and polishing method employing it To provide a polishing composition whereby the stock removal rate of a silicon nitride layer is higher than the stock removal rate of a silicon oxide layer, there is substantially no adverse effect...
28	7202551	Display device having underlying insulating film and insulating films A resin material having low dielectric constant is used as an inter-layer insulating film and its bottom surface is contacted with a silicon oxide film across the whole surface thereof. Thereby,...
29	7202568	Semiconductor passivation deposition process for interfacial adhesion A method of passivating an integrated circuit (IC) is provided. An insulating layer is formed onto the IC. An adhesion layer is formed onto a surface of the insulating layer by treating the surface...
30	7190033	CMOS device and method of manufacture A CMOS device and manufacturing method thereof wherein a bilayer etch stop is used over a PMOS transistor, and a single etch stop layer is used for an NMOS transistor, for forming contacts to the...
31	7187038	Semiconductor device with MOS transistors with an etch-stop layer having an improved residual stress level and method for fabricating such a semiconductor device A semiconductor device includes a substrate, MOS transistors in the substrate, and a dielectric layer on the MOS transistors. Contact holes are formed through the dielectric layer to provide...
32	7118987	Method of achieving improved STI gap fill with reduced stress A shallow trench isolation (STI) structure and method of forming the same with reduced stress to improve charge mobility the method including providing a semiconductor substrate comprising at least...
33	7115974	Silicon oxycarbide and silicon carbonitride based materials for MOS devices In the preferred embodiment, a gate dielectric and an electrode are formed on a substrate. A pair of spacers is formed along opposite sidewalls of the gate electrode and the gate dielectric....
34	7061075	Shallow trench isolation using antireflection layer A film stack for forming shallow trench isolation among transistors and other devices on a semiconductor substrate is provided, including a plurality of light absorbing layers alternating between a...
35	7057263	Semiconductor wafer assemblies comprising photoresist over silicon nitride materials In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the...
36	7038303	Semiconductor device and method for manufacturing the same An object of the present invention is to increase adhesiveness between thin films, particularly a high molecular film formed on an insulating surface, and the present invention provides a...
37	7009281	Small volume process chamber with hot inner surfaces A system and method of processing a substrate including loading a substrate into a plasma chamber and setting a pressure of the plasma chamber to a pre-determined pressure set point. Several inner...
38	7005724	Semiconductor device and a method of manufacture therefor The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the aforementioned semiconductor device. The semiconductor device, in...
39	6995472	Insulating tube An insulating tube includes a underlying insulating film, a first sidewall insulating film disposed on the underlying insulating film, a second sidewall insulating film disposed on the underlying...
40	6949833	Combined atomic layer deposition and damascene processing for definition of narrow trenches The invention offers a structure that includes a substrate with a top surface and a bottom surface, an etched dielectric layer having sidewalls and an upper surface, wherein the etched dielectric...
41	6943432	Semiconductor constructions The invention includes a semiconductor construction comprising a semiconductor substrate, and a first layer comprising silicon and nitrogen over the substrate. A second layer comprising at least 50...
42	6924197	Method of fabricating an integrated circuit with a dielectric layer exposed to a hydrogen-bearing nitrogen source The present invention provides a flash memory integrated circuit and a method of fabricating the same. A tunnel dielectric in an erasable programmable read only memory (EPROM) device is nitrided...
43	6921937	Integrated circuit with a dielectric layer exposed to a hydrogen-bearing nitrogen source The present invention provides a flash memory integrated circuit and a method of fabricating the same. A tunnel dielectric in an erasable programmable read only memory (EPROM) device is nitrided...
44	6911707	Ultrathin high-K gate dielectric with favorable interface properties for improved semiconductor device performance An ultrathin gate dielectric having a graded dielectric constant and a method for forming the same are provided. The gate dielectric is believed to allow enhanced performance of semiconductor...
45	6888225	Process of final passivation of an integrated circuit device A process for forming a final passivation layer over an integrated circuit comprises a step of forming, over a surface of the integrated circuit, a protective film by means of High-Density Plasma...
46	6887774	Conductor layer nitridation Methods and apparatus for forming word line stacks comprise forming a thin nitride layer coupled between a bottom silicon layer and a conductor layer. In a further embodiment, a diffusion barrier...
47	6876065	Semiconductor device and a fabrication method thereof A semiconductor device and fabrication method thereof that uses a far ultraviolet ray photolithography, which may be used to prevent the lift phenomenon of a photoresist pattern, is disclosed. The...
48	6798065	Method and apparatus for high-resolution in-situ plasma etching of inorganic and metals films Method and apparatus for plasma etching both metal and inorganic dielectric layers in a single chamber during deep sub-micron semiconductor fabrication. Fluorine based chemistries, or a mixture of...
49	6784485	Diffusion barrier layer and semiconductor device containing same A semiconductor device containing a diffusion barrier layer is provided. The semiconductor device includes at least a semiconductor substrate containing conductive metal elements; and, a diffusion...
50	6784100	Capacitor with oxidation barrier layer and method for manufacturing the same This invention provides a capacitor and a method for manufacturing of the same, which are adaptable to preventing a lower electrode from being oxidized at a following thermal process. The capacitor...

Matches 1 - 50 out of 160

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