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7612453 |
Semiconductor device having an interconnect structure and a reinforcing insulating film
A semiconductor device includes in an interconnect structure which includes a first interconnect made of a copper-containing metal, a first Cu silicide layer covering the upper portion of the first...
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7602040 |
Semiconductor device and a method of manufacturing the same
In order to improve the reliability of a semiconductor device having a fuse formed by a Damascene technique, a barrier insulating film and an inter-layer insulating film are deposited over a...
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7569495 |
Semiconductor devices and methods of manufacturing the same
Semiconductor devices and methods of manufacturing the same are disclosed. In a disclosed method, a dangling bond in the active region(s) is removed by providing an enough H 2 in the PMD liner...
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7566950 |
Flexible pixel array substrate
The present invention provides a method for fabricating a flexible pixel array substrate as follows. First, a release layer is formed on a rigid substrate. Next, on the release layer, a polymer...
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7550822 |
Dual-damascene metal wiring patterns for integrated circuit devices
Methods of forming dual-damascene metal wiring patterns include forming a first metal wiring pattern (e.g., copper wiring pattern) on an integrated circuit substrate and forming an etch-stop layer...
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7485949 |
Semiconductor device
A semiconductor device is disclosed. The device includes a substrate, a first porous SiCOH dielectric layer, a second porous SiCOH dielectric layer, and an oxide layer. The first porous SiCOH...
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7402892 |
Printed circuit board for connecting of multi-wire cabling to surge protectors
A printed circuit board assembly for coupling a plurality of surge protectors to multi-line communication cables includes a multi-layer printed circuit board, to which has been mounted at least two...
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7402833 |
Multilayer dielectric tunnel barrier used in magnetic tunnel junction devices, and its method of fabrication
A multilayer dielectric tunnel barrier structure and a method for its formation which may be used in non-volatile magnetic memory elements comprises an ALD deposited first nitride junction layer...
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7397073 |
Barrier dielectric stack for seam protection
The present invention provides a semiconducting device including a gate dielectric atop a semiconducting substrate, the semiconducting substrate containing source and drain regions adjacent the...
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7391094 |
Semiconductor structure and method of making same
A semiconductor structure includes a substrate having a surface and being made of a material that provides atypical surface properties to the surface, a bonding layer on the surface of the...
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7385276 |
Semiconductor device, and method for manufacturing the same
The invention is characterized by attaining a lower dielectric constant and including an inorganic dielectric film which is formed on the surface of a substrate and has a cyclic porous structure...
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7368804 |
Method and apparatus of stress relief in semiconductor structures
A method, apparatus and system are provided for relieving stress in the via structures of semiconductor structures whenever a linewidth below a via is larger than a ground-rule, including providing...
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7368782 |
Dual-bit non-volatile memory cell and method of making the same
A non-volatile memory cell having a local silicon nitride layer to control dispersion of hot electrons is disclosed. The dual-bit non-volatile memory cell has a stack of layers including silicon on...
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7361974 |
Manufacturing method for an integrated semiconductor structure
The present invention provides a manufacturing method for an integrated semiconductor structure comprising the steps of: providing a semiconductor substrate having a plurality of gate stacks in a...
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7358587 |
Semiconductor structures
In one aspect, the invention includes a method of forming a material within an opening, comprising: a) forming an etch-stop layer over a substrate, the etch-stop layer having an opening extending...
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7315076 |
Display device and manufacturing method of the same
A display device is provided in which contact holes, each having a sidewall with an ideal tapered shape, are formed in a structure in which a silicon oxide film, a silicon nitride film and a...
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7312400 |
Multilayer wiring board, base for multilayer wiring board, printed wiring board and its manufacturing method
A multilayer wiring board assembly component comprises: an insulating substrate component (the insulating resin layer 111 ); a conductive layer 112 formed on one surface of said insulating...
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7285826 |
High mobility CMOS circuits
Semiconductor structure formed on a substrate and process of forming the semiconductor. The semiconductor includes a plurality of field effect transistors having a first portion of field effect...
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7265437 |
Low k dielectric CVD film formation process with in-situ imbedded nanolayers to improve mechanical properties
A low k dielectric stack having an effective dielectric constant k, of about 3.0 or less, in which the mechanical properties of the stack are improved by introducing at least one nanolayer into the...
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7259432 |
Semiconductor device for reducing parasitic capacitance produced in the vicinity of a transistor located within the semiconductor device
A semiconductor device includes: a gate electrode formed on a substrate; impurity regions formed in the substrate and to both sides of the gate electrode; a first interlayer insulating film formed...
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7256421 |
Display device having a structure for preventing the deterioration of a light emitting device
A structure for preventing deteriorations of a light-emitting device and retaining sufficient capacitor elements' (condenser) required by each pixel is provided. A first passivation film, a second...
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7250364 |
Semiconductor devices with composite etch stop layers and methods of fabrication thereof
Semiconductor devices with composite etch stop layers and methods of fabrication thereof. An semiconductor device with a composite etch stop layer includes a substrate having a conductive member, a...
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7235493 |
Low-k dielectric process for multilevel interconnection using mircocavity engineering during electric circuit manufacture
One embodiment of a method for forming a low-k dielectric for a semiconductor device assembly comprises forming a silicon dioxide layer, then forming a patterned masking layer such as silicon...
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7227244 |
Integrated low k dielectrics and etch stops
A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or...
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7208423 |
Semiconductor device fabrication method and semiconductor device
A resist pattern ( 5 ) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film ( 4 ) over a work film ( 3 ). The material film ( 4 ) is processed using the...
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7196422 |
Low-dielectric constant structure with a multilayer stack of thin films with pores
The present invention describes a structure having a multilayer stack of thin films, the thin films being a low-dielectric constant material, the thin films having pores, and a method of forming...
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7195966 |
Methods of fabricating semiconductor devices including polysilicon resistors and related devices
Methods of fabricating semiconductor devices are provided. Transistors are provided on a semiconductor substrate. A first interlayer insulating layer is provided on the transistors. A second...
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7187038 |
Semiconductor device with MOS transistors with an etch-stop layer having an improved residual stress level and method for fabricating such a semiconductor device
A semiconductor device includes a substrate, MOS transistors in the substrate, and a dielectric layer on the MOS transistors. Contact holes are formed through the dielectric layer to provide...
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7173296 |
Reduced hydrogen sidewall spacer oxide
An embodiment of the invention is a method of making a semiconductor structure 10 where the spacer oxide layer 90 is formed by a hydrogen free precursor CVD process. Another embodiment of the...
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7142576 |
Semiconductor laser
A semiconductor laser includes an active layer formed on a substrate and a pair of cladding layers sandwiching the active layer. On at least one of resonator end faces of the semiconductor laser, a...
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7132732 |
Semiconductor device having two distinct sioch layers
A semiconductor device has a semiconductor substrate, and a multi-layered wiring arrangement provided thereon. The multi-layered wring arrangement includes at least one insulating layer structure...
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7118987 |
Method of achieving improved STI gap fill with reduced stress
A shallow trench isolation (STI) structure and method of forming the same with reduced stress to improve charge mobility the method including providing a semiconductor substrate comprising at least...
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7115956 |
Conductive film as the connector for thin film display device
In the manufacture of a semiconductor device, there are provided a method that enables reduction in the number of manufacturing steps thereof and a structure for realizing the method, to thereby...
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7098515 |
Semiconductor chip with borderless contact that avoids well leakage
An inventive semiconductor chip is provided. Generally, shallow trenches containing field oxide are provided on a substrate. At least one semiconductor device is formed between the shallow...
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7096581 |
Method for providing a redistribution metal layer in an integrated circuit
An integrated circuit includes a portion having at least one active circuit area. The integrated circuit also includes a redistribution metal layer fabricated at least partially during fabrication...
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7084508 |
Semiconductor device with multiple layer insulating film
A lower portion of an interlayer insulating film is formed contiguous with a semiconductor wafer. The lower portion has a high impurity concentration and a high etching rate. An upper portion of an...
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7075170 |
Semiconductor device and production method therefor
The invention is characterized by attaining a lower dielectric constant and including an inorganic dielectric film which is formed on the surface of a substrate and has a cyclic porous structure...
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7067923 |
Semiconductor device having hall-effect and manufacturing method thereof
A first insulation film is made of a silicon material and is provided on a semiconductor base. A second insulation film is made of an organic material and is provided on the first insulation film....
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7057263 |
Semiconductor wafer assemblies comprising photoresist over silicon nitride materials
In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the...
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7019385 |
Semiconductor device and method of fabricating same
There are disclosed TFTs having improved reliability. An interlayer dielectric film forming the TFTs is made of a silicon nitride film. Other interlayer dielectric films are also made of silicon...
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7009281 |
Small volume process chamber with hot inner surfaces
A system and method of processing a substrate including loading a substrate into a plasma chamber and setting a pressure of the plasma chamber to a pre-determined pressure set point. Several inner...
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6975019 |
Semiconductor memory device having a multi-layered interlayer insulation consisting of deuterium and nitride
A semiconductor memory device having a gate insulation film, comprising a semiconductor substrate; a memory cell array formed on the semiconductor substrate, the memory cell array including a...
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6974989 |
Structure and method for protecting memory cells from UV radiation damage and UV radiation-induced charging during backend processing
According to one exemplary embodiment, a structure comprises a substrate. The structure further comprises at least one memory cell situated on the substrate. The structure further comprises a first...
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6960822 |
Solder mask and structure of a substrate
A substrate includes a dielectric structure, an interconnection structure and a solder mask. The interconnection structure interlaces inside the dielectric structure. The solder mask covers the...
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6958524 |
Insulating layer having graded densification
A method of manufacturing an insulating layer, including forming a first dielectric layer having a first pore size over a substrate, shrinking the first pore size to a second pore size by a first...
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6946405 |
Polyparaxylylene film, production method therefor and semiconductor device
An organic polymer film of low dielectric constant and high heating resistance which is applicable as an insulating layer of a semiconductor devices is provided, as well as a manufacturing method...
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6936533 |
Method of fabricating semiconductor devices having low dielectric interlayer insulation layer
A method of fabricating a semiconductor device having a low dielectric constant is disclosed. According to the method, a silicon oxycarbide layer is formed, treated with plasma, and patterned. The...
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6921964 |
Semiconductor device having a non-volatile memory transistor formed on a semiconductor
A semiconductor device includes a non-volatile memory transistor 100 . An interlayer dielectric layer 40 is provided on a semiconductor layer 10 where the non-volatile memory transistor 100 ...
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6913814 |
Lamination process and structure of high layout density substrate
A lamination process and structure of a high layout density substrate is disclosed. The lamination process comprises the following steps. First of all, a plurality of laminating layers are...
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6911686 |
Semiconductor memory device having planarized upper surface and a SiON moisture barrier
There is provided a semiconductor device which is manufactured via steps of forming a capacitor which is obtained by forming in sequence an upper electrode, a dielectric film formed of...
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