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7612433 Semiconductor device having self-aligned contact  
A method of manufacturing semiconductor devices having self-aligned contacts is provided. Multiple isolation structures are formed on the substrate to define an active area. Multiple gate...
7596862 Method of making a circuitized substrate  
A method of making the circuitized substrate. The circuitized substrate includes a substrate having a substantially planar upper surface and a conductive layer positioned on the substantially...
7569896 Transistors with stressed channels  
A MOS device having optimized stress in the channel region and a method for forming the same are provided. The MOS device includes a gate over a substrate, a gate spacer on a sidewall of the gate...
7569409 Isolation structures for CMOS image sensor chip scale packages  
Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support...
7547949 Semiconductor structures and memory device constructions  
The invention includes a semiconductor structure having a gateline lattice surrounding vertical source/drain regions. In some aspects, the source/drain regions can be provided in pairs, with one of...
7547932 Vertical gate-depleted single electron transistor  
A vertical gate-depleted single electron transistor (SET) is fabricated on a conducting or insulating substrate. A plurality of lightly doped basic materials and tunneling barriers are fabricated...
7541624 Flat profile structures for bipolar transistors  
A method for fabricating a bipolar transistor includes forming collector, base, and emitter semiconductor layers on a substrate such that the layers form a vertical sequence with respect to an...
7538413 Semiconductor components having through interconnects  
A semiconductor component includes a semiconductor substrate having a substrate contact on a circuit side thereof in electrical communication with an integrated circuit, and a through interconnect...
7528403 Hybrid silicon-on-insulator waveguide devices  
Device designs and techniques for providing efficient hybrid silicon-on-insulator devices where a silicon waveguide core or resonator is clad by the insulator and a top functional cladding layer in...
7514368 Flash memory device  
Embodiments relate to a flash memory device and a method of manufacturing a flash memory device, which may increase a coupling coefficient between a control gate and a floating gate by increasing a...
7495276 Radio frequency arrangement, method for producing a radio frequency arrangement and use of the radio frequency arrangement  
A radio frequency arrangement is disclosed, having a first semiconductor body with an integrated circuit formed therein and also with first and second terminal locations. A second semiconductor...
7476561 Method of making microminiature moving device  
In a microminiature moving device that has disposed, on a single-crystal silicon substrate, movable elements (a movable rod 46 , a movable comb electrode 49 , etc.) displaceable in parallel to...
7473970 Concurrent fin-fet and thick body device fabrication  
An integrated circuit chip and a semiconductor structure. The integrated circuit chip includes: a thick-body device containing a semiconductor mesa and a doped body contact; and a field effect...
7473946 CMOS structure and method including multiple crystallographic planes  
A complementary metal oxide semiconductor (CMOS) structure includes a semiconductor substrate having first mesa having a first ratio of channel effective horizontal surface area to channel...
7470629 Structure and method to fabricate finfet devices  
There is provided a method for fabricating a FinFET in which a self-limiting reaction is employed to produce a unique and useful structure that may be detectable with simple failure analysis...
7456040 Method for producing semiconductor optical device  
The present invention is to provide a method for manufacturing a semiconductor optical device, in which the unevenness of the burying of the mesa structure may be reduced. The process is configured...
7446001 Method for forming a semiconductor-on-insulator (SOI) body-contacted device with a portion of drain region removed  
A method for making a semiconductor device includes patterning a semiconductor layer, overlying an insulator layer, to create a first active region and a second active region, wherein the first...
7432539 Imaging method utilizing thyristor-based pixel elements  
An improved imaging array (and corresponding method of operation) includes a plurality of heterojunction thyristor-based pixel elements disposed within resonant cavities formed on a substrate. Each...
7408241 Semiconductor device with a recessed bond pad  
A semiconductor device with surface-mountable outer contacts and to a process for producing it is disclosed. In one embodiment, surface-mountable outer contacts are arranged on outer contact...
7402837 Light emitting devices with self aligned ohmic contacts  
Methods of fabricating light emitting diodes and light emitting devices are provided that include a substrate, an n-type epitaxial region on the substrate and a p-type epitaxial region on the...
7378707 Scalable high density non-volatile memory cells in a contactless memory array  
A plurality of mesas are formed in the substrate. Each pair of mesas forms a trench. A plurality of diffusion areas are formed in the substrate. A mesa diffusion area is formed in each mesa top and...
7361973 Embedded stressed nitride liners for CMOS performance improvement  
The present invention provides a semiconducting device including a gate region positioned on a mesa portion of a substrate; and a nitride liner positioned on the gate region and recessed surfaces...
7358594 Method of forming a low k polymer E-beam printable mechanical support  
A low-k interconnect dielectric layer is strengthened by forming pillars of hardened material in the low-k film. An E-beam source is used to expose a plurality of pillar locations. The locations...
7354799 Methods for anchoring a seal ring to a substrate using vias and assemblies including an anchored seal ring  
Disclosed are embodiments of a method for forming a seal ring on a substrate that is anchored to the substrate by a number of vias. Also disclosed are embodiments of an assembly including such an...
7348642 Fin-type field effect transistor  
Disclosed herein are improved fin-type field effect transistor (FinFET) structures and the associated methods of manufacturing the structures. In one embodiment FinFET drive current is optimized by...
7348641 Structure and method of making double-gated self-aligned finFET having gates of different lengths  
A gated semiconductor device is provided, in which the body has a first dimension extending in a lateral direction parallel to a major surface of a substrate, and second dimension extending in a...
7335942 Field effect transistor sensor  
The invention relates to a sensor, especially for the probe of a screen probe microscope, for examining probe surfaces ( 40 ) or areas adjacent to the sensor, comprising at least one field effect...
7335593 Method of fabricating semiconductor device  
A gate metal is formed in a film, the foregoing gate metal is partially etched per each TFT having a different property, and a gate electrode is fabricated. Specifically, a resist mask is...
7325299 Method of making a circuitized substrate  
A method of making a circuitized substrate. A conductive layer having a substantially planar upper surface is formed on and in direct mechanical contact with an upper surface of a substrate. A...
7294908 Method of forming a gate pattern in a semiconductor device  
A gate pattern having a critical dimension after an etching process of 60-70nm may be formed using an ArF photoresist as an etching mask by a method including sequentially forming a gate oxide...
7288828 Metal oxide semiconductor transistor device  
A metal-oxide-semiconductor (MOS) transistor device is provided. The MOS transistor device includes a substrate, a gate structure, a spacer, a source/drain region and a barrier layer. The gate...
7276763 Structure and method for forming the gate electrode in a multiple-gate transistor  
In a method of forming semiconductor device, a semiconductor fin is formed on a semiconductor-on-insulator substrate. A gate dielectric is formed over at least a portion of the semiconductor fin. A...
7262435 Single-transverse-mode laser diode with multi-mode waveguide region and manufacturing method of the same  
A laser diode with a single-transverse-mode output having a laser cavity comprising both single-mode and multi-mode waveguide portions, and a method of manufacturing such a laser diode are...
7256433 Bipolar transistor and a method of manufacturing the same  
A bipolar transistor having enhanced characteristics is fabricated by etching a base mesa, which is formed below an emitter mesa (upper emitter layer) and a base electrode, so as to have jut...
7245002 Semiconductor substrate having a stepped profile  
A semiconductor substrate which effectively prevents a chipping phenomenon, wherein the outer peripheral extremity of the insulation layer is located between the outer peripheral extremity of the...
7233028 Gallium nitride material devices and methods of forming the same  
The invention provides gallium nitride material devices, structures and methods of forming the same. The devices include a gallium nitride material formed over a substrate, such as silicon....
7224043 Semiconductor element with improved adhesion characteristics of the non-metallic surfaces  
The invention relates to a semiconductor element with metallic and non-metallic surfaces, with the non-metallic surfaces of the semiconductor being provided with a layer which has irregularities,...
7199448 Integrated circuit configuration comprising a sheet-like substrate  
An integrated circuit is formed on a non-planar substrate. The integrated circuit is formed over a plurality of layers. Chemical or physical changes in the microstructure of the substrate cause the...
7183160 Manufacturing process for a flash memory and flash memory thus produced  
The invention relates to a production process for a flash memory from a semi-conductor substrate fitted with at least two adjacent rows of precursor stacks of floating gate transistors, the...
7166894 Schottky power diode with SiCOI substrate and process for making such diode  
The present invention relates to a power junction device including a substrate of the SiCOI type with a layer of silicon carbide ( 16 ) insulated from a solid carrier ( 12 ) by a buried layer of...
7148526 Germanium MOSFET devices and methods for making same  
A double gate germanium metal-oxide semiconductor field-effect transistor (MOSFET) includes a germanium fin, a first gate formed adjacent a first side of the germanium fin, and a second gate formed...
7145219 Vertical integrated circuits  
A method for fabricating a vertical integrated circuit is disclosed. Integrated circuits are fabricated on a substrate with layers of predetermined weak and strong bond regions where deconstructed...
7141856 Multi-structured Si-fin  
Disclosed is a semiconductor fin construction useful in FinFET devices that incorporates an upper region and a lower region with wherein the upper region is formed with substantially vertical...
7129550 Fin-shaped semiconductor device  
A semiconductor layer in which a primary part of a FinFET is formed, i.e., a fin has a shape which is long in a direction x and short in a direction y. A width of the fin in the direction y changes...
7119384 Field effect transistor and method for fabricating it  
The invention relates to a field effect transistor in which the planar channel region on the upper surface of the elevation is extended in width by means of additional vertical channel regions on...
7102181 Structure and method for dual-gate FET with SOI substrate  
A method of forming a dual gate fin-type field effect transistor (FinFET) structure patterns silicon fins over an insulator and patterns a gate conductor at an angle to the fins. The gate conductor...
7094650 Gate electrode for FinFET device  
In a method of forming a semiconductor device, a self-planarizing conductive layer is formed over a substrate that includes a topography having sharp drop-offs. The self-planarizing conductive...
7091566 Dual gate FinFet  
A field effect transistor (FET), integrated circuit (IC) chip including the FETs and a method of forming the FETS. Each FET includes a device gate along one side of a semiconductor (e.g., silicon)...
7084044 Optoelectronic device and method of manufacture thereof  
The present invention provides an optoelectronic device and a method of manufacture thereof. In one embodiment, the method of manufacturing the optoelectronic device may include creating a...
7084018 Sacrificial oxide for minimizing box undercut in damascene FinFET  
A method of reducing buried oxide undercut during FinFET formation includes forming a fin on a buried oxide layer and forming a source region adjacent a first end of the fin and a drain region...
Matches 1 - 50 out of 490 1 2 3 4 5 6 7 8 9 10 >