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7429522 |
Dicing die-bonding film
A dicing die-bonding film has a supporting substrate, an adhesive layer formed on the supporting substrate, and a die-bonding adhesive layer formed on the adhesive layer, and further has a mark for...
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7420263 |
DBG system and method with adhesive layer severing
An array of grooves ( 23 ) is formed in a first side ( 12 ) of a wafer ( 10 ) during a wafer processing method. A back grinding tape ( 16 ) is adhered to the first side. An amount of material is...
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7420262 |
Electronic component and semiconductor wafer, and method for producing the same
The invention relates to an electronic component and a semiconductor wafer, and a method for producing them. The semiconductor wafer has strip-type separating regions. The separating regions are...
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7417304 |
Electronic device and method for fabricating the same
An electronic device has an element formed in the chip region of a substrate, a plurality of interlayer insulating films formed on the substrate, a wire formed in the interlayer insulating films in...
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7411294 |
Display device having misalignment detection pattern for detecting misalignment between conductive layer and insulating layer
A display device includes a display panel, and the circuit substrate is separately formed and positioned different from the array substrate of the display panel and connected to the display panel....
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7400028 |
Semiconductor device
The present invention provides a technique for improving the reliability of a semiconductor device where spreading of cracking that occurs at the time of dicing to a seal ring can be restricted...
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7399990 |
Wafer-level package having test terminal
A wafer-level package includes a semiconductor wafer having at least one semiconductor chip circuit forming region each including a semiconductor chip circuit each provided with test chip terminals...
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7388272 |
Chip package and producing method thereof
A chip package including a carrier, a chip, a stiffener and a molding compound is provided. A producing method of the chip package includes the steps of disposing a bottom surface of the chip on...
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7387950 |
Method for forming a metal structure
A semiconductor wafer comprises a plurality of die areas, at least a first scribe line area and at least a second scribe line area surrounding each die area, at least a first metal structure...
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7387948 |
Structure and method of forming a semiconductor material wafer
A structure and method of forming a semiconductor material wafer comprising forming an ingot of semiconductor material. A first dielectric layer is formed on the surface of the ingot, and the...
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7387911 |
Application of a thermally conductive thin film to a wafer backside prior to dicing to prevent chipping and cracking
A thermally conductive protective film or layer is applied to the backside surface of a semiconductor wafer prior to a subsequent dicing operation performed on the wafer to singulate the wafer into...
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7382039 |
Edge seal for improving integrated circuit noise isolation
An edge seal structure and fabrication method are described. The edge seal structure includes a high impedance substrate containing a base material and a grounded floating edge seal that is on the...
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7382038 |
Semiconductor wafer and method for making the same
A semiconductor wafer includes a plurality of active circuit die areas, each of which being bordered by a dicing line through which the plurality of active circuit die areas are separated from each...
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7382037 |
Semiconductor device with a peeling prevention layer
The invention is directed to improvement of reliability of a semiconductor device having penetrating electrodes by preventing a protection film and an insulation film peeling. A peeling prevention...
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7378720 |
Integrated stress relief pattern and registration structure
A semiconductor die having an integrated circuit region formed in a substrate comprises at least one die-corner-circuit-forbidden (DCCF) region disposed in the substrate, proximate to the...
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7378330 |
Cleaving process to fabricate multilayered substrates using low implantation doses
A method of forming substrates, e.g., silicon on insulator, silicon on silicon. The method includes providing a donor substrate, e.g., silicon wafer. The method also includes forming a cleave layer...
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7371618 |
Method of manufacturing wafer-level chip-size package and molding apparatus used in the method
Provided are a method of manufacturing wafer-level chip-size packages and a molding apparatus suitable for practicing the method whereby a semiconductor wafer having a plurality of semiconductor...
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7364983 |
Method and apparatus for creating RFID devices
A process is disclosed for creating semiconductor devices such as RFID assemblies wherein an array of dies mounted to a substrate is spaced apart at a first pitch, and the substrate is removed...
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7361971 |
Semiconductor wafer protection structure and laminated protective sheet for use therein
A semiconductor wafer protection structure including a semiconductor wafer and a protective sheet overlaid on a circuit surface of the semiconductor wafer, wherein the protective sheet has a larger...
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7358616 |
Semiconductor stacked die/wafer configuration and packaging and method thereof
A reciprocal design symmetry allows stacked wafers or die on wafer to use identical designs or designs that vary only by a few layers (e.g. metal interconnect layers). Flipping or rotating one die...
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7358153 |
Method for cutting junction board, and chip
A junction board cutting method includes, upon cutting a junction board formed by bonding a second main surface of a first substrate having a first main surface provided with chip areas and scribe...
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7344960 |
Separation method for cutting semiconductor package assemblage for separation into semiconductor packages
A separation method by which a semiconductor package assemblage is cut in a predetermined width W 1 along streets arranged in a lattice pattern to separate the semiconductor package assemblage...
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7344899 |
Die assembly and method for forming a die on a wafer
A method for forming a die on a wafer is provided. The method includes forming on a wafer a die having an active portion that includes integrated circuitry. The method further includes forming at...
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7342320 |
Electronic component with semiconductor chips, electronic assembly composed of stacked semiconductor chips, and methods for producing an electronic component and an electronic assembly
An electronic component includes a semiconductor chip with an active front face and a passive rear face, with contact connections and contact surfaces respectively being provided on the active...
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7342296 |
Wafer street buffer layer
The present invention provides a separating process of a semiconductor device package of wafer level package. The method comprises a step of etching a substrate to form recesses. Then a buffer...
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7339256 |
Semiconductor device
A semiconductor device includes a first insulating layer provided above a semiconductor substrate. The first insulating layer includes a layer consisting essentially of a material having a relative...
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7337425 |
Structured ASIC device with configurable die size and selectable embedded functions
One embodiment of the present invention provides for a master or universal base and base tooling which addresses the general purpose Structured ASIC requirements. Another embodiment of the present...
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7332430 |
Method for improving the mechanical properties of BOC module arrangements
The invention relates to a method for improving the mechanical properties of BOC module arrangements in which chips have 3D structures, solder balls, μ springs or soft bumps which are mechanically...
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7332374 |
Prealignment and gapping for RF substrates
A method is provided for manufacturing electronic module assemblies comprising a plurality of substrates and a housing. The method comprises providing an alignment plate having a plurality of...
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7327014 |
Semiconductor integrated circuit device and process for manufacturing the same
A large area dummy pattern DL is formed in a layer underneath a target T 2 region formed in a scribe region SR of a wafer. A small area dummy pattern in a lower layer and a small area dummy...
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7323397 |
Method and apparatus of fabricating a semiconductor device by back grinding and dicing
A method and apparatus of fabricating a semiconductor device by back grinding and dicing is disclosed. The method may include at least adhering a protection tape for back grinding on a front...
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7314811 |
Method to make corner cross-grid structures in copper metallization
A new method to prevent cracking at the corners of a semiconductor die during dicing is described. Dummy metal structures are fabricated at the corners of the die to prevent cracking. The design...
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7314782 |
Method of manufacturing a semiconductor device and a semiconductor device obtained by means of said method
The invention relates to a method of manufacturing a semiconductor device ( 10 ) in which, in a semiconductor body ( 1 ) with a temporary substrate ( 2 ), at least one semiconductor element ( 3 )...
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7309925 |
Dicing die-bonding film
A dicing die-bonding film has a supporting substrate, an adhesive layer formed on the supporting substrate, and a die-bonding adhesive layer formed on the adhesive layer, and further has a mark for...
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7307337 |
Resin-molded semiconductor device having posts with bumps and method for fabricating the same
A semiconductor apparatus includes a semiconductor device to be mounted on a circuit board; a plurality of conductive posts electrically connected to the semiconductor device; and a plurality of...
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7301222 |
Apparatus for forming a pre-applied underfill adhesive layer for semiconductor wafer level chip-scale packages
An apparatus and method for enhancing the formation of fillets around the periphery of assembled wafer-level chip scale packages when mounted onto substrates. The method includes fabricating a...
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7298022 |
Semiconductor sensor
A protective sheet is fixed to a jig, and regions of the protective sheet corresponding to regions where dicing-cut is to be performed are removed to form grooves. Then, a semiconductor wafer is...
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7288848 |
Overlay mark for measuring and correcting alignment errors
An overlay mark includes at least one hole array formed on a semiconductor substrate and at least one linear trench adjacent to the hole array. The hole array may be formed adjacent to the linear...
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7279775 |
Semiconductor die with protective layer and related method of processing a semiconductor wafer
A semiconductor die and a related method of processing a semiconductor wafer are disclosed in which a first interlayer insulator having a recess region of varying configuration and defining a...
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7271026 |
Method for producing chip stacks and chip stacks formed by integrated devices
The method of the present invention relates to a method for producing a chip stack comprising the steps of manufacturing at least a first and a second integrated structure on a single substrate, an...
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7269803 |
System and method for mapping logical components to physical locations in an integrated circuit design environment
A system and method for mapping Intellectual Property (IP) components onto a pre-fabricated chip slice allows a user to select a target location for placement of an IP component onto a slice. A...
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7265436 |
Non-repeated and non-uniform width seal ring structure
A method of forming an improved seal ring structure is described. A continuous metal seal ring is formed along a perimeter of a die wherein the metal seal ring is parallel to the edges of the die...
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7265032 |
Protective layer during scribing
A method including forming a chemically soluble coating on a plurality exposed contacts on a surface of a circuit substrate; scribing the surface of the substrate along scribe areas; and after...
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7256475 |
On-chip test circuit for assessing chip integrity
A semiconductor chip includes an active inner circuit; a die seal ring surrounding the active inner circuit; a first circuit structure fabricated at a first corner of the semiconductor chip outside...
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7256474 |
Semiconductor device having a guard ring
A multilayer interconnection structure of a semiconductor device includes a first guard ring extending continuously along a periphery of a substrate and a second guard ring extending continuously...
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7256066 |
Flip chip packaging process
A flip chip packaging process uses an underfill as an encapsultant to reduce the possibility of delamination from occurring due to differential coefficients of thermal expansion, and thus the...
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7253027 |
Method of manufacturing hybrid integrated circuit device
A method of manufacturing a hybrid integrated circuit device includes the steps of forming a plurality of units each including a conductive pattern on a surface of a board made of metal, forming...
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7250670 |
Semiconductor structure and fabricating method thereof
A semiconductor structure is provided. The semiconductor structure is disposed on the scribe line of a wafer and is around the chip area of the wafer. The semiconductor structure includes a...
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7250318 |
System and method for providing automated sample preparation for plan view transmission electron microscopy
A system and method is described for providing automated sample preparation for plan view transmission electron microscopy. A sample wafer is microcleaved from a semiconductor wafer and mounted on...
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7238598 |
Formation of a semiconductor substrate that may be dismantled and obtaining a semiconductor element
A method for forming a semiconductor substrate that can be dismantled, comprising the following steps: introduction of gaseous species in the substrate according to conditions enabling the...
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