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7626243 |
ESD protection for bipolar-CMOS-DMOS integrated circuit devices
An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a...
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7602022 |
Surge voltage protection diode with controlled p-n junction density gradients
To prevent the destruction of a semiconductor element due to negative resistance, and to reduce the dynamic resistance of a static electricity prevention diode, the ratio of the maximum electric...
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7601990 |
Method and apparatus for electrostatic discharge protection having a stable breakdown voltage and low snapback voltage
Electrostatic discharge (ESD) protection is provided for an integrated circuit. Snap back from a lower initial critical voltage and critical current is provided, as compared to contemporary...
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7598538 |
ESD protecting circuit and manufacturing method thereof
An ESP protecting circuit and a manufacturing method thereof are provided. The ESP protecting circuit includes a device isolation layer, first and second high-concentration impurity regions, a...
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7514751 |
SiGe DIAC ESD protection structure
A diode for alternating current (DIAC) electrostatic discharge (ESD) protection circuit is formed in a silicon germanium (SiGe) hetrojunction bipolar transistor (HBT) process that utilizes a very...
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7479680 |
Method and apparatus that provides differential connections with improved ESD protection and routing
The present invention provides a single ESD device package that can be used to provide ESD protection to multiple high-speed lines, in particular multiple high-speed differential lines. The present...
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7473973 |
Semiconductor device including metal-oxide-silicon field-effect transistor as a trigger circuit
A semiconductor device includes a silicon-controlled rectifier to protect an internal circuit from electrostatic discharge damage and a first metal-oxide-silicon field-effect transistor to apply a...
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7474011 |
Method for improved single event latch up resistance in an integrated circuit
A process and system for estimating the occurrence of single event latch-up in an integrated circuit. The process involves determining the resistance between each junction and the closest...
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7449751 |
High voltage operating electrostatic discharge protection device
A high voltage operating electrostatic discharge protection device is provided. The high voltage operating electrostatic discharge protection device includes: a first gate structure and a second...
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7439145 |
Tunable semiconductor diodes
A diode structure fabrication method. In a Pā substrate, an N+ layer is implanted. The N+ layer has an opening whose size affects the breakdown voltage of the diode structure. Upon the N+ layer,...
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7420255 |
Semiconductor device incorporating protective diode with stable ESD protection capabilities
A semiconductor device provided with stable ESD protection capabilities, incorporating a transistor and a protective diode to form a power control IC. The semiconductor device includes a...
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7417303 |
System and method for ESD protection
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation...
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7411271 |
Complementary metal-oxide-semiconductor field effect transistor
A complementary metal-oxide-semiconductor field effect transistor (CMOSFET) is provided. The CMOSFET includes a substrate of a first conductivity type, a first epitaxial layer, a well, a second...
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7170107 |
IC chip having a protective structure
An IC chip having a protective structure that is distributed over the semiconductor chip in such a manner that it is not possible to trigger a malfunction in the circuit by means of irradiation...
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7164185 |
Semiconductor component and method of manufacture
A semiconductor component having a tuned variable resistance resistor and a method for manufacturing the tuned variable resistance resistor. A semiconductor process for manufacturing a...
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7138701 |
Electrostatic discharge protection networks for triple well semiconductor devices
An electrostatic discharge protection network that uses triple well semiconductor devices either singularly or in a series configuration. The semiconductor devices are preferably in diode junction...
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7119405 |
Implantation method to improve ESD robustness of thick gate-oxide grounded-gate NMOSFET's in deep-submicron CMOS technologies
An implantation method to improve ESD robustness of thick-oxide grounded-gate NMOSFET's in deep-submicron CMOS technologies. Based on standard process flow in DGO, a thick gate-oxide ESD device is...
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7115952 |
System and method for ESD protection
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation...
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7102199 |
Low voltage transient voltage suppressor and method of making
A method of providing a Transient Voltage Suppression (TVS) device is described utilizing a Metal Oxide Semiconductor (MOS) structure and an Insulated Gate Bipolar Transistor (IGBT) structure. The...
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7067883 |
Lateral high-voltage junction device
A lateral high-voltage junction device for over-voltage protection of an MOS circuit includes a substrate having a first junction region separated from a second junction region by a substrate...
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7061029 |
High-voltage device structure
A high-voltage device structure disposed in a substrate of a first conductivity type includes a first well and a second well each of a second conductivity type, a source diffusion region and a...
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7049663 |
ESD protection device with high voltage and negative voltage tolerance
An electrostatic discharge protection device with high voltage and negative voltage tolerance is provided. The electrostatic discharge protection device comprises: a first type substrate; a first...
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7037785 |
Method of manufacturing flash memory device
Disclosed is a method of manufacturing the flash memory device. The method comprises the steps of sequentially forming a tunnel oxide film, a first polysilicon film and a hard mask film on a...
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7030461 |
Device for electrostatic discharge protection
The present invention is related to an Electrostatic Discharge protection device. This may be a semiconductor device such as a CMOS transistor, having a snap-back IV characteristic, in order to...
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7019382 |
Arrangement for ESD protection of an integrated circuit
To protect a high-frequency integrated circuit ( 1 ) against higher voltages than normal operating voltages on an input/output terminal connected to a bonding pad ( 2 ), a semiconductor varistor (...
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7012305 |
Electro-static discharge protection circuit for dual-polarity input/output pad
An electro-static discharge (ESD) protection circuit for a dual polarity I/O pad is provided. The protection circuit includes a substrate of first type; a deep well region of second type disposed...
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7009253 |
Method and apparatus for preventing microcircuit thermo-mechanical damage during an ESD event
A method and apparatus for preventing thermo-mechanical damage to an electrostatic discharge (ESD) protection device is disclosed. The method and apparatus of the invention use materials with...
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7002218 |
Low capacitance ESD-protection structure under a bond pad
An ESD-protection structure is located substantially under an integrated circuit bond pad. This ESD-protection structure is formed as a low capacitance structure by inserting a forward diode...
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6979869 |
Substrate-biased I/O and power ESD protection circuits in deep-submicron twin-well process
A semiconductor device which includes a P-well which is underneath NMOS fingers. The device includes an N-well ring which is configured so that the inner P-well underneath the NMOS fingers is...
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6960792 |
Bi-directional silicon controlled rectifier structure with high holding voltage for latchup prevention
A bi-directional silicon controlled rectifier structure provides electrostatic discharge (ESD) protection against both positive and negative voltage spikes. The structure utilizes a pair of wells,...
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6953981 |
Semiconductor device with deep substrates contacts
The present invention relates to a semiconductor device arranged at a surface of a semiconductor substrate having an initial doping having an electrical connection comprising at least one plug made...
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6906387 |
Method for implementing electro-static discharge protection in silicon-on-insulator devices
The present invention is a method and apparatus whereby two NMOS or PMOS devices connected in a stacked gate configuration formed on SOI exhibit improved ESD response characteristics. The shared...
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6870202 |
Surge protection semiconductor device
A pnpn thyristor element Thy 1 and six pn diode elements D 1, D 2, D 3, D 4, D 5, and D 6 are formed in a semiconductor substrate of a first conductivity type, and separated into six regions...
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6844596 |
Si-MOS high-frequency semiconductor device
A sophisticated and highly reliable high-frequency Si-MOS semiconductor device having high electrostatic discharge (ESD) resistance. Lateral polysilicon diodes are connected between high-frequency...
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6838745 |
Semiconductor device having a separation structure for high withstand voltage
An n-type well is formed in a p ā -type semiconductor substrate and a p ā -type epitaxial layer is formed on; the n-type well. An n ā -type well is formed in the, p-type epitaxial layer on...
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6833590 |
Semiconductor device
An NMOS transistor circuit has a surge protection circuit connected in parallel with the NMOS transistor. A resistor is connected between a back gate of the NMOS transistor and ground. As a result,...
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6750470 |
Robust field emitter array design
There is provided a field emitter device formed over a semiconductor substrate. The field emitter device includes at least one field emitter tip disposed over the substrate, and a conducting gate...
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6734504 |
Method of providing HBM protection with a decoupled HBM structure
A semiconductor device that includes an integrated circuit and an HBM structure formed on different semiconductor substrates is provided. The HBM structure may include input or output or...
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6730985 |
Semiconductor integrated circuit device
Unnecessary crossing of interconnections are eliminated to reduce the impedance of wiring of an LSI of a semiconductor integrated circuit device. In the semiconductor integrated circuit device of...
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6724050 |
ESD improvement by a vertical bipolar transistor with low breakdown voltage and high beta
A vertical bipolar transistor having low breakdown voltage, low ESD clamping voltage and high beta is fabricated in a semiconductor 301 of a first conductivity type, which has a buried layer 360...
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6713841 |
ESD guard structure
An ESD guard structure includes a self-aligned lateral p+/n+ diode serving as the trigger diode. This lateral trigger diode is largely independent of alignment precisions. The n+ and p+ regions are...
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6664612 |
Semiconductor component having double passivating layers formed of two passivating layers of different dielectric materials
A semiconductor component with passivation includes at least two double passivating layers, of which an uppermost is applied to a planar surface of a layer located therebelow. The double...
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6657241 |
ESD structure having an improved noise immunity in CMOS and BICMOS semiconductor devices
A semiconductor device includes a grounded-gate n-channel field effect transistor (FET) between an I/O pad and ground (V ss ) and/or V cc for providing ESD protection. The FET includes a tap...
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6617649 |
Low substrate-noise electrostatic discharge protection circuits with bi-directional silicon diodes
An integrated circuit device that includes a plurality of electrostatic discharge clamp circuits, variously coupled to VDD, VSS and transistor, having at least one bi-directional silicon diode that...
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6590261 |
Electrostatic discharge protection structure
An electrostatic discharge (ESD) protection structure is disclosed. The ESD protection structure of the present invention uses a resistance capacitance (RC) circuit to distinguish an overshoot...
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6580121 |
Power semiconductor device containing at least one zener diode provided in chip periphery portion
A Zener diode is provided in a chip periphery portion which entirely surrounds at a periphery a unit cell portion and a gate pad portion along first to fourth directions. The Zener diode has an N +...
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6563181 |
High frequency signal isolation in a semiconductor device
A semiconductor device ( 20 ) includes an isolated p-well ( 22 ) formed in a substrate ( 21 ) by a buried n-well ( 25 ) and an n-well ring ( 24 ). The n-well ring ( 24 ) extends from a surface of...
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6538266 |
Protection device with a silicon-controlled rectifier
A semiconductor device for lowering a triggering voltage includes a semiconductor substrate with a first conductivity; a semiconductor region formed in the substrate having a second conductivity; a...
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6538290 |
Static protection device
A static protection device protects an internal circuit of a semiconductor device from surge voltages. An emitter terminal of the PNP transistor is connected to the input/output terminal, a...
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6534834 |
Polysilicon bounded snapback device
A snapback device functions as a semiconductor protection circuit to prevent damage to integrated circuits due to events such as electrostatic discharge and the like. The snapback device is capable...
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