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7615771 |
Memory array having memory cells formed from metallic material
Solid-state memories are disclosed that are comprised of cross-point memory arrays. The cross-point memory arrays include a first plurality of electrically conductive lines and a second plurality...
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7602042 |
Nonvolatile memory device, array of nonvolatile memory devices, and methods of making the same
A nonvolatile memory device including a lower electrode, a resistor structure disposed on the lower electrode, a diode structure disposed on the resistor structure, and an upper electrode disposed...
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7602041 |
Input protection circuit preventing electrostatic discharge damage of semiconductor integrated circuit
An input protection circuit comprises a semiconductor chip, an internal circuit disposed on the semiconductor chip, a first input/output terminal which is disposed on the semiconductor chip and...
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7592206 |
Fuse region and method of fabricating the same
In one embodiment a fuse region includes an insulating layer disposed on a substrate, a fuse disposed on the insulating layer and including a fuse barrier pattern and a fuse conductive pattern,...
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7589363 |
Fuse structures, methods of making and using the same, and integrated circuits including the same
A structure configured to disconnect circuit elements. The structure generally includes a dielectric layer over a light-absorbing structure, and a lens over the dielectric layer and the...
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7579673 |
Semiconductor device having electrical fuse
A semiconductor device includes a semiconductor substrate, and an electrical fuse provided on the semiconductor substrate. The electrical fuse includes a first fuse link and a second fuse link...
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7572682 |
Semiconductor structure for fuse and anti-fuse applications
A fuse/anti-fuse structure is provided in which programming of the anti-fuse is caused by an electromigation induced hillock that is formed adjacent to the fuse element. The hillock ruptures a thin...
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7566593 |
Fuse structure including cavity and methods for fabrication thereof
A fuse structure comprises a cavity interposed between a substrate and a fuse material layer. The cavity is not formed at a sidewall of the fuse material layer, or at a surface of the fuse material...
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7557424 |
Reversible electric fuse and antifuse structures for semiconductor devices
A structure and method of fabricating reversible fuse and antifuse structures for semiconductor devices is provided. In one embodiment, the method includes forming at least one line having a via...
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7550818 |
Method of manufacture of a PCRAM memory cell
The invention provides a method of forming a resistance variable memory element and the resulting element. The method includes forming an insulating layer having an opening therein; forming a metal...
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7538410 |
Fuse structure window
The present invention provides a fuse structure. The fuse structure comprises a substrate, a plurality of conductive layers, a plurality of dielectric layers and a plurality of conductive plugs....
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7531886 |
MOSFET fuse programmed by electromigration
A one-time programmable field effect transistor (FET) e-fuse has a silicided gate connected to the drain while the source is grounded. A voltage stimulus applied to the drain forces current to flow...
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7517762 |
Semiconductor device capable of preventing moisture-absorption of fuse area thereof and method for manufacturing the fuse area
A fuse area of a semiconductor device capable of preventing moisture-absorption and a method for manufacturing the fuse area are provided. When forming a guard ring for preventing permeation of...
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7511355 |
Semiconductor device having fuse element
In a semiconductor device including a switching element and a fuse element which is connected in series with the switching element and which melts and blows out as a result of an electric current...
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7498655 |
Probe-based memory
Apparatuses, a method, and a system for a non-volatile, probe-based memory device are disclosed herein. In various embodiments, probe-based memory may be one-time programmable or rewritable...
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7459747 |
Nonvolatile semiconductor memory device and manufacturing method of the same
The invention realizes a smaller-sized OTP memory cell and large reduction of its manufacturing process and cost. An embedded layer (BN+) to be a lower electrode of a capacitor is formed in a drain...
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7456426 |
Fin-type antifuse
A method of forming an antifuse forms a material layer and then patterns the material layer into a fin. The center portion of the fin is converted into a substantially non-conductive region and the...
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7442626 |
Rectangular contact used as a low voltage fuse element
A repair fuse element and method of construction are disclosed that eliminate or substantially reduce the disadvantages and problems associated with prior fuse elements. In one embodiment, the fuse...
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7436028 |
One-time programmable read only memory and operating method thereof
A one-time programmable read only memory is provided. The memory includes a substrate, a select transistor, an electrode and a dielectric layer. The select transistor is formed on the substrate....
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7425720 |
Semiconductor device
A programmable semiconductor device has a switch element in an interconnection layer, wherein in at least one of the inside of a via, interconnecting a wire of a first interconnection layer and a...
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7414257 |
Switching device for configurable interconnect and method for preparing the same
The present invention relates to a switching device to be irreversibly switched from an electrically isolating off-state into an electrically conducting on-state for use in a configurable...
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7410838 |
Fabrication methods for memory cells
A memory cell and a method of fabricating the same. A first conductive layer on a substrate is provided and a first type doped semiconductor layer is then formed on the first conductive layer. The...
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7405463 |
Gate dielectric antifuse circuit to protect a high-voltage transistor
According to embodiments of the present invention, circuits have elements to protect a high-voltage transistor in a gate dielectric antifuse circuit. An antifuse has a layer of gate dielectric...
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7402888 |
Input protection circuit preventing electrostatic discharge damage of semiconductor integrated circuit
An input protection circuit comprises a semiconductor chip, an internal circuit disposed on the semiconductor chip, a first input/output terminal which is disposed on the semiconductor chip and...
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7402855 |
Split-channel antifuse array architecture
Generally, the present invention provides a variable thickness gate oxide anti-fuse transistor device that can be employed in a non-volatile, one-time-programmable (OTP) memory array application....
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7402463 |
Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application
An anti-fuse structure that included a buried electrically conductive, e.g., metallic layer as an anti-fuse material as well as a method of forming such an anti-fuse structure are provided....
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7396699 |
Method of forming non-volatile resistance variable devices and method of forming a programmable memory cell of memory circuitry
A first conductive electrode material is formed on a substrate. Chalcogenide comprising material is formed thereover. The chalcogenide material comprises A x Se y . A silver comprising layer is...
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7388273 |
Reprogrammable fuse structure and method
A reversible fuse structure in an integrated circuit is obtained through the implementation of a fuse cell having a short thin line of phase change materials in contact with via and line structures...
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7358590 |
Semiconductor device and driving method thereof
A semiconductor device includes a memory with a simple structure, an inexpensive semiconductor device, a manufacturing method and a driving method thereof. One feature is that, in a memory which...
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7358589 |
Amorphous carbon metal-to-metal antifuse with adhesion promoting layers
A metal-to-metal antifuse having a lower metal electrode, a lower thin adhesion promoting layer disposed over the lower metal electrode, an amorphous carbon antifuse material layer disposed over...
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7341892 |
Semiconductor memory cell and method of forming same
A semiconductor memory cell and forming method thereof utilizes a vertical select transistor to eliminate the problem of a large cell surface area in memory cells of the related art utilizing phase...
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7332791 |
Electrically programmable polysilicon fuse with multiple level resistance and programming
A method to form a programmable resistor device in an integrated circuit device is achieved. The method comprises depositing a semiconductor layer overlying a substrate. The semiconductor layer is...
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7329911 |
Semiconductor device including memory cell and anti-fuse element
A semiconductor device includes an anti-fuse portion and a memory cell portion each including a MOSFET structure having a gate insulating film formed on a semiconductor substrate and a gate...
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7323761 |
Antifuse structure having an integrated heating element
The present invention provides antifuse structures having an integrated heating element and methods of programming the same, the antifuse structures comprising first and second conductors and a...
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7312513 |
Antifuse circuit with well bias transistor
An antifuse circuit includes a terminal, an antifuse transistor, and a bias transistor. The antifuse transistor is formed on a substrate. The antifuse transistor is coupled to the terminal and...
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7279772 |
Edge intensive antifuse and method for making the same
An antifuse including a bottom plate having a plurality of longitudinal members arranged substantially parallel to a first axis, a dielectric layer formed on the bottom plate, and a top plate...
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7276775 |
Intrinsic dual gate oxide MOSFET using a damascene gate process
Damascene or non-damascene processing when used with a method that includes (a) forming a mask having an opening therethrough on a structure, said opening having sidewalls; (b) implanting an...
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7274049 |
Semiconductor assemblies
The invention includes a semiconductor processing method wherein an insulative mass is formed across a first electrical node and a second electrical node. The mass has a pair of openings extending...
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7272067 |
Electrically-programmable integrated circuit antifuses
Integrated circuit antifuse circuitry is provided. A metal-oxide-semiconductor (MOS) antifuse transistor serves as an electrically-programmable antifuse. In its unprogrammed state, the antifuse...
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7269898 |
Method for making an edge intensive antifuse
An antifuse including a bottom plate having a plurality of longitudinal members arranged substantially parallel to a first axis, a dielectric layer formed on the bottom plate, and a top plate...
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7262479 |
Layout structure of fuse bank of semiconductor memory device
A fuse bank of a semiconductor memory device is provided. The fuse bank includes first and second laser fuses. The first laser fuse includes a first laser fusing region disposed in a first...
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7256471 |
Antifuse element and electrically redundant antifuse array for controlled rupture location
An antifuse element ( 102 ) having end corners ( 120, 122 ) of a gate electrode ( 104 ) positioned directly above an active area ( 106 ) or bottom electrode. The minimum programming voltage between...
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7253496 |
Antifuse circuit with current regulator for controlling programming current
In one embodiment, an antifuse cell includes a select transistor, a blocking transistor, and an antifuse. The select transistor allows for selection of the antifuse cell among an array of antifuse...
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7253430 |
Controllable ovonic phase-change semiconductor memory device
An ovonic phase-change semiconductor memory device having a reduced area of contact between electrodes of chalcogenide memories, and methods of forming the same are disclosed. Such memory devices...
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7245000 |
Electrically isolated pillars in active devices
A monolithic three dimensional memory array is described. The memory array comprises a first set of strips including a first terminal; a second set of strips including a second terminal; a third...
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7239006 |
Resistor tuning
A structure for resistors and the method for tuning the same. The resistor comprises an electrically conducting region coupled to a liner region. Both the electrically conducting region and the...
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7227239 |
Resettable fuse device and method of fabricating the same
A resettable fuse device is fabricated on one surface of a semiconductor substrate ( 10 ) and includes: a gate region ( 20 ) having first and second ends; a source node ( 81 ) formed in proximity...
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7227169 |
Programmable surface control devices and method of making same
Programmable surface control devices whose physical features, such as surface characteristics and mass distribution, are controlled by the presence or absence of an electrodeposition of metal...
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7215002 |
Electronically programmable antifuse and circuits made therewith
An antifuse device ( 120 ) that includes a bias element ( 124 ) and an programmable antifuse element ( 128 ) arranged in series with one another so as to form a voltage divider having an output...
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7211843 |
System and method for programming a memory cell
The present invention relates to systems and methods for programming a memory cell. More specifically, the present invention relates to a controlled application of current to a memory cell over a...
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