Match Document Document Title
5682058 Multilayer antifuse with low leakage and method of manufacture therefor  
The present invention provides for an antifuse in an integrated circuit, which has a stacked antifuse structure on a first interconnection line. The stacked structure has a first programming layer...
5682059 Semiconductor device including anti-fuse element and method of manufacturing the device  
In a semiconductor device including an anti-fuse element, a first electrode layer is formed on a semiconductor substrate. A first insulating layer is formed only on the first electrode layer for...
5679974 Antifuse element and semiconductor device having antifuse elements  
An antifuse element for a semiconductor device, comprising a bottom electrode made from a conductive material containing a refractory metal and a top electrode made from a conductive material...
5670818 Electrically programmable antifuse  
In an antifuse and metal interconnect structure in an integrated circuit a substrate has an insulating layer disposed on an upper surface, a first multilayer metal interconnect layer disposed on...
5663591 Antifuse with double via, spacer-defined contact  
The present invention provides for a method of forming an antifuse in an integrated circuit having a first insulating layer on a semiconductor substrate. The method comprises forming a first metal...
5661071 Method of making an antifuse cell with tungsten silicide electrode  
An improved antifuse design has been achieved by using a structure including a region of heavily doped N type silicon coated with a layer of ONO (oxide-nitride-oxide). Top contact to the ONO is...
5659182 Three-terminal fuse  
A device and a method for interrupting the continuity of a conductor and linking a pair of conductors are disclosed. The device is a three-terminal fuse having first and second terminals initially...
5656530 Method of making electric field emitter device for electrostatic discharge protection of integrated circuits  
An electrostatic discharge device having a small separation between two traces wherein a voltage above a desired threshold will discharge across the separation through the mechanism of cold cathode...
5648678 Programmable element in barrier metal device  
An integrated circuit 10 has a programmable Zener diode with diffusion regions 18 and 16 and metal contacts 34 and 32. A barrier metal 30 is disposed between one contact 32 and the substrate 12;...
5646879 Zener programmable read only memory  
The present invention teaches a memory comprising an array of memory cells. Each cell of the array in the memory comprises a bus, and a diode, preferably a zener diode, having a substantially low...
5646438 Programmable semiconductor memory  
A programmable semiconductor memory is disclosed which can be fabricated with an MOS process of low complexity and which takes up little space. The memory comprises a MOS field-effect transistor...
5641985 Antifuse element and semiconductor device having antifuse elements  
Antifuse elements for a semiconductor device comprise a bottom electrode, a top electrode, and an antifuse material layer. The bottom electrode is formed of a conductive material having an...
5640308 Field programmable circuit module  
The invention uses a programmable interconnect substrate having a plurality of conductive and interconnectable vias located on one or both surfaces thereof. A customized pattern of bonding pads is...
5629227 Process of making ESD protection devices for use with antifuses  
A process electrostatic discharge ("ESD") protection device is incorporated on a chip with the antifuses that it is designed to protect and is formed as close in time as possible to the deposition...
5625219 Programmable semiconductor device using anti-fuse elements with floating electrode  
A programmable device uses anti-fuse elements. The device has a wiring layer on an insulator film on a semiconductor substrate, and it is programmed by connected condition of this wiring. The...
5625220 Sublithographic antifuse  
This antifuse includes: a sublithographic conductive pattern (18); an antifuse material (24) overlying said sublithographic conductive pattern (18); and a conductive layer (26) overlying the...
5623160 Signal-routing or interconnect substrate, structure and apparatus  
Method and apparatus for interconnecting integrated circuits (ICs) are described. The invented lattice preferably is formed in a plural-layer structure whereby each required interconnect signal has...
5619063 Edgeless, self-aligned, differential oxidation enhanced and difusion-controlled minimum-geometry antifuse and method of fabrication  
The present invention is directed to an antifuse structure and fabrication process wherein the bottom oxide of the ONO antifuse material layer is grown over a small area of N- diffusion surrounded...
5614756 Metal-to-metal antifuse with conductive  
According to a first aspect of the present invention an antifuse structure capable of high density fabrication comprises an antifuse material layer under a plug of an electrically conductive...
5610084 Method of manufacturing an antifuse utilizing nitrogen implantation  
A method of manufacturing a programmable semiconductor element in the form of an anti-fuse, comprising a thin layer of silicon oxide between two electrode regions, such that a connection can be...
5602053 Method of making a dual damascene antifuse structure  
An improved antifuse design has been achieved by providing a structure includes a pair of alternating layers of silicon nitride and amorphous silicon sandwiched between two dual damascene...
5592016 Antifuse with improved antifuse material  
An antifuse comprises first and second electrodes separated by an antifuse material having a thickness selected to impart a desired target programming voltage to the antifuse. The antifuse material...
5587613 Low-capacitance, isotropically etched antifuse and method of manufacture therefor  
The present invention provides for an integrated circuit antifuse structure having a first metal interconnection line, a programing layer over the first interconnection line, an etch stop layer...
5578836 Electrically programmable antifuse element  
An antifuse according to the present invention includes a lower electrode formed from a first metal interconnect layer in an integrated circuit or the like. The lower electrode is disposed on an...
5576554 Wafer-scale integrated circuit interconnect structure architecture  
A system for substrate scale integration by interconnecting a large number of separate memory (or other circuit) modules on a semiconductor substrate so as to electrically exclude both defective...
5576576 Above via metal-to-metal antifuse  
A method for fabricating a metal-to-metal antifuse comprises the steps of (1) forming and defining a first metal interconnect layer; (2) forming an interlayer dielectric layer; (3) forming an...
5572050 Fuse-triggered antifuse  
A programmable integrated circuit for forming conductive links includes a heat-generating programming structure through which current flows upon application of a programming voltage to heat the...
5572409 Apparatus including a programmable socket adapter for coupling an electronic component to a component socket on a printed circuit board  
Two types of programmable elements, fuses and antifuses, are disclosed for forming an electrically programmable socket adapter in one embodiment. The socket adapter can be used for interconnecting...
5572476 Apparatus and method for determining the resistance of antifuses in an array  
An additional column (or row) track is provided in an antifuse based interconnect array containing circuit structures identical to the circuit structures in the remaining columns of the array,...
5572458 Multi-level vROM programming method and circuit  
A method and system for programming vROM programmable memories using antifuses fabricated from undoped amorphous silicon as a high resistance link or layer between two metal layers. Whenever a...
5572062 Antifuse with silicon spacers  
A method and resulting antifuse structure in an integrated circuit include a first metal interconnection layer on a first insulating layer over the substrate of the integrated circuit, a second...
5572061 ESD protection device for antifuses with top polysilicon electrode  
The present invention is directed to providing an electrostatic discharge ("ESD") protection cell for use in an integrated circuit device including antifuses. The ESD protection cell is formed...
5565703 Multi-level antifuse structure  
A multilevel antifuse structure characterized by a substrate, a first antifuse structure formed above the substrate, and a second antifuse structure formed above the first antifuse structure. The...
5561315 Programmable semiconductor device with high breakdown voltage and high-density programmable semiconductor memory having such a semiconductor device  
A programmable semiconductor memory with filament or point diodes in the intersections of a matrix system can be manufactured with minimum dimensions and thus with a very high density owing to the...
5557137 Voltage programmable link having reduced capacitance  
A voltage programmable link structure reduces parasitic capacitance by using ion implantation. The voltage programmable link structure includes a first conductive element placed over a substrate. A...
5550404 Electrically programmable antifuse having stair aperture  
An antifuse comprises a lower electrode and an upper electrode separated by an interlayer dielectric. An antifuse cell opening is disposed in the interlayer dielectric. The antifuse cell opening...
5543656 Metal to metal antifuse  
The antifuse structure of the present invention includes a bottom planarized electrode, an ILD disposed over the bottom electrode, an antifuse cell opening in and through the ILD exposing the...
5541441 Metal to metal antifuse  
The antifuse structure of the present invention includes a bottom planarized electrode, an ILD disposed over the bottom electrode, an antifuse cell opening in and through the ILD exposing the...
5541814 Personalizable multi-chip carrier including removable fuses  
A personalizable multi-chip carrier including a substrate, first and second pluralities of conductors arranged on respective first and second parallel planes, the first and second pluralities of...
5528072 Integrated circuit having a laser connection of a conductor to a doped region of the integrated circuit  
The conductor 15 to be connected to the doped region 12 of the substrate 11 has an edge 15a at which the laser beam 20 is aimed, regulated such as to definitively create a zone of low electrical...
5525830 Metal-to-metal antifuse including etch stop layer  
According to the present invention, planar layers of Nitride (first nitride layer), a-Si (first a-Si layer), Nitride (second Nitride layer) and a-Si (second a-Si layer) are laid down over a first...
5525909 Apparatus and method for measuring programmed antifuse resistance  
Apparatus for measuring the resistance of a programmed antifuse in an integrated circuit is integrated on the same integrated circuit as the antifuse and is controlled by a programming circuit...
5523612 Method of manufacturing an antifuse with doped barrier metal layer and resulting antifuse  
A method of forming an antifuse in an integrated circuit having an insulating layer on a semiconductor substrate is provided. The method comprises forming a first metal interconnection layer on the...
5521423 Dielectric structure for anti-fuse programming element  
An antifuse element suitable for use in FPGA. When a device is miniaturized to reduce the write voltage in an antifuse element and as the film thickness of the antifuse dielectric film is being...
5519248 Circuits for ESD protection of metal-to-metal antifuses during processing  
A static-charge protection device for an antifuse includes an additional second-sized aperture smaller in area than the antifuse apertures disposed in the same inter-electrode dielectric layer....
5514900 Mutlilayered antifuse with intermediate metal layer  
An antifuse structure in an integrated circuit including a first interconnection line, a second interconnection line formed over the first interconnection line, and a plurality of programming...
5510646 Metal-to-metal antifuse with improved diffusion barrier layer  
A metal-to-metal antifuse comprises a lower electrode comprising a first metal layer in an integrated circuit, a first barrier layer formed from a layer of TiW:N disposed over the lower electrode,...
5510629 Multilayer antifuse with intermediate spacer layer  
A method and structure for an improved antifuse in an integrated circuit having a sacrificial layer under a programming layer which forces a conductive link upon programming to be formed away from...
5502326 Semiconductor device provided having a programmable element with a high-conductivity buried contact region  
A semiconductor device includes a programmable element having a doped semiconductor region (4) and a conductor region (6) which are separated from one another by at least a portion of an insulating...
5498886 Circuit module redundancy architecture  
A system and method for wafer scale integration optimized for medium die size integrated circuits by interconnecting a large number of separate memory (or other circuit) modules on a semiconductor...