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7576406 |
Semiconductor device
A plurality of the same kind of npn-type bipolar transistors are disposed regularly on a semiconductor layer that is provided over an insulation layer. The plurality of unit bipolar transistors are...
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7521772 |
Monocrystalline extrinsic base and emitter heterojunction bipolar transistor and related methods
A heterostructure bipolar transistor (HBT) and related methods are disclosed. In one embodiment, the HBT includes a heterostructure bipolar transistor (HBT) including: a substrate; a...
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7492031 |
Semiconductor device
A semiconductor device comprises a first base layer of a first conductive type which has a first surface and a second surface; a second base layer of a second conductive type which is formed on the...
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7466008 |
BiCMOS performance enhancement by mechanical uniaxial strain and methods of manufacture
A BiCMOS device with enhanced performance by mechanical uniaxial strain is provided. A first embodiment of the present invention includes an NMOS transistor, a PMOS transistor, and a bipolar...
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7439607 |
Beta control using a rapid thermal oxidation
A method of forming semiconductor device treating a surface of a substrate to produce a discontinuous growth of a material on the surface through rapid thermal oxidation of the substrate surface at...
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7420228 |
Bipolar transistor comprising carbon-doped semiconductor
A bipolar transistor comprising a collector region of a first conduction type, and a subcollector region of the first conduction type at a first side of the collector region. The transistor further...
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7397070 |
Self-aligned transistor
In one embodiment, a transistor is formed to use two conductors to make electrical connection to one of the active regions of the transistor.
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7375410 |
Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof
The present invention provides a “collector-less” silicon-on-insulator (SOI) bipolar junction transistor (BJT) that has no impurity-doped collector. Instead, the inventive vertical SOI BJT uses...
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7342293 |
Bipolar junction transistors (BJTS) with second shallow trench isolation (STI) regions, and methods for forming same
The present invention relates to bipolar junction transistors (BJTS). The collector region of each BJT is located in a semiconductor substrate surface and adjacent to a first shallow trench...
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7339254 |
SOI substrate for integration of opto-electronics with SiGe BiCMOS
According to an exemplary embodiment, a structure includes a silicon-on-insulator substrate including a buried oxide layer situated over a bulk silicon substrate and a silicon layer situated over...
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7332752 |
Optoelectronic circuit employing a heterojunction thyristor device to convert a digital optical signal to a digital electrical signal
An optoelectronic circuit includes a resonant cavity formed on a substrate and into which is injected an input digital optical signal that encodes bits of information (each bit representing an OFF...
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7300850 |
Method of forming a self-aligned transistor
In one embodiment, a transistor is formed to use two conductors to make electrical connection to one of the active regions of the transistor.
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7173320 |
High performance lateral bipolar transistor
A lateral bipolar transistor includes an emitter region, a base region, a collector region, and a gate disposed over the base region. A bias line is connected to the gate for applying a bias...
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7157785 |
Semiconductor device, the method of manufacturing the same, and two-way switching device using the semiconductor devices
A semiconductor device is disclosed that reduces the reverse leakage current caused by reverse bias voltage application and reduces the on-voltage of the IGBT. A two-way switching device using the...
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7115965 |
Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operation
The present invention provides a “subcollector-less” silicon-on-insulator (SOI) bipolar junction transistor (BJT) that has no impurity-doped subcollector. Instead, the inventive vertical SOI...
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7095094 |
Multiple doping level bipolar junctions transistors and method for forming
A process for forming bipolar junction transistors having a plurality of different collector doping densities on a semiconductor substrate and an integrated circuit comprising bipolar junction...
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7071516 |
Semiconductor device and driving circuit for semiconductor device
A PMOS transistor (Q 2 ) provided for developing a short circuit between the base and emitter of an N-type IGBT during turn-OFF includes a P diffusion region ( 5 ), a P diffusion region ( 6 ), and...
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7067899 |
Semiconductor integrated circuit device
A semiconductor integrated circuit device according to the invention includes an N-type embedded diffusion region between a substrate and a first epitaxial layer in island regions serving as small...
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6972442 |
Efficiently fabricated bipolar transistor
One embodiment is a method for fabricating the base of a bipolar transistor where the method comprises placing a first wafer in an undoped epi chamber. Next a first undoped base layer is grown over...
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6967406 |
Semiconductor integrated circuit
A layout method of a semiconductor integrated circuit is provided which improves characteristics of the circuit by giving hierarchical structure of interconnections regularity. A pair of emitter...
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6953981 |
Semiconductor device with deep substrates contacts
The present invention relates to a semiconductor device arranged at a surface of a semiconductor substrate having an initial doping having an electrical connection comprising at least one plug made...
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6914308 |
Vertical PNP bipolar transistor
A semiconductor device in which a vertical pnp-bipolar transistor is formed in a prescribed element region on a semiconductor substrate includes: a buried n + -layer of a high concentration formed...
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6911715 |
Bipolar transistors and methods of manufacturing the same
A bipolar transistor in which the occurrence of Kirk effect is suppressed when a high current is injected into the bipolar transistor and a method of fabricating the bipolar transistor are...
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6864538 |
Protection device against electrostatic discharges
An ESD protection device encompassing a vertical bipolar transistor that is connected as a diode and has an additional displaced base area. The assemblage has a space-saving configuration and a...
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6847094 |
Contact structure on a deep region formed in a semiconductor substrate
The forming of a contact with a deep region of a first conductivity type formed in a silicon substrate. The contact includes a doped silicon well region of the first conductivity type and an...
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6838709 |
Bipolar transistor
A bipolar transistor includes the first group of transistors 610 a , the second group of transistors 610 b , the third group of transistors 610 c and the fourth group of transistors 610 d ....
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6838745 |
Semiconductor device having a separation structure for high withstand voltage
An n-type well is formed in a p − -type semiconductor substrate and a p − -type epitaxial layer is formed on; the n-type well. An n − -type well is formed in the, p-type epitaxial layer on...
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6806550 |
Evaluation configuration for semiconductor memories
An evaluation configuration has a first MOS evaluation stage, an isolation stage, and a bipolar evaluation stage. The isolation stage is connected between the first MOS evaluation stage and the...
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6777781 |
Base-to-substrate leakage cancellation
The operating temperature range for a vertical PNP transistor can be extended by applying cancellation techniques. The vertical PNP generates a first leakage current from the base-collector region....
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6774455 |
Semiconductor device with a collector contact in a depressed well-region
A method for manufacturing a semiconductor device includes forming a buried layer of a semiconductor substrate. An active region is formed adjacent at least a portion of the buried layer. At least...
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6768183 |
Semiconductor device having bipolar transistors
An NPN bipolar transistor and a PNP bipolar transistor are formed in a semiconductor substrate. The NPN bipolar transistor has a p type emitter region, a p type collector region and an n type base...
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6750528 |
Bipolar device
An integrated electronic device includes a semiconductor substrate layer having a major surface formed along a crystal plane. In one embodiment a first conductivity type region is formed in the...
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6737722 |
Lateral transistor having graded base region, semiconductor integrated circuit and fabrication method thereof
The lateral pnp transistor encompasses a p-type semiconductor substrate, an n-type first buried region disposed on the semiconductor substrate, an n-type uniform base region disposed on the first...
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6730981 |
Bipolar transistor with inclined epitaxial layer
In an element formation region, a surface of an N − epitaxial layer is inclined upward from an end of a field oxide film to a sidewall of an opening. An external base diffusion layer at the...
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6724066 |
High breakdown voltage transistor and method
An integrated circuit that includes a high breakdown voltage bipolar transistor. The bipolar transistor includes an emitter 36, a base 32, and a collector structure. The emitter 36 is...
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6674148 |
Lateral components in power semiconductor devices
A method for adjusting the gain or the sensitivity of a lateral component formed in the front surface of a semiconductor wafer, having a first conductivity type, includes not doping or overdoping,...
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6646320 |
Method of forming contact to poly-filled trench isolation region
Existing polysilicon emitter technology is used to contact poly fill in a trench isolation structure. A standard single poly emitter window process is followed. An “emitter window” is masked...
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6639294 |
Semiconductor device having a device formation region protected from a counterelectromotive force
A semiconductor device includes an epitaxial layer formed on a P type silicon substrate; a P+ diffusion layer for dividing the epitaxial layer into an N− epi layer, which constitutes a device...
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6617646 |
Reduced substrate capacitance high performance SOI process
A silicon on insulator substrate is provided to include the following: a handle wafer; a layer of bonding material; a device wafer, the device wafer including at least one buried impurity region...
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6576974 |
Bipolar junction transistors for on-chip electrostatic discharge protection and methods thereof
An integrated circuit device receiving signals from a signal pad that includes at least one silicon bipolar junction transistor responsive to the signals from the signal pad for providing...
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6573539 |
Heterojunction bipolar transistor with silicon-germanium base
A silicon-germanium base capable of use in heterojunction bipolar transistor includes a silicon substrate having a mesa surrounded by a trench. The mesa has a top surface and a silicon-germanium...
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6552407 |
Communication module having a structure for reducing crosstalk
Disclosed herein is a communication module, comprising a semiconductor chip in which channels for allowing signal converting means to convert current signals inputted from input terminals to...
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6426667 |
Bidirectional analog switch using two bipolar junction transistors which are both reverse connected or operating in the reverse or inverse mode
The present invention relates to an integrated circuit bidirectional switch formed from bipolar transistor devices, in which the saturation voltage is sought to be reduced. More specifically, an...
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6420771 |
Trench isolated bipolar transistor structure integrated with CMOS technology
A bipolar transistor is vertically isolated from underlying silicon by an isolation layer of conductivity type opposite that of the collector. This isolation layer lies beneath the heavily doped...
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6384433 |
Voltage variable resistor from HBT epitaxial layers
A voltage variable resistor formed on heterojunction bipolar transistor epitaxial material includes a current channel made on emitter material. Emitter mesas separated by a recess provide the...
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6376880 |
High-speed lateral bipolar device in SOI process
A lateral bipolar transistor includes a semiconductor layer overlying an electrically insulating material and an insulating layer overlying a central portion of the semiconductor layer. A contact...
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6323538 |
Bipolar transistor and method for fabricating the same
An n-type first single crystal silicon layer is provided as collector region over a silicon substrate with a first insulating film interposed therebetween. A p-type first polysilicon layer is...
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6262456 |
Integrated circuit having transistors with different threshold voltages
An ultra-large-scale integrated (ULSI) circuit includes MOSFETs which have different threshold voltages and yet have the same channel characteristics. The MOSFETs include gate structures with a...
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6255713 |
Current source using merged vertical bipolar transistor based on gate induced gate leakage current
A current source formed in a p-type substrate is disclose. First, a deep n-well is formed within the p-type substrate and a buried n+ layer is formed within the deep n-well. Next, a p-well is...
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6198117 |
Transistor having main cell and sub-cells
A transistor formed in a master slice manner is disclosed for use in radio frequency range, the transistor includes a main transistor cell operating as a smallest transistor in scale among a...
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