Matches 551 - 573 out of 573 < 1 2 3 4 5 6 7 8 9 10 11 12
Match Document Document Title
4331708 Method of fabricating narrow deep grooves in silicon  
A method of fabricating deep grooves having submicron widths in a semiconductor substrate. A pattern of submicron oxidation masking elements formed on the substrate surface serves as an oxidation...
4307180 Process of forming recessed dielectric regions in a monocrystalline silicon substrate  
A method of forming surface planarity to a substrate during removal of excess dielectric material when fabricating recessed regions of dielectric material in a semiconductor device wherein a...
4278705 Sequentially annealed oxidation of silicon to fill trenches with silicon dioxide  
A process for making dielectrically isolated silicon integrated circuits which use silicon oxide filled trenches to provide isolation is described. To minimize damage to the silicon, the trenches...
4271583 Fabrication of semiconductor devices having planar recessed oxide isolation region  
In the fabrication of semiconductor integrated circuits which include recessed oxide isolation regions (29), formation of the undesired "bird's head" and "bird's beak" is avoided by reducing the...
4264409 Contamination-free selective reactive ion etching or polycrystalline silicon against silicon dioxide  
Disclosed is an improved Reactive Ion Etching (RIE) technique for etching polycrystalline silicon or single crystal silicon as must be done in Very Large Scale Integration (VLSI) using silicon...
4211582 Process for making large area isolation trenches utilizing a two-step selective etching technique  
A method for making wide, deep recessed oxide isolation trenches in silicon semiconductor substrates. A semi-conductor substrate is selectively etched to produce a spaced succession of narrow,...
4182636 Method of fabricating self-aligned contact vias  
A fabrication method is disclosed for providing self-aligned (i.e., misregistration tolerant or "borderless") contact vias for electrical connections between metal interconnection lines and...
4169000 Method of forming an integrated circuit structure with fully-enclosed air isolation  
A method for forming a fully-enclosed air isolation structure which comprises etching a pattern of cavities extending from one surface of a silicon substrate into the substrate to laterally...
4139442 Reactive ion etching method for producing deep dielectric isolation in silicon  
A method for producing deeply recessed oxidized regions in silicon. A series of deep trenches are formed in a silicon wafer by a reactive ion etching (RIE) method. In a first species, the trenches...
4104086 Method for forming isolated regions of silicon utilizing reactive ion etching  
A method for isolating regions of silicon involving the formation of openings that have a suitable taper in a block of silicon, thermally oxidizing the surfaces of the openings, and filling the...
4081823 Semiconductor device having porous anodized aluminum isolation between elements thereof  
An integrated circuit having dielectric isolation is fabricated by growing a double epitaxial layer of N-type semiconductive material onto a P-type substrate. A dielectric layer is formed over the...
4044454 Method for forming integrated circuit regions defined by recessed dielectric isolation  
In the fabrication of integrated circuits, a method is provided for forming dielectrically isolated regions in a silicon substrate comprising initially introducing conductivity-determining...
4045249 Oxide film isolation process  
In an oxide film isolation process wherein a groove portion is formed in that region of a semiconductor substrate in which an isolation layer is to be formed, oxygen or nitrogen is implanted into...
4039359 Method of manufacturing a flattened semiconductor device  
A method of manufacturing a semiconductor device whose surface is flattened, comprises the steps of forming a first semiconductor oxide film at selected areas of a surface of a semiconductor...
3998673 Method for forming electrically-isolated regions in integrated circuits utilizing selective epitaxial growth  
An improved process for forming electrically-isolated regions in integrated circuits in the form of dielectric moats surrounding the regions and P-N junctions underlying the regions. Moats or...
3997378 Method of manufacturing a semiconductor device utilizing monocrystalline-polycrystalline growth  
In the manufacture of a semiconductor device, when an epitaxially-grown layer is formed on a semiconductor substrate partially formed with an oxide, a polycrystalline layer is formed on the oxide;...
3970486 Methods of producing a semiconductor device and a semiconductor device produced by said method  
A method of making a semiconductor device is described in which a selected surface portion of a silicon wafer is masked against oxidation, and then the surface is oxidized to grow a thermal oxide...
3891469 Method of manufacturing semiconductor device  
A method of manufacturing a semiconductor device in which the regions of elements formed within the same silicon substrate are insulatingly isolated from each other by a silicon dioxide region...
3795846 AN INTEGRATED SEMI-CONDUCTOR DEVICE HAVING FUNCTIONAL REGIONS ISOLATED BY P-N JUNCTIONS THEREBETWEEN  
An integrated semiconductor rectifier device comprising a semiconductor substrate having a pair of mutually opposed principal surfaces, said substrate including a plurality of function regions of...
3400309 Monolithic silicon device containing dielectrically isolatng film of silicon carbide  
3343255 Structures for semiconductor integrated circuits and methods of forming them  
3725146 Title is not available  
3597287 Title is not available  
Matches 551 - 573 out of 573 < 1 2 3 4 5 6 7 8 9 10 11 12