Matches 501 - 550 out of 573 < 1 2 3 4 5 6 7 8 9 10 11 12 >
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5350941 Trench isolation structure having a trench formed in a LOCOS structure and a channel stop region on the sidewalls of the trench  
An isolation structure is disclosed which isolates an active region (24) from other proximate active regions. The isolation structure utilizes the combination of a LOCOS structure (26) comprising...
5332912 Heterojunction bipolar transistor  
A heterojunction bipolar transistor comprises n + -type GaAs collector contact region, an n-type GaAs collector region, a p + -type GaAs base region, an n-type AlGaAs emitter region, and an n + ...
5319235 Monolithic IC formed of a CCD, CMOS and a bipolar element  
A composite semiconductor element includes a semiconductor substrate having a single crystal region projecting in the form of an island, an epitaxial growth layer formed on the semiconductor...
5319240 Three dimensional integrated device and circuit structures  
A set of three-dimensional structures and devices may be wired together to perform a wide variety of circuit functions such as SRAMs, DRAMs, ROMs and PLAs. Both N-Channel and P-Channel transistors...
5308786 Trench isolation for both large and small areas by means of silicon nodules after metal etching  
A first insulating layer is deposited over the surface of a silicon substrate. Those portions of the first insulating layers not covered by a mask pattern are etched through to the silicon...
5293061 Semiconductor device having an isolation layer region on the side wall of a groove  
Steps or grooves are formed in a surface of a semiconductor substrate of a semiconductor device having a plurality of semiconductor elements, and an isolation layer is formed on regions that...
5278102 SOI device and a fabrication process thereof  
A method for fabricating a semiconductor device comprises the steps of forming a depression on a substrate, bonding a plate of a single crystal semiconductor material on the substrate to establish...
5250836 Semiconductor device having silicon-on-insulator structure  
A semiconductor device includes a first substrate made of a semiconductor, a first insulator layer which is formed on the first substrate, second substrate made of a semiconductor and formed on the...
5235189 Thin film transistor having a self-aligned gate underlying a channel region  
A self-aligned, under-gated TFT device (10). A base layer (14) is formed. A conductive layer (16) is formed overlying the base layer (14). A dielectric layer (18) is formed overlying the conductive...
5221857 Bipolar transistor structure with polycrystalline resistor layer  
A polycrystalline silicon layer 9 for a base leading electrode is formed on an element forming region divided by an element isolating layer which is formed by burying a BPSG film 8 in a groove. A...
5196718 Light-emitting diode array  
A high efficiency, high density light-emitting diode array which provides improved light output efficiency and suppression of crosstalk between adjacent light-emitting elements without loss of...
5159429 Semiconductor device structure employing a multi-level epitaxial structure and method of manufacturing same  
A semiconductor structure including a doped semiconductor substrate defining a surface. A buffer layer of epitaxial semiconductor material overlies the substrate surface, the buffer layer having a...
5094973 Trench pillar for wafer processing  
A T-shaped trench intersection shaped to make uniform the wall-to-wall spacing at the trench intersection and prevent the formation of voids when the trench is filled with a conformal insulating...
5059550 Method of forming an element isolating portion in a semiconductor device  
A method for manufacturing a semiconductor device comprising: making a trench in a Si semiconductor substrate; forming on the surface of the substrate a thermal oxidation film a Si 3 N 4 ...
5051795 EEPROM with trench-isolated bitlines  
An electrically-erasable, electrically-programmable ROM or an EEPROM is constructed using a floating-gate transistor with or without a split gate. The floating-gate transistor may have a...
5041881 Whiskerless Schottky diode  
A Schottky diode for millimeter and submillimeter wave applications is comprised of a multi-layered structure including active layers of gallium arsenide on a semi-insulating gallium arsenide...
5017998 Semiconductor device using SOI substrate  
In a direct bonded SOI substrate where the SiO 2 films OA, OB are respectively provided on the single surfaces of the silicon substrates A, B, at least any one of SiO 2 films OA, OB has thickness...
4926233 Merged trench bipolar-CMOS transistor fabrication process  
A BICMOS fabrication technique utilizing trench depressions for forming bipolar and PMOS transistors. The trench depressions each have high conductivity diffusion sidewalls for functioning...
4923821 Forming trench in semiconductor substrate with rounded corners  
After a semiconductor substrate is etched so as to form a groove and an impurity is introduced to the semiconductor substrate and to the groove, the corner portions of the groove are rounded by...
4922318 Bipolar and MOS devices fabricated on same integrated circuit substrate  
An improved integrated circuit structure is disclosed comprising bipolar and MOS devices formed on the same substrate. The bipolar devices have at least the emitter and the collector contact...
4916513 Dielectrically isolated integrated circuit structure  
An integrated circuit structure is made up of laterally spaced islands separated from each other by closed annular grooves of an electrically isolating matter which can be either ambient air or...
4903109 Semiconductor devices having local oxide isolation  
A semiconductor monolithic integrated circuit comprising circuit elements built into isolated epitaxial layer islands is described. The isolation is accomplished by part by a p-n junction between...
4903095 Integrated circuit comprising a device for protection against electrostatic discharge  
The protection device according to the invention is of the type comprising three active regions of alternating conductivity types, whose extreme regions are connected on the one hand to an input to...
4847668 Device and method of photoelectrically converting light into electrical signal  
A photoelectric transducer device controls a potential of a control electrode region of a semiconductor transistor through a capacitor to perform a storage operation for storing carriers generated...
4837178 Method for producing a semiconductor integrated circuit having an improved isolation structure  
A compound semiconductor (e.g., GaAs) IC device structure includes: a compound semiconductor substrate having a semi-insulating compound surface region; an active element laminated layer formed on...
4835115 Method for forming oxide-capped trench isolation  
A method of forming trench isolation is disclosed. A trench is etched, either through field oxide or not, into the substrate, using an oxide hard mask. Implant of a channel-stop is then performed...
4814852 Controlled voltage drop diode  
A diode having an increased diode voltage drop is provided through the use of an extra collector-base contact which is left electrically floating. By leaving the extra collector-base contact...
4794092 Single wafer moated process  
The present invention is directed to the construction of an integrated circuit chip, and to the method of making such a chip from a plate or wafer. In accordance with the present invention a chip...
4786614 Method of fabricating a high voltage semiconductor device having a pair of V-shaped isolation grooves  
A method of fabricating a semiconductor device capable of handling high voltages includes forming a relatively thick epitaxial layer the top surface of which defines a plurality of generally...
4766086 Method of gettering a semiconductor device and forming an isolation region therein  
In a method of manufacturing a semiconductor device according to the present invention, a given position of a thermal oxide film formed on a monocrystalline silicon layer is opened to expose a...
4717682 Method of manufacturing a semiconductor device with conductive trench sidewalls  
A method of manufacturing a semiconductor device, comprising the steps of sequentially forming a buried region and an epitaxial layer on a major surface of a semiconductor substrate, forming a...
4679304 Process for producing zones for the electrical isolation of the components of an integrated circuit  
This process consists of producing a mask on a silicon substrate for defining the locations of the isolation zones to be formed, doping the unmasked substrate regions, thermally oxidizing said...
4650544 Shallow groove capacitor fabrication method  
A shallow capacitor cell is formed by using conventional integrated circuit processes to build a substrate mask having sublithographic dimensions. Multiple grooves, or trenches, are etched into the...
4642878 Method of making MOS device by sequentially depositing an oxidizable layer and a masking second layer over gated device regions  
A method for manufacturing a semiconductor device is disclosed which comprises the steps of forming an element isolating region of a first conductivity type, forming an insulating film on the...
4639288 Process for formation of trench in integrated circuit structure using isotropic and anisotropic etching  
An improved process is disclosed for making an integrated circuit structure wherein a trench is etched into one or more layers to electrically separate one of the devices in the integrated circuit...
4638552 Method of manufacturing semiconductor substrate  
A method of manufacturing a semiconductor substrate having a modified layer therein comprises the steps of mirror-polishing one surface of each of first and second semiconductor plates, forming a...
4631803 Method of fabricating defect free trench isolation devices  
The specification discloses an isolation trench (36) formed in a semiconductor body. A stress relief layer (38) of oxide is formed on the interior walls of the trench (36), the layer (38) being...
4632728 Method of manufacturing a glass passivation type semiconductor device  
In a method of manufacturing a glass passivation type semiconductor device wherein a silicon semiconductor substrate of a first conductivity type is formed with a p-n junction by diffusing an...
4615104 Method of forming isolation regions containing conductive patterns therein  
A method of manufacturing a semiconductor device which comprises a step of forming a first groove in a semiconductor layer, a step of filling the first groove with a first insulating film, a step...
4582565 Method of manufacturing integrated semiconductor circuit devices  
A method of fabricating integrated semiconductor circuit devices with improved surface planarity. An oxidation-resistant masking layer is deposited over the surface of a semiconductor body and the...
4571819 Method for forming trench isolation structures  
A method for forming trench isolation oxide using doped silicon dioxide which is reflowed at elevated temperatures to collapse any voids therein and produce surface planarity. An underlying layered...
4561172 Integrated circuit fabrication method utilizing selective etching and oxidation to form isolation regions  
A sidewall-nitride isolation technology refines process control over lateral oxide encroachment by preventing any thinning of the nitride moat-masking layer during the nitride etch step which...
4556585 Vertically isolated complementary transistors  
A process for making complementary transistor devices in an epitaxial layer of a first conductivity type having a deep vertical isolation sidewall between the N and P channel transistors by...
4549927 Method of selectively exposing the sidewalls of a trench and its use to the forming of a metal silicide substrate contact for dielectric filled deep trench isolated devices  
Deep trenches (14,15) are formed according to the desired pattern through the N epitaxial layer (13) and N + subcollector region (12) into the P - substrate (11) of a silicon structure (10)....
4495025 Process for forming grooves having different depths using a single masking step  
A process for forming grooves of different depths using a single masking step is presented. In the preferred embodiment of the present invention a photoresist material is used as a single masking...
4473598 Method of filling trenches with silicon and structures  
Isolation regions in a semiconductor substrate are formed by covering at least one of the surfaces within a trench within the substrate with non-nucleating material, providing a layer of nucleating...
4459181 Semiconductor pattern definition by selective anodization  
A pattern is defined in a semiconductor wafer by forming one or more notches from a top major surface downwardly beyond the lowermost junction between opposite conductivity type regions, and by...
4390393 Method of forming an isolation trench in a semiconductor substrate  
A method of defining in a substrate of silicon an active region, a region of field oxide and an isolating wall of silicon dioxide therebetween in a single masking step. The substrate is covered in...
4356211 Forming air-dielectric isolation regions in a monocrystalline silicon substrate by differential oxidation of polysilicon  
Dielectric isolation regions are formed in a monocrystalline silicon substrate through forming trenches in the substrate by reactive ion etching after having etched openings in a layered structure...
4333227 Process for fabricating a self-aligned micrometer bipolar transistor device  
A method for device fabrication utilizing a self-aligned process. A combination of advanced semiconductor processing techniques including Deep Dielectric Isolation by reactive-ion etching, etching...
Matches 501 - 550 out of 573 < 1 2 3 4 5 6 7 8 9 10 11 12 >