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8154101 |
High voltage diode with reduced substrate injection
A high voltage diode in which the n-type cathode is surrounded by an uncontacted heavily doped n-type ring to reflect injected holes back into the cathode region for recombination or collection is...
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8138497 |
Test structure for detecting via contact shorting in shallow trench isolation regions
A test structure for detecting void formation in semiconductor device layers includes a plurality of active device areas formed in a substrate, a plurality of shallow trench isolation (STI) regions...
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8134207 |
High breakdown voltage semiconductor circuit device
In a high breakdown voltage semiconductor element among elements integrated together on an SOI substrate in which its rated voltage is shared between an embedded oxide layer and a drain region...
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8125045 |
Dielectric isolation type semiconductor device and manufacturing method therefor
A dielectric isolation type semiconductor device includes a dielectric isolation type substrate in which a support substrate, an embedded dielectric layer, and a first conductive type semiconductor...
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8120139 |
Void isolated III-nitride device
Isolation of III-nitride devices may be performed with a dopant selective etch that provides a smooth profile with little crystal damage in comparison to previously used isolation techniques. The...
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8105911 |
Bipolar junction transistor guard ring structures and method of fabricating thereof
Semiconductor devices with multiple floating guard ring edge termination structures and methods of fabricating same are disclosed. A method for fabricating guard rings in a semiconductor device...
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8093652 |
Breakdown voltage for power devices
A power device includes a semiconductor substrate of first conductivity having an upper surface and a lower surface. An isolation diffusion region of second conductivity is provided at a periphery...
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8039359 |
Method of forming low capacitance ESD device and structure therefor
In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage.
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8030731 |
Isolated rectifier diode
An isolated diode comprises a floor isolation region, a dielectric-filled trench and a sidewall region extending from a bottom of the trench at least to the floor isolation region. The floor...
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7977762 |
Effective shield structure for improving substrate isolation of analog circuits from noisy digital circuits on a system-on-chip (SOC)
An integrated circuit (IC) is disclosed to include a central area of the IC that is partitioned into a first section containing at least one digital circuit and a second section containing at least...
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7960781 |
Semiconductor device having vertical charge-compensated structure and sub-surface connecting layer and method
In one embodiment, a semiconductor device is formed having vertical localized charge-compensated trenches, trench control regions, and sub-surface doped layers. The vertical localized...
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7947561 |
Methods for oxidation of a semiconductor device
Methods of fabricating an oxide layer on a semiconductor substrate are provided herein. The oxide layer may be formed over an entire structure disposed on the substrate, or selectively formed on a...
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7880262 |
Semiconductor device
An active barrier structure has a p-type region and an n-type region, each of which is in contact with a p-type impurity region and which are ohmic-connected to each other to attain a floating...
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7875915 |
Integrated circuit comprising a photodiode of the floating substrate type and corresponding fabrication process
An integrated circuit includes at least one photodiode associated with a read transistor. The photodiode is formed from a stack of three semiconductor layers comprising a buried layer, an floating...
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7855421 |
Embedded phase-change memory and method of fabricating the same
An embedded memory required for a high performance, multifunction SOC, and a method of fabricating the same are provided. The memory includes a bipolar transistor, a phase-change memory device and...
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7851858 |
MOSFET having SOI and method
Provided is a semiconductor device formed to an SOI substrate including a MOS transistor in which a parasitic MOS transistor is suppressed. The semiconductor device formed on the SOI substrate by...
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7834406 |
High-voltage metal-oxide-semiconductor device and method of manufacturing the same
The present invention pertains to a high-voltage MOS device. The high-voltage MOS device includes a substrate, a first well, a first field oxide layer enclosing a drain region, a second field oxide...
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7816264 |
Wafer processing method
A wafer processing method having a step of reducing the thickness of a wafer in only a device forming area where semiconductor chips are formed by grinding and etching the back side of the wafer to...
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7777294 |
Semiconductor device including a high-breakdown voltage MOS transistor
On a semiconductor substrate, a well is formed. In the well, one MOS transistor including a gate electrode, a source region, a source field limiting layer and a source/drain region, and another MOS...
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7768100 |
Semiconductor integrated circuit
This invention is directed to improve the electrostatic discharge strength and the latch-up strength of the semiconductor integrated circuit. To achieve the certain level of stable quality of the...
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7759759 |
Integrated circuit including a high voltage bipolar device and low voltage devices
An integrated circuit includes a high voltage NPN bipolar transistor and a low voltage device. The NPN bipolar transistor includes a lightly doped p-well as the base region of the transistor while...
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7723790 |
Semiconductor device and method of manufacturing the same
An isolation insulating film (5) of partial-trench type is selectively formed in an upper surface of a silicon layer (4). A power supply line (21) is formed above the isolation insulating film (5)....
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7714318 |
Electronic device including a transistor structure having an active region adjacent to a stressor layer
An electronic device can include a transistor structure of a first conductivity type, a field isolation region, and a layer of a first stress type overlying the field isolation region. For example,...
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7709926 |
Device structures for active devices fabricated using a semiconductor-on-insulator substrate and design structures for a radiofrequency integrated circuit
Device structure for active devices fabricated in a semiconductor-on-insulator (SOI) substrate and design structures for a radiofrequency integrated circuit. The device structure includes a first...
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7667183 |
Image sensor with high fill factor pixels and method for forming an image sensor
An image sensor comprising an array of photoelectric conversion elements in a substrate, the photoelectric conversion elements being arranged in rows and columns extending in a first direction and...
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7667288 |
Systems and methods for voltage distribution via epitaxial layers
Systems and methods for voltage distribution via epitaxial layers. In accordance with a first embodiment of the present invention, an integrated circuit comprises an epitaxial layer of a...
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7652307 |
Semiconductor device with two overlapping diffusion layers held at floating voltage for improving withstand voltage
In a semiconductor device of the present invention, a MOS transistor is disposed in an elliptical shape. Linear regions in the elliptical shape are respectively used as the active regions, and...
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7649243 |
Semiconductor structures incorporating multiple crystallographic planes and methods for fabrication thereof
A semiconductor structure includes a semiconductor mesa located upon an isolating substrate. The semiconductor mesa includes a first end that includes a first doped region separated from a second...
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7601990 |
Method and apparatus for electrostatic discharge protection having a stable breakdown voltage and low snapback voltage
Electrostatic discharge (ESD) protection is provided for an integrated circuit. Snap back from a lower initial critical voltage and critical current is provided, as compared to contemporary...
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7592676 |
Semiconductor device with a transistor having different source and drain lengths
A cell includes a plurality of diffusion region pairs, each of the diffusion region pairs being formed by a first impurity diffusion region which is a constituent of a transistor and a second...
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7538395 |
Method of forming low capacitance ESD device and structure therefor
In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage.
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7498653 |
Semiconductor structure for isolating integrated circuits of various operating voltages
A semiconductor structure for isolating a first circuit and a second circuit of various operating voltages includes a first isolation ring surrounding the first and second circuits on a...
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7485943 |
Dielectric isolation type semiconductor device and manufacturing method therefor
A dielectric isolation type semiconductor device includes a dielectric isolation type substrate in which a support substrate, an embedded dielectric layer, and a first conductive type semiconductor...
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7474011 |
Method for improved single event latch up resistance in an integrated circuit
A process and system for estimating the occurrence of single event latch-up in an integrated circuit. The process involves determining the resistance between each junction and the closest...
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7466005 |
Recessed termination for trench schottky device without junction curvature
A trench type Schottky device has a guard ring diffusion of constant depth between the outermost of an active trench and an outer surrounding termination trench. The junction curvature of the guard...
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7425745 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes a semiconductor substrate, an isolation film that is provided in one principal surface of the semiconductor substrate, wiring that is arranged on the isolation film,...
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7420202 |
Electronic device including a transistor structure having an active region adjacent to a stressor layer and a process for forming the electronic device
An electronic device can include a transistor structure of a first conductivity type, a field isolation region, and a layer of a first stress type overlying the field isolation region. For example,...
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7402885 |
LOCOS on SOI and HOT semiconductor device and method for manufacturing
One or more local oxidation of silicon (LOCOS) regions may be formed that apply compressive strain to a channel of a field-effect transistor such as a P-type field-effect transistor (PFET) or other...
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7382015 |
Semiconductor device including an element isolation portion having a recess
A non-volatile semiconductor memory device, which is intended to prevent data destruction by movements of electric charges between floating gates and thereby improve the reliability, includes...
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7355259 |
Photodiode array and optical receiver device including the same
Disclosed is a photodiode array which includes a plurality of p-i-n photodiodes arrayed on a semi-insulative semiconductor substrate, each photodiode including an n-type semiconductor layer grown...
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7291894 |
Vertical charge control semiconductor device with low output capacitance
In accordance with an embodiment of the present invention, a MOSFET includes at least two insulation-filled trench regions laterally spaced in a first semiconductor region to form a drift region...
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7259055 |
Method of forming high-luminescence silicon electroluminescence device
A method for forming a high-luminescence Si electroluminescence (EL) phosphor is provided, with an EL device made from the Si phosphor. The method comprises: depositing a silicon-rich oxide (SRO)...
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7253486 |
Field plate transistor with reduced field plate resistance
In one example embodiment, a transistor (100) is provided. The transistor (100) comprises a source (10), a gate (30), a drain (20), and a field plate (40) located between the gate (30) and the...
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7247921 |
Semiconductor apparatus and method of manufacturing same, and method of detecting defects in semiconductor apparatus
A semiconductor apparatus includes a semiconductor substrate having a device region and a periphery region surrounding the device region; a semiconductor device provided in the device region of the...
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7221035 |
Semiconductor structure avoiding poly stringer formation
The present invention discloses a semiconductor structure avoiding the poly stringer formation in semiconductor processing. A semiconductor device is divided into a memory cell area and a...
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7190042 |
Self-aligned STI for narrow trenches
A self-aligned shallow trench isolation region for a memory cell array is formed by etching a plurality of vertical deep trenches in a substrate and coating the trenches with an oxidation barrier...
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7173316 |
Semiconductor device
An N type semiconductor layer is epitaxially grown on a P type semiconductor substrate of which one end is grounded, and an element isolation layer made of a P type diffusion layer is formed by...
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7170109 |
Heterojunction semiconductor device with element isolation structure
A technique enabling to improve element isolation characteristic of a semiconductor device is provided. An element isolation structure is provided in a semiconductor substrate in which a silicon...
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7141833 |
Photodiode
Apart from a semiconductor substrate and a photosensitive region in the semiconductor substrate, which comprises a space charge zone region for generating a diffusion current portion and a...
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7135755 |
Integrated semiconductor device providing for preventing the action of parasitic transistors
An electric motor drive system is disclosed which includes a required number of motor driver circuits connected one to each motor armature coil. Fabricated in the form of an integrated circuit,...
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