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7608913 |
Noise isolation between circuit blocks in an integrated circuit chip
An integrated circuit includes a p-well block region having a high resistivity due to low doping concentration formed in a region of a substrate for providing noise isolation between a first...
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7598588 |
Semiconductor structure and method of manufacture
In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a semiconductor device includes a plurality of rectilinear structures,...
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7592685 |
Device and methodology for reducing effective dielectric constant in semiconductor devices
Semiconductor structure includes an insulator layer having at least one interconnect feature and at least one gap formed in the insulator layer spanning more than a minimum spacing of interconnects.
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7586173 |
Method and apparatus for using flex circuit technology to create a reference electrode channel
A method of creating a sensor that may include applying a first conductive material on a first portion of a substrate to form a reference electrode and depositing a first mask over the substrate,...
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7579669 |
Semiconductor device including power MOS field-effect transistor and driver circuit driving thereof
A semiconductor device comprises a high side switching element, a driver circuit, and a low side switching element. The high side switching element is formed on a first semiconductor substrate, has...
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7576405 |
Semiconductor integrated circuit for reducing leak current through MOS transistors
A semiconductor device is composed of: a power control region within which function cells are arranged; a basic power supply line overlapping said power control region, and positioned in a power...
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7573116 |
Etch aided by electrically shorting upper and lower sidewall portions during the formation of a semiconductor device
A method used to fabricate a semiconductor device comprises etching a dielectric layer, resulting in an undesirable charge buildup along a sidewall formed in the dielectric layer during the etch....
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7573064 |
Dielectric actuator or sensor structure and method of making it
The present invention relates to dielectric actuators or sensors of the kind wherein electrostatic attraction between two electrodes located on an elastomeric body leads to a compression of the...
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7569899 |
Semiconductor integrated circuit
Logic LSI includes first power domains PD 1 to PD 4, thick-film power switches SW 1 to SW 4, and power switch controllers PSWC 1 to PSWC 4. The thick-film power switches are formed by...
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7564114 |
Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. A preferred embodiment comprises a method of forming an insulating material layer. The method includes forming an interface...
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7560794 |
DUV laser annealing and stabilization of SiCOH films
A method of fabricating a dielectric film comprising atoms of Si, C, O and H (hereinafter SiCOH) that has improved insulating properties as compared with prior art dielectric films, including prior...
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7557421 |
Hybrid radio frequency integrated circuit using gallium nitride epitaxy layers grown on a donor substrate
The present invention is a hybrid integrated circuit comprising at least two semiconductor dies. A high performance semiconductor die includes high performance epitaxy layers grown on a donor...
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7550855 |
Vertically spaced plural microsprings
A plurality of vertically spaced-apart microsprings are provided to increase microspring contact force, contact area, contact reliability, and contact yield. The microspring material is deposited,...
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7545276 |
Semiconductor device
The present invention provides a semiconductor device including an antenna, and at least a first integrated circuit and a second integrated circuit which are connected to the antenna, wherein the...
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7544896 |
Forming a porous dielectric layer and structures formed thereby
Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a dielectric layer utilizing a plasma, wherein the plasma comprises a porogen and...
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7538408 |
Inhibition of parasitic transistor operation in semiconductor device
A semiconductor device includes a surface layer on the side of a first principal surface of a p-semiconductor substrate, a high side n-isolation-diffused region and a low side n-isolation-diffused...
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7528052 |
Method for fabricating semiconductor device with trench isolation structure
The present invention relates to a semiconductor device with a device isolation structure and a method for fabricating the same. The semiconductor device includes: a substrate provided with a...
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7518209 |
Isolation of a high-voltage diode between a high-voltage region and a low-voltage region of an integrated circuit
Provided is a high-voltage integrated circuit device including a high-voltage resistant diode. The device includes a low-voltage circuit region having a plurality of semiconductor devices, which...
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7518194 |
Current amplifying integrated circuit
Present invention proposes a dramatic improvement of CMOS IC technology by providing high speed bipolar current amplifiers compatible with CMOS technological process while retaining the footprint...
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7514761 |
Triple operation voltage device
A triple operation voltage device including a first type substrate, a high voltage (HV) first type well, a second type well, a low voltage (LV) device well, and a middle voltage (MV) device well is...
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7504703 |
Semiconductor integrated circuit device
A semiconductor integrated circuit device includes a semiconductor substrate having a first surface. First wells of first conductive type are formed on the semiconductor substrate. Second wells of...
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7493582 |
Pattern layout and layout data generation method
A transistor layout including a diffusion region and a gate line. The gate line intersects part of the diffusion region in an overlapping manner. The layout includes an L-shaped bent portion...
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7492988 |
Ultra-compact planar AWG circuits and systems
Planar AWG circuits and systems are disclosed that use air trench bends to increase planar circuit compactness.
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7485942 |
Films deposited at glancing incidence for multilevel metallization
Systems, devices and methods are provided to improve performance of integrated circuits by providing a low-k insulator. One aspect is an integrated circuit insulator structure that includes a...
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7482661 |
Pattern forming method and semiconductor device manufactured by using said pattern forming method
A pattern forming method includes determining an allowable value of an etching conversion difference, obtaining a maximum distance between patterns generating the etching conversion difference...
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7476957 |
Semiconductor integrated circuit
An integrated circuit includes: a first well of a first conductivity type; a second well of a second conductivity type coming into contact with the first well at a well boundary extending in a gate...
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7471146 |
Optimized circuits for three dimensional packaging and methods of manufacture therefore
An embodiment of the present invention provides an apparatus, comprising an integrated circuit, wherein a first portion of the integrated circuit is placed on a top tier substrate and a second...
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7468535 |
Self-aligned integrated electronic devices
A process for self-aligned manufacturing of integrated electronic devices includes: forming, in a semiconductor wafer having a substrate, insulation structures that delimit active areas and project...
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7466190 |
Charge pump with four-well transistors
In one embodiment, a (negative-voltage) charge pump with one or more stages that receives a (high) input voltage and generates a higher-magnitude (negative) output voltage. Each stage has two...
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7465986 |
Power semiconductor device including insulated source electrodes inside trenches
A power semiconductor device includes a plurality of trenches formed within a semiconductor body, each trench including one or more electrodes formed therein. In particular, according to...
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7450793 |
Semiconductor device integrated with opto-electric component and method for fabricating the same
A semiconductor device integrated with opto-electric component and method for fabricating the same provides a wafer with a plurality of optical transmitter/receiver components, and each of the...
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7446382 |
Method and apparatus for fabrication of passivated microfluidic structures in semiconductor substrates
A method and apparatus for fabrication of passivated microfluidic structures is disclosed. The method includes providing a substrate having a microfluidic structure formed therein. The microfluidic...
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7440449 |
High speed switching module comprised of stacked layers incorporating t-connect structures
A compact multi-stage switching network ( 100 ), and a router ( 510 ) incorporating such multi-stage switching network, adapted for simultaneously routing a plurality of data packets from a first...
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7439603 |
Non-volatile memory device and fabricating method thereof
The present invention provides a non-volatile memory device and fabricating method thereof, by which a cell size can be lowered despite high degree of cell integration and by which the device...
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7436042 |
Circuit for driving gate of power MOSFET
A circuit for driving a gate of a power metal-oxide semiconductor field effect transistor (MOSFET), which uses a higher voltage than a gate controller is provided. The circuit is able to safely and...
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7424688 |
Designing and fabrication of a semiconductor device
Designing method of an electronic device subjected to a chemical mechanical polishing process in a fabrication process thereof is conducted according to the steps of: dividing a substrate surface...
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7420248 |
Programmable random logic arrays using PN isolation
Disclosed are a programmable, random logic device array, and a method of forming such a device. The device comprises a substrate, and a semiconductor layer above the substrate. That semiconductor...
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7420239 |
Dielectric layer forming method and devices formed therewith
Embodiments in accordance with the present invention provide alternative materials, and methods of forming such materials, that are effective as dielectric layers. Such embodiments include forming...
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7417297 |
Film or layer of semiconducting material, and process for producing the film or layer
SOI wafers are manufactured to have very thin device layers of high surface quality. The layer is ≦20 nm in thickness, has an HF density of ≦0.1/cm 2 , and a surface roughness of 0.2 nm RMS.
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7414437 |
Nanomechanical computer
An electromechanical switching device employs a first nanoscale pillar shuttling charge between opposed charged electrodes. Motion of the first pillar is coupled to a second set of pillars...
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7414292 |
Semiconductor device and its manufacturing method
A semiconductor device manufacturing method includes, forming isolation region having an aspect ratio of 1 or more in a semiconductor substrate, forming a gate insulating film, forming a silicon...
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7411270 |
Composite capacitor and method for forming the same
An electronic assembly ( 98 ) includes a substrate ( 20 ), a capacitor having first and second conductors ( 38,54 ) formed over the substrate, a first set of conductive members ( 76 ) formed over...
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7411267 |
Semiconductor integrated circuit device
The invention provides a semiconductor integrated circuit device with improved designing efficiency while achieving higher functions. An inner circuit is surrounded by a plurality of cells in which...
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7410872 |
Sealing method for electronic devices formed on a common semiconductor substrate and corresponding circuit structure
A method for sealing electronic devices formed on a semiconductor substrate includes forming a plurality of first electronic devices adjacent a first portion of the semiconductor substrate, with...
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7405459 |
Semiconductor device comprising porous film
The present invention provides a zeolite sol which can be formed into a porous film that can be thinned to an intended thickness by a method used in the ordinary semiconductor process, that excels...
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7402884 |
Low crosstalk substrate for mixed-signal integrated circuits
An integrated circuit laminate with a metal substrate for use with high performance mixed signal integrated circuit applications. The metal substrate provides substantially improved crosstalk...
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7402883 |
Back end of the line structures with liner and noble metal layer
A back end of the line (BEOL) structure of a semiconductor device is presented. In one embodiment, the structure may include a first liner layer disposed on an intermediate interconnect structure,...
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7396723 |
Method of manufacturing EEPROM device
A method of manufacturing an EEPROM device can reduce the cell area. The method of manufacturing an Electrically Erasable Programmable Read-Only Memory (EEPROM) includes forming a mask pattern over...
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7394143 |
Semiconductor integrated circuit device
Repeaters are arranged at arbitrary positions to substantially improve transmission speed of a signal. In the semiconductor integrated circuit device 1, repeater regions 10 where repeaters are...
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7394142 |
Bulk-isolated PN diode and method of forming a bulk-isolated PN diode
A technique for making a bulk isolated PN diode. Specifically, a technique is provided for making a voltage clamp with a pair of bulk isolated PN diode. Another embodiment provides for a voltage...
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