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8183661 |
Semiconductor die with event detection for reduced power consumption
According to one exemplary embodiment, a power managing semiconductor die with reduced power consumption includes a power island including an event detection block and an event qualification block....
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8174052 |
Standard cell libraries and integrated circuit including standard cells
A standard cell library includes a first power rail, a second power rail, a third power rail, a first standard cell, and second standard cells. The first power rail extends in a first direction....
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8163627 |
Method of forming isolation layer of semiconductor device
A method of forming an isolation layer of a semiconductor device is disclosed herein, the method comprising the steps of providing a semiconductor substrate in which a tunnel insulating layer and a...
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8164157 |
Signal absorption induction circuit
This patent pertains to a new technique of increasing the amount of energy absorbed by an antenna. It accomplishes this by broadcasting a spike that attracts the signal when the fields of its...
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8164155 |
Semiconductor device and method of manufacturing the same
A method for manufacturing a semiconductor device includes forming an N-well and a P-well formed in a semiconductor substrate. An isolation layer may be formed in the semiconductor substrate. At...
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8159009 |
Semiconductor device having strain material
A semiconductor device having strain material is disclosed. In a particular embodiment, the semiconductor device includes a first cell including a first gate between a first drain and a first...
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8148203 |
Technique for stable processing of thin/fragile substrates
A semiconductor on insulator (SOI) wafer includes a semiconductor substrate having first and second main surfaces opposite to each other. A dielectric layer is disposed on at least a portion of the...
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8138529 |
Package configurations for low EMI circuits
An electronic component includes a high voltage switching transistor encased in a package. The high voltage switching transistor comprises a source electrode, a gate electrode, and a drain...
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8136071 |
Three dimensional integrated circuits and methods of fabrication
The invention relates to multi-planar logic components in a three-dimensional (3D) integrated circuit (IC) apparatus configuration. A multi-planar integrated circuit connected by through silicon...
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8120139 |
Void isolated III-nitride device
Isolation of III-nitride devices may be performed with a dopant selective etch that provides a smooth profile with little crystal damage in comparison to previously used isolation techniques. The...
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8115274 |
Fuse structure and method for manufacturing same
A fuse structure includes a substrate, a fuse conductive trace disposed closer to a first chip surface than to a second chip surface facing away from the first chip surface, a metallization layer...
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8115256 |
Semiconductor device
A semiconductor device includes an inverter having an NMOSFET and a PMOSFET having sources, drains and gate electrodes respectively, the drains being connected to each other and the gate electrodes...
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8114739 |
Semiconductor device with oxygen-diffusion barrier layer and method for fabricating same
Methods are provided for fabricating a transistor. An exemplary method involves depositing an oxide layer overlying a layer of semiconductor material, forming an oxygen-diffusion barrier layer...
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8110890 |
Method of fabricating semiconductor device isolation structure
A semiconductor device including reentrant isolation structures and a method for making such a device. A preferred embodiment comprises a substrate of semiconductor material forming at least one...
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8102024 |
Semiconductor integrated circuit and system LSI including the same
A semiconductor integrated circuit having a diode element includes a diffusion layer which constitutes the anode and two diffusion layers which are provided on the left and right sides of the anode...
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8103025 |
Surface mountable transducer system
The present invention relates to a surface mountable acoustic transducer system, comprising one or more transducers, a processing circuit electrically connected to the one or more transducers, and...
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8084297 |
Method of implementing a capacitor in an integrated circuit
A method of implementing a capacitor in an integrated circuit package is disclosed. The method comprises coupling the capacitor to a first surface of a substrate of the integrated circuit package;...
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8076196 |
Semiconductor device and fabrication method for the same
The semiconductor device includes: memory cells each having a first multilayer electrode including a first lower electrode made of a first conductive film and a first upper electrode made of a...
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8072077 |
Semiconductor memory device
Disclosed herein is a semiconductor memory device for reducing a junction resistance and increasing amount of current throughout the unit cell. A semiconductor memory device comprises plural unit...
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8063467 |
Semiconductor structure and method of manufacture
In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method includes removing a portion of a semiconductor material to...
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8053346 |
Semiconductor device and method of forming gate and metal line thereof with dummy pattern and auxiliary pattern
A gate in a semiconductor device is formed to have a dummy gate pattern that protects a gate. Metal lines are formed to supply power for a semiconductor device and transfer a signal. A...
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8044394 |
Semiconductor wafer with electrically connected contact and test areas
The invention relates to an arrangement of contact areas and test areas on patterned semiconductor chips. The contact areas and the test areas are electrically connected to one another via a...
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8039921 |
Wiring structure, semiconductor device and manufacturing method thereof
A semiconductor device with a high-strength porous modified layer having a pore size of 1 nm or less, which is formed, in a multilayer wiring forming process, by forming a via hole and a wiring...
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8035188 |
Semiconductor device
Plural I/O cells (14) having electrode pads for wire bonding (13) are disposed with spaces (55) between them in the vicinity of a corner of an I/O region (11) of a semiconductor substrate (10), and...
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8035189 |
Semiconductor constructions
The invention includes methods of forming oxide structures under corners of transistor gate stacks and adjacent trenched isolation regions. Such methods can include exposure of a semiconductor...
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8030731 |
Isolated rectifier diode
An isolated diode comprises a floor isolation region, a dielectric-filled trench and a sidewall region extending from a bottom of the trench at least to the floor isolation region. The floor...
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8026570 |
Semiconductor integrated circuit device having power switch controller with gate insulator thickness for controlling multiple power switches
A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an...
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8022498 |
Electrostatic discharge management apparatus, systems, and methods
Apparatus, systems, and methods may include managing electrostatic discharge events by using a semiconductor device having a non-aligned gate to implement a snap-back voltage protection mechanism....
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8021989 |
Method for high topography patterning
One inventive aspect is related to a method for isolating structures of a semiconductor material, comprising providing a pattern of the semiconductor material comprising at least one elevated line,...
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8022497 |
Semiconductor device comprising insulating film
A semiconductor device capable of preventing an interlayer dielectric film from deterioration resulting from a liquid such as a chemical solution penetrating into the interlayer dielectric film and...
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8013415 |
Semiconductor device having a circular-arc profile on a silicon surface
A semiconductor device includes a shallow isolation trench (STI) structure on a silicon substrate for isolating element-forming regions from one another. The surface region of the silicon substrate...
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8003488 |
Shallow trench isolation structure compatible with SOI embedded DRAM
A deep trench is formed in a semiconductor-on-insulator (SOI) substrate and a pad layer thereupon. A conductive trench fill region is formed in the deep trench. A planarizing material layer having...
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7999348 |
Technique for stable processing of thin/fragile substrates
A semiconductor on insulator (SOI) wafer includes a semiconductor substrate having first and second main surfaces opposite to each other. A dielectric layer is disposed on at least a portion of the...
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7999349 |
Front-rear contacts of electronics devices with induced defects to increase conductivity thereof
An electronic device is proposed. The device is integrated in a chip including at least one stacked layer having a front surface and a rear surface opposite the front surface, the device including:...
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7994609 |
Shielding for integrated capacitors
A capacitor in an integrated circuit (“IC”) includes a core capacitor portion having first conductive elements electrically connected to and forming a part of a first node of the capacitor for...
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7994550 |
Semiconductor structures having both elemental and compound semiconductor devices on a common substrate
A semiconductor structure comprising: a substrate; a seed layer supported by the substrate; an elemental semiconductor layer disposed over a first portion of the seed layer; and a compound...
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7982279 |
Method of manufacturing stacked-type semiconductor device
A method of manufacturing a stacked-type semiconductor device, including the steps of: forming dividing grooves, having a depth corresponding to a finished thickness for a plurality of first chips...
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7977762 |
Effective shield structure for improving substrate isolation of analog circuits from noisy digital circuits on a system-on-chip (SOC)
An integrated circuit (IC) is disclosed to include a central area of the IC that is partitioned into a first section containing at least one digital circuit and a second section containing at least...
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7956437 |
Isolation structures for integrated circuits
A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with...
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7952160 |
Packaged voltage regulator and inductor array
Inductors packaged with a voltage regulator for an integrated circuit within the same package are deposited to a sufficient thickness to reduce resistance and improve the quality factor....
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7948051 |
Nonlithographic method to produce self-aligned mask, articles produced by same and compositions for same
A method for forming a self aligned pattern on an existing pattern on a substrate comprising applying a coating of a solution containing a masking material in a carrier, the masking material having...
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7944016 |
Power managing semiconductor die with event detection circuitry in thick oxide for reduced power consumption
According to one exemplary embodiment, a power managing semiconductor die with reduced power consumption includes a power island including an event detection block and an event qualification block....
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7932295 |
Organic silica-based film, method of forming the same, composition for forming insulating film for semiconductor device, interconnect structure, and semiconductor device
A method of forming an organic silica-based film, including: applying a composition for forming an insulating film for a semiconductor device, which is cured by using heat and ultraviolet...
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7923820 |
Method of producing a porous dielectric element and corresponding dielectric element
A porous dielectric element is produced by forming a first dielectric and a second dielectric. The second dielectric is dispersed in the first dielectric. The second dielectric is then removed from...
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7916571 |
Apparatus for implementing multiple integrated circuits using different gate oxide thicknesses on a single integrated circuit die
An apparatus comprising plurality of functional integrated circuit blocks, each manufactured with different oxide thicknesses on a monolithic integrated circuit die, is described. Using different...
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7906828 |
High-voltage integrated circuit device including high-voltage resistant diode
A high-voltage integrated circuit includes a low-voltage circuit region having a plurality of semiconductor devices, which operate with respect to a ground voltage, a high-voltage circuit region...
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7906383 |
Stress transfer in an interlayer dielectric by providing a stressed dielectric layer above a stress-neutral dielectric material in a semiconductor device
By forming a stressed dielectric layer on different transistors and subsequently relaxing a portion thereof, the overall process efficiency in an approach for creating strain in channel regions of...
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7902611 |
Integrated circuit well isolation structures
An integrated circuit is provided with transistor body regions that may be independently biased. Some of the bodies may be forward body biased to lower threshold voltages and increase transistor...
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7902627 |
Capacitive isolation circuitry with improved common mode detector
An integrated circuit having voltage isolation capabilities comprising a first galvanically isolated area of the integrated circuit containing a first group of functional circuitry for processing a...
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7902986 |
RFID tag
An RFID tag of the present invention is provided to suppress variations in the capacity component that occur during physical coupling between an antenna and a semiconductor chip as part of the...
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