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9041162 Wafer and a method of dicing a wafer  
A wafer includes a plurality of chips, each of the chips being spaced from each other by kerf-line regions including a reduced width.
9041150 Vertically integrated systems  
Embodiments of the present invention provide an integrated circuit system including a first active layer fabricated on a front side of a semiconductor die and a second pre-fabricated layer on a...
9035416 Efficient pitch multiplication process  
Pitch multiplied and non-pitch multiplied features of an integrated circuit, e.g., features in the array, interface and periphery areas of the integrated circuit, are formed by processing a...
9035425 Semiconductor integrated circuit  
A semiconductor integrated circuit includes a substrate, a multi-gate transistor device formed on the substrate, and an n-well resistor formed in the substrate. The substrate includes a plurality...
9029978 Semiconductor trench structure having a silicon nitride layer overlaying an oxide layer  
A semiconductor structure includes a semiconductor substrate with a substrate region and a trench extending into the surface region of the semiconductor substrate. The trench includes sidewalls, a...
9029977 Power conversion apparatus  
The power conversion apparatus includes semiconductor modules and a circuit board on which a control circuit is formed. Each semiconductor module includes signal terminals electrically connected...
9029863 Semiconductor device and method for manufacturing the same  
A variation in electrical characteristics, such as a negative shift of the threshold voltage or an increase in S value, of a fin-type transistor including an oxide semiconductor material is...
9018776 Hardmask composition including aromatic ring-containing compound, method of forming patterns, and semiconductor integrated circuit device including the patterns  
A hard mask composition includes a solvent and an aromatic ring-containing compound represented by the following Chemical Formula 1:
9006846 Through silicon via with reduced shunt capacitance  
This document refers to apparatus and methods for a device layer of a microelectromechanical system (MEMS) sensor having vias with reduced shunt capacitance. In an example, a device layer can...
9008197 Current loop voltage modulator for communication interface  
Systems for communicating over a communication interface are provided. An integrated circuit includes circuitry for monitoring a current flowing between two terminals of the integrated circuit....
9000702 Power management multi-chip module with separate high-side driver integrated circuit die  
A packaged device includes a first die, a second die, and specially spaced and positioned sets of package terminals. The first die includes a pulse-width modulator (PWM), a processor, a timer,...
9000552 Semiconductor integrated circuit device having analog circuit separated from digital circuit using resistive and capacitive element regions  
In a semiconductor integrated circuit device including a digital circuit region in which a digital circuit is formed, and an analog circuit region in which an analog circuit is formed, the analog...
9000553 Power module and power converter containing power module  
A power module includes a semiconductor chip, a first coupling conductor with one main surface coupled to one main surface of the semiconductor chip, a second coupling conductor with one main...
8987860 Semiconductor device  
A semiconductor device includes a substrate having a plurality of active regions defined by a device isolation region, a plurality of conductive patterns on the plurality of active regions, each...
8987070 SOI device with embedded liner in box layer to limit STI recess  
A semiconductor substrate having an isolation region and method of forming the same. The method includes the steps of providing a substrate having a substrate layer, a buried oxide (BOX), a...
8987902 Semiconductor device, semiconductor package, and method for manufacturing semiconductor device  
A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes a first surface, a second surface, and a through hole that extends through the semiconductor...
8987843 Mapping density and temperature of a chip, in situ  
A method and system to map density and temperature of a chip, in situ, is disclosed. The method includes measuring a propagation time that a mechanical propagation wave travels along at least one...
8975721 Integrated circuit having an edge passivation and oxidation resistant layer and method  
An integrated circuit having a semiconductor component arrangement and production method is provided. The integrated circuit includes a semiconductor material region having a surface region and...
8975722 MEMS device and method of manufacture  
A MEMS logic device comprising agate which pivots on a torsion hinge, two conductive channels on the gate, one on each side of the torsion hinge, source and drain landing pads under the channels,...
8969997 Isolation structures and methods of forming the same  
A method of forming of a semiconductor structure has isolation structures. A substrate having a first region and a second region is provided. The first region and the second region are implanted...
8963211 Method, structure and design structure for customizing history effects of SOI circuits  
A design structure is embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes a high-leakage dielectric formed over an active region...
8963278 Three-dimensional integrated circuit device using a wafer scale membrane  
A donor wafer containing integrated semiconductor device. The donor wafer has a donor wafer membrane portion that has a device layer and a buried insulating layer. The donor wafer membrane portion...
8957495 Memory cell profiles  
Examples of the present disclosure provide devices and methods for processing a memory cell. A method embodiment includes removing a key-hole shaped column from a material, to define a profile for...
8952482 Three-dimensional devices having reduced contact length  
Various embodiments comprise apparatuses and methods including a memory array having alternating levels of semiconductor materials and dielectric material with strings of memory cells formed on...
8949080 Methods of designing integrated circuits and systems thereof  
A method of designing an integrated circuit includes performing a pre-layout simulation of the integrated circuit. The pre-layout simulation is performed using a netlist generated from a process...
8946852 Photosensitive resin composition, photosensitive resin composition film, and semiconductor device using the photosensitive resin composition or photosensitive resin composition film  
A photosensitive resin composition contains: (a) an alkali-soluble polyimide; (b) a compound which has two or more epoxy groups and/or oxetanyl groups in each molecule; and (c) a quinonediazide...
8941151 Patterning method, method of manufacturing organic field effect transistor, and method of manufacturing flexible printed circuit board  
In the condition where a nozzle for applying a coating liquid is disposed on the lower side of a substrate and a substrate surface controlled in wettability is faced down, the nozzle and the...
8927869 Semiconductor structures and methods of manufacture  
Wire-bonded semiconductor structures using organic insulating material and methods of manufacture are disclosed. The method includes forming a metal wiring layer in an organic insulator layer. The...
8921165 Elimination of silicon residues from MEMS cavity floor  
The present invention generally relates to a MEMS device in which silicon residues from the adhesion promoter material are reduced or even eliminated from the cavity floor. The adhesion promoter...
8921034 Patterned bases, and patterning methods  
Some embodiments include methods of patterning a base. First and second masking features are formed over the base. The first and second masking features include pedestals of carbon-containing...
8921970 Semiconductor device and structure  
An Integrated Circuit device, including: a base wafer including single crystal, the base wafer including a plurality of first transistors; at least one metal layer providing interconnection...
8921971 Fibrous laminate interface for security coatings  
An integrated circuit (IC) package with a fibrous interface is provided. The package includes a substrate, a bond coat and a top coat. The substrate is configured to contain IC components and...
8907441 Methods for double-patterning-compliant standard cell design  
A semiconductor chip includes a row of cells, with each of the cells including a VDD line and a VSS line. All VDD lines of the cells are connected as a single VDD line, and all VSS lines of the...
8906776 Method for forming integrated circuits on a strained semiconductor substrate  
A method for forming an electronic circuit on a strained semiconductor substrate, including the steps of: forming, on a first surface of a semiconductor substrate, electronic components defining...
8907442 System comprising a semiconductor device and structure  
A semiconductor device, including: a first layer including first transistors; an interconnection layer overlying the first transistors, the interconnection layer providing interconnection for the...
8901704 Integrated circuit and manufacturing method thereof  
An integrated circuit and a manufacturing method thereof are provided. A chip size can be reduced by forming a memory device in which a ferroelectric capacitor region is laminated on a DRAM. The...
8902947 Optical module  
An optical module providing higher reliability during high-speed light modulation and a lower bit error rate when built into a transmitter (transceiver). An optical module contains a taper mirror...
8901715 Method for manufacturing a marked single-crystalline substrate and semiconductor device with marking  
A method for manufacturing a marked single-crystalline substrate comprises providing a single-crystalline substrate comprising a first material, the single-crystalline substrate having a surface...
8895980 Tunneling current amplification transistor  
The present invention discloses a tunneling current amplification transistor, which relates to an area of field effect transistor logic devices in CMOS ultra large scale semiconductor integrated...
8896086 System for preventing tampering with integrated circuit  
A system for generating a tamper detection signal indicating tampering with one or more circuits of an integrated circuit (IC) includes a tamper detection module, and wire-pairs connected to the...
8890314 Package configurations for low EMI circuits  
An electronic component includes a high voltage switching transistor encased in a package. The high voltage switching transistor comprises a source electrode, a gate electrode, and a drain...
8884650 High-frequency semiconductor switching circuit  
A diode-switch logic circuit of the present invention is configured such that: at least one of paths between a common input-output terminal and respective individual input-output terminals is...
8884342 Semiconductor device with a passivation layer  
A semiconductor device includes a semiconductor body with a first surface, a contact electrode arranged on the first surface, and a passivation layer on the first surface adjacent the contact...
8872276 Electronic device including a transistor and a vertical conductive structure  
An electronic device, including an integrated circuit, can include a buried conductive region and a semiconductor layer overlying the buried conductive region, wherein the semiconductor layer has...
8872334 Method for manufacturing semiconductor device  
In a manufacturing method of a semiconductor device incorporating a semiconductor element in a multilayered wiring structure including a plurality of wiring layers and insulating layers, a...
8866253 Semiconductor arrangement with active drift zone  
A semiconductor device arrangement includes a first semiconductor device having a load path and a plurality of second semiconductor devices, each having a load path between a first and a second...
8853815 Methods and apparatus for congestion-aware buffering using voltage isolation pathways for integrated circuit designs with multi-power domains  
A semiconductor apparatus is provided herein for buffering of nets routed through one or more areas associated with a first power domain that is different from a second power domain associated...
8846446 Semiconductor package having buried post in encapsulant and method of manufacturing the same  
In one embodiment, a semiconductor package includes a first insulating body and a first semiconductor chip having a first active surface and a first back surface opposite the first active surface....
8847351 Integrated power amplifier with load inductor located under IC die  
A compact integrated power amplifier is described herein. In an exemplary design, an apparatus includes (i) an integrated circuit (IC) die having at least one transistor for a power amplifier and...
8846490 Method of fabricating a FinFET device  
A method of forming a fin structure of a semiconductor device includes providing a substrate, creating a mandrel pattern over the substrate, depositing a first spacer layer over the mandrel...