Matches 151 - 200 out of 287 < 1 2 3 4 5 6 >
Match Document Document Title
6767781 Structure and method of forming bitline contacts for a vertical DRAM array using a line bitline contact mask  
A bitline contact and method of forming bitline contact for a vertical DRAM array using a bitline contact mask. In the method, gate conductor lines are formed. An oxide layer is deposited over the...
6759726 Formation of an isolating wall  
A method of forming an isolating wall in a semiconductor substrate of a first conductivity type, including the steps of boring in the substrate separate recesses according to the desired isolating...
6740953 High frequency integrated devices  
The present invention has an object to provide a high frequency integrated device which can obtain sufficient isolation even in a high frequency region of which handling frequency exceeds...
6740954 Semiconductor device reducing junction leakage current and narrow width effect  
A semiconductor device for reducing junction leakage current and mitigating the narrow width effect, and a fabrication method thereof, are provided. The semiconductor device includes a...
6740910 Field-effect transistor, circuit configuration and method of fabricating a field-effect transistor  
The gate region of a field effect transistor comprises at least one through hole wherein a nanoelement is provided which is electrically coupled to the source and the drain. The nanoelement may...
6740955 Trench device isolation structure  
A method of forming a trench device isolation structure, wherein, after forming a trench in a predetermined area of a semiconductor substrate, a lower isolation pattern, an upper liner pattern, and...
6724798 Optoelectronic devices and method of production  
The invention includes both devices and methods of production. A device in accordance with the invention includes a top surface and a bottom surface, a through wafer via extending from the top...
6700142 Semiconductor wafer on which is fabricated an integrated circuit including an array of discrete functional modules  
The present invention provides a semiconductor wafer that has a predetermined global functionality and comprises a top surface, a bottom surface and a peripheral edge between the top surface and...
6700144 Semiconductor device and method for manufacturing the same  
A semiconductor device includes the following: a semiconductor substrate of a first conduction type; an intrinsic semiconductor layer of the first conduction type formed on the semiconductor...
6690080 Semiconductor structure for isolation of semiconductor devices  
In an integrated circuit, particularly an integrated circuit for radio frequency applications, a semiconductor structure for isolation of semiconductor devices that includes a semiconductor...
6680517 Anisotropic conductive film, production method thereof, and display apparatus using anisotropic film  
An anisotropic conductive film which can be appropriately applied for the display apparatus by which the user can directly write characters•figures on the display, or erase characters and figures...
6677225 System and method for constraining totally released microcomponents  
A system and method are disclosed which constrain a microcomponent that is totally released from a substrate for handling of such totally released microcomponent. A preferred embodiment provides a...
6673484 IC device, circuit board and IC assembly  
An IC assembly includes: a circuit board; an IC device mounted on the circuit board, said IC device including an IC placed on the circuit board and a plurality of connecting terminals for fixing...
6670691 Shallow trench isolation fill process  
A method for filling narrow isolation trenches during a semiconductor fabrication process is disclosed. The semiconductor includes both high-aspect ratio narrow isolation trenches formed in a core...
6667530 Semiconductor device and manufacturing method thereof  
Photosensitive insulating films are laminated on lower-layer interconnection layers and a connection hole is formed in the photosensitive insulating film, and a interconnection groove is formed in...
6653708 Complementary metal oxide semiconductor with improved single event performance  
A junction isolated Complementary Metal Oxide Semiconductor (CMOS) transistor device includes a substrate of a first conductivity type and first and second buried layers formed within the substrate...
6653709 CMOS output circuit with enhanced ESD protection using drain side implantation  
A new cascaded NMOS transistor output circuit with enhanced ESD protection is achieved. A driver PMOS transistor has the source connected to a voltage supply, the gate connected to the input...
6642598 Semiconductor device  
In the semiconductor device according to the present invention having a plurality of function macro formation regions on the principal face of a semiconductor substrate, the plurality of the...
6623845 Glass-ceramic composition, and electronic component and multilayer LC composite component using the same  
A multilayer LC composite component includes a glass-ceramic composition and internal electrodes containing silver or copper as a main component. The multilayer LC composite component is...
6621144 Data receiver gain enhancement  
An improved data receiver gain enhancement is obtained in circuit by having a V/I converter and an amplifier stage, by placing a passive filter between in converter and amplifier stage....
6620534 Film having enhanced reflow characteristics at low thermal budget  
A method of forming a film having enhanced reflow characteristics at low thermal budget is disclosed, in which a surface layer of material is formed above a base layer of material, the surface...
6617686 Semiconductor device and method of isolating circuit regions  
A semiconductor device ( 10 ) includes a semiconductor die ( 14 ) having first and second circuit regions ( 30, 32 ) formed on a first surface ( 24 ). The semiconductor die is housed in a...
6608361 On-chip inductor using active magnetic energy recovery  
An active inductor circuit includes a primary and a secondary coil and a drive circuit monolithically integrated on a common substrate to provide high-Q inductors. Each inductor circuit comprises a...
6600207 Structure to reduce line-line capacitance with low K material  
A structure to reduce line—line capacitance using low dielectric constant (K) materials is provided. Embodiments in accordance with the present invention are semiconductor devices having a single...
6593637 Method for establishing component isolation regions in SOI semiconductor device  
A method for making an SOI semiconductor device including a silicon substrate includes implanting oxide and Nitrogen into the substrate and then annealing to drive Oxygen and Nitrogen through and...
6576974 Bipolar junction transistors for on-chip electrostatic discharge protection and methods thereof  
An integrated circuit device receiving signals from a signal pad that includes at least one silicon bipolar junction transistor responsive to the signals from the signal pad for providing...
6576975 Organic semiconductor devices using ink-jet printing technology and device and system employing same  
An emission system for presenting visual image is disclosed. The emissive system typically contains first electrodes ( 90 ) deposited over and in contact with a substrate. One or more conjugated...
6576345 Dielectric films with low dielectric constants  
Thin films possessing low dielectric constants (e.g., dielectric constants below 3.0) are formed on integrated circuits or other substrates. Caged-siloxane precursors are linked in such a way as to...
6570237 Semiconductor device with a protective diode having a high breakdown voltage  
A semiconductor device forms a protective diode with a high breakdown voltage at a power terminal of a power IC. An N-type well is formed in a P-type semiconductor substrate, the well electrically...
6559514 Semiconductor memory device having auxiliary conduction region of reduced area  
A semiconductor memory device includes a semiconductor substrate; a plurality of word lines provided on the semiconductor substrate and arranged in parallel to each other; a plurality of memory...
6548881 Method and apparatus to achieve bond pad crater sensing and stepping identification in integrated circuit products  
Method for stepping identification and bond pad crater jeopardy identification in integrated circuits and apparatus which performs the method, A unique device, a polysilicon meander, is formed...
6545337 Semiconductor integrated circuit device  
Collector regions ( 32, 33 ) with films capable of withstanding high voltage by laminating 4 epitaxial layers when the collector regions ( 32, 33 ) are formed. In order to reduce effects caused by...
6545336 Semiconductor device, and method of manufacturing the same  
There is described a semiconductor device which has an isolation region, the isolation region being polished by means of chemical-and-mechanical polishing, and which prevents occurrence of...
6541839 Microelectronics structure comprising a low voltage part provided with protection against a high voltage part and method for obtaining said protection  
A microelectronic structure with a low voltage part and high voltage part, such that the low voltage part is protected against the high voltage part and process of obtaining this protection. The...
6534840 Semiconductor device having self-aligned structure  
A sidewall insulating film is formed on the side faces of a gate electrode on a substrate. A trench isolation film is also formed to be self-aligned with the gate electrode. The upper surface of...
6534869 Method for reducing stress-induced voids for 0.25 &mgr m micron and smaller semiconductor chip technology by annealing interconnect lines prior to ILD deposition and semiconductor chip made thereby  
A method for making 0.25-micron semiconductor chips includes annealing the metal interconnect lines prior to depositing an inter-layer dielectric (ILD) between the lines. During annealing, an alloy...
6525391 Nickel silicide process using starved silicon diffusion barrier  
A MOSFET semiconductor device includes a substrate, a gate electrode, a gate oxide, first and second sets sidewall spacers, and nickel silicide layers. The gate oxide is disposed between the gate...
6525394 Substrate isolation for analog/digital IC chips  
The specification describes techniques for isolating noisy subcircuits in integrated analog/digital devices. Isolation is obtained using a modification of triple well isolation wherein the deep...
6525392 Semiconductor power device with insulated circuit  
A semiconductor power device with an insulated control circuit is formed in a chip of semiconductor material having predominantly a first type of conductivity. The device includes a region having a...
6512282 Semiconductor device and method for fabricating the same  
A sidewall insulating film is formed on the side faces of a buried gate electrode on a substrate. A trench isolation film, self-aligned with the gate electrode, is also formed so that the upper...
6501330 Signal processing semiconductor integrated circuit device  
A semiconductor integrated circuit comprising a first circuit block including an oscillation circuit considered to be a noise generator and a second circuit block including circuits considered to...
6489850 Crosstalk suppression in differential AC coupled multichannel IC amplifiers  
A multichannel parallel IC amplifier includes a plurality of amplifier circuits formed on an IC substrate. Each amplifier circuit is coupled to respective inputs via a pair of capacitors. The...
6465864 Diode structure on MOS wafer  
Three diode structures on a metal-oxide-semiconductor (MOS) wafer. Each diode structure is capable of reducing parasitic current through the wafer and hence increasing the power conversion...
6462385 Semiconductor memory device with latch-up suppression  
A semiconductor memory device has a semiconductor substrate, a peripheral circuit region and a memory cell region on the principal surface of the semiconductor substrate. The semiconductor memory...
6445048 Semiconductor configuration having trenches for isolating doped regions  
A semiconductor configuration includes a substrate having a first conduction type. A transistor configuration is disposed at the substrate and is formed from at least one field-effect transistor...
6433370 Method and apparatus for cylindrical semiconductor diodes  
Semiconductor diodes are diode connected cylindrical junction field effect devices having one diode terminal as the common connection between a top gate, a back gate and a first channel terminal of...
6424019 Shallow trench isolation chemical-mechanical polishing process  
A process for fabricating a trench filled with an insulating material in a surface of an integrated circuit substrate is described. One step of the process includes defining a masking layer on a...
6410972 Standard cell having a special region and semiconductor integrated circuit containing the standard cells  
The present invention provides a standard cell which can reduce an effective cell size and improve an integration degree of a semiconductor integrated circuit. The standard cell includes a...
6369418 Formation of a novel DRAM cell  
A DRAM cell capacitor is described. Capacitor formation and cell isolation methods are integrated by using support sidewalls to form vertical DRAM capacitors. Doped polysilicon adjacent to the...
6368952 Diffusion inhibited dielectric structure for diffusion enhanced conductor layer  
Within a method for forming a microelectronic fabrication, there is first provided a substrate. There is then formed over the substrate a microelectronic device passivated with a patterned first...
Matches 151 - 200 out of 287 < 1 2 3 4 5 6 >