|
Match
|
Document |
Document Title |
|
|
7615831 |
Structure and method for fabricating self-aligned metal contacts
A semiconductor structure including at least one transistor is provided which has a stressed channel region that is a result of having a stressed layer present atop a gate conductor that includes a...
|
|
|
7615807 |
Field-effect transistor structures with gate electrodes with a metal layer
Provided is an integrated circuit including a transistor with a gate electrode. The gate electrode includes a polysilicon layer in contact with a gate dielectric layer separating the gate electrode...
|
|
|
7602031 |
Method of fabricating semiconductor device, and semiconductor device
Disclosed is a method of fabricating a semiconductor device that includes field effect transistors each having a gate electrode formed only of a metal silicide which overcomes the problem of...
|
|
|
7598536 |
Semiconductor device having load resistor and method of fabricating the same
A semiconductor device includes a semiconductor substrate having a resistor region, an isolation layer disposed in the resistor region, the isolation layer defining active regions, first conductive...
|
|
|
7560331 |
Method for forming a silicided gate
A gate is silicided through its sides while limiting silicidation through the top of the gate. A blocking layer may be formed over the gate layer, and the sidewalls of the gate layer are exposed. A...
|
|
|
7545009 |
Word lines for memory cells
Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material overlying the silicon-containing material...
|
|
|
7528450 |
Semiconductor device having NMOSFET and PMOSFET and manufacturing method therefor
A element isolation insulating film is formed around the device regions in the silicon substrate. The device regions are formed an n-type diffusion layer region, a p-type diffusion layer region, a...
|
|
|
7511350 |
Nickel alloy silicide including indium and a method of manufacture therefor
The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other...
|
|
|
7488637 |
CMOS image sensor and method for forming the same
A CMOS image sensor and a method for forming the same are provided. According to the method, a gate insulating layer and a doped polysilicon layer which are sequentially stacked on a substrate are...
|
|
|
7485934 |
Integrated semiconductor structure for SRAM cells
A semiconductor structure includes a semiconductor substrate having a first device area and a second device area. A gate layer is formed across the first device area and the second device area on...
|
|
|
7473626 |
Control of poly-Si depletion in CMOS via gas phase doping
A method to control the poly-Si depletion effect in CMOS structures utilizing a gas phase doping process which is capable of providing a high concentration of dopant atoms at the gate...
|
|
|
7465649 |
Method of forming a split poly-SiGe/poly-Si alloy gate stack
A multi-layered gate electrode stack structure of a field effect transistor device is formed on a silicon nano crystal seed layer on the gate dielectric. The small grain size of the silicon nano...
|
|
|
7446381 |
Semiconductor memory device and method for fabricating the same
A semiconductor memory device has a memory region which is formed on a semiconductor substrate and in which a plurality of memory cells each including a memory transistor are arranged as a matrix...
|
|
|
7427546 |
Transistor device and method for manufacturing the same
A transistor device includes a recess in a surface of semiconductor substrate, a gate insulation layer formed over an inner side of the recess, a gate conductor filling the recess in which the gate...
|
|
|
7413955 |
Transistor for memory device and method for manufacturing the same
Disclosed is a transistor for a memory device realizing both a step-gated asymmetry transistor and a fin transistor in a cell and a method for manufacturing the same. The transistor has an active...
|
|
|
7411258 |
Cobalt disilicide structure
A structure relating to removal of an oxide of titanium generated as a byproduct of a process that forms cobalt disilicide within an insulated-gate field effect transistor (FET). The structure may...
|
|
|
7408190 |
Thin film transistor and method of forming the same
A thin film transistor including a gate, a gate insulating layer, a semiconductor layer and a source/drain is provided. The gate is disposed over a substrate, wherein the gate comprises at least...
|
|
|
7405450 |
Semiconductor devices having high conductivity gate electrodes with conductive line patterns thereon
Semiconductor devices that include a semiconductor substrate and a gate line are provided. The gate line is on the semiconductor substrate and includes a gate insulation pattern and a gate...
|
|
|
7402863 |
Trench FET with reduced mesa width and source contact inside active trench
A trench FET has source contacts which contact the entire top surface of source regions, and contact a portion of side walls of the source regions. The side walls of the source regions form a...
|
|
|
7382028 |
Method for forming silicide and semiconductor device formed thereby
A method for forming silicide and a semiconductor device formed thereby. A Si-containing polycrystalline region is converted to an amorphous region, and annealed to form a regrown polycrystalline...
|
|
|
7378336 |
Split poly-SiGe/poly-Si alloy gate stack
A multi-layered gate electrode stack structure of a field effect transistor device is formed on a silicon nano crystal seed layer on the gate dielectric. The small grain size of the silicon nano...
|
|
|
7365404 |
Semiconductor device having silicide reaction blocking region
A semiconductor device has a silicon substrate, an n-type well region formed in the silicon substrate, first and second source/drain regions constructed of a p-type diffusion layer formed on the...
|
|
|
7365403 |
Semiconductor topography including a thin oxide-nitride stack and method for making the same
A semiconductor topography is provided which includes a silicon dioxide layer with a thickness equal to or less than approximately 10 angstroms and a silicon nitride layer arranged upon the silicon...
|
|
|
7361932 |
Semiconductor device and method for fabricating the same
A semiconductor device of a dual-gate structure including a P-channel type field-effect transistor formed at a first region of a substrate and an N-channel type field-effect transistor formed at a...
|
|
|
7332420 |
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device having a P-type MOSFET and an N-type MOSFET, the method comprising the steps of: forming a gate insulating film, a non-doped polysilicon film, a...
|
|
|
7309901 |
Field effect transistors (FETs) with multiple and/or staircase silicide
A semiconductor structure and method for forming the same. The semiconductor structure comprises a field effect transistor (FET) having a channel region disposed between first and second...
|
|
|
7307871 |
SRAM cell design with high resistor CMOS gate structure for soft error rate improvement
A high resistor SRAM memory cell to reduce soft error rate includes a first inverter having an output as a first memory node, and a second inverter having an output as a second memory node. The...
|
|
|
7294893 |
Titanium silicide boride gate electrode
A method for use in the fabrication of a gate electrode includes providing a gate oxide layer and forming a titanium boride layer on the oxide layer. An insulator cap layer is formed on the...
|
|
|
7294890 |
Fully salicided (FUSA) MOSFET structure
A method is described to form a MOSFET with a fully silicided gate electrode and fully silicided, raised S/D elements that are nearly coplanar to allow a wider process margin when forming contacts...
|
|
|
7279422 |
Semiconductor device with silicide film and method of manufacturing the same
Provided is a semiconductor device having a suicide thin film with thermal stability and a method of manufacturing the same. The semiconductor device includes a silicon substrate containing Si a...
|
|
|
7271455 |
Formation of fully silicided metal gate using dual self-aligned silicide process
An advanced gate structure that includes a fully silicided metal gate and silicided source and drain regions in which the fully silicided metal gate has a thickness that is greater than the...
|
|
|
7268396 |
Finfets having first and second gates of different resistivities
A fin field effect transistor (FinFET) includes a first gate and a second gate. The first gate has a vertical part that is defined by sidewalls of a silicon fin and sidewalls of a capping pattern...
|
|
|
7265427 |
Semiconductor apparatus and method of manufacturing the semiconductor apparatus
A semiconductor apparatus wherein a device formed on a semiconductor substrate comprises a gate insulating film including a high dielectric constant film formed on the substrate and an...
|
|
|
7265400 |
Semiconductor device including field-effect transistor using salicide (self-aligned silicide) structure and method of fabricating the same
An element isolation region for electrically isolating an element region where an element is to be formed is formed in a semiconductor substrate. A gate insulating film is formed on the...
|
|
|
7264743 |
Fin structure formation
A method for forming fin structures is provided. Sacrificial structures are provided on a substrate. Fin structures are formed on the sides of the sacrificial structures. The forming of the fin...
|
|
|
7262461 |
JFET and MESFET structures for low voltage, high current and high frequency applications
JFET and MESFET structures, and processes of making same, for low voltage, high current and high frequency applications. The structures may be used in normally-on (e.g., depletion mode) or...
|
|
|
7259436 |
Micromechanical component and corresponding production method
A micromechanical component includes: a substrate; a micromechanical functional plane provided on the substrate; a covering plane provided on the micromechanical functional plane; and a printed...
|
|
|
7259435 |
Intermediate semiconductor device having nitrogen concentration profile
A method for reducing the effective thickness of a gate oxide using nitrogen implantation and anneal subsequent to dopant implantation and activation is provided. More particularly, the present...
|
|
|
7228614 |
Method of manufacturing a gas flow meter
A gas flowmeter capable of reducing a secular change comprises a silicon semiconductor substrate formed with a cavity and a heat element formed above the cavity of the semiconductor substrate by...
|
|
|
7211872 |
Device having recessed spacers for improved salicide resistance on polysilicon gates
A method and device for improved salicide resistance in polysilicon gates under 0.20 μm. The several embodiments of the invention provide for formation of gate electrode structures with recessed...
|
|
|
7208805 |
Structures comprising a layer free of nitrogen between silicon nitride and photoresist
The invention includes a semiconductor processing method. A first material comprising silicon and nitrogen is formed. A second material is formed over the first material, and the second material...
|
|
|
7193280 |
Indium oxide conductive film structures
One-transistor ferroelectric memory devices using an indium oxide film (In 2 O 3 ), an In 2 O 3 film structure, and corresponding fabrication methods have been provided. The method for controlling...
|
|
|
7187036 |
Connection structure for SOI devices
A semiconductor contact connection structure and the method for forming the same are disclosed. The connection structure has a first semiconductor device formed on an insulator substrate. A...
|
|
|
7176537 |
High performance CMOS with metal-gate and Schottky source/drain
A semiconductor device having a metal/metal silicide gate and a Schottky source/drain and a method of forming the same are provided. The semiconductor device includes a gate dielectric overlying a...
|
|
|
7157780 |
Semiconductor device and method for producing the same
A gate electrode is formed on a substrate via a gate insulating film. The gate insulating film includes a high dielectric constant film containing a metal, oxygen and hydrogen, and a lower barrier...
|
|
|
7151048 |
Poly/silicide stack and method of forming the same
A method of forming a semiconductor structure comprises forming sidewall oxide on a stack, by rapid thermal oxidation. The stack is on a substrate and comprises (i) a first layer comprising...
|
|
|
7145212 |
Method for manufacturing device substrate with metal back-gate and structure formed thereby
A method (and resultant structure) of forming a semiconductor device, includes forming a metal-back-gate over a substrate and a metal back-gate, forming a passivation layer on the metal back-gate...
|
|
|
7145207 |
Gate structure of semiconductor memory device
A gate structure of a semiconductor memory device capable of preventing a poly void generation by forming a hard mask and maintaining a hysteresis area within a certain value. The gate structure of...
|
|
|
7101777 |
Methods for manufacturing stacked gate structure and field effect transistor provided with the same
The present invention provides a method for manufacturing a stacked-gate structure in a semiconductor device. The method includes the steps of sequentially forming a gate dielectric layer, a...
|
|
|
7098514 |
Highly integrated semiconductor device with silicide layer that secures contact margin and method of manufacturing the same
Provided are a highly integrated semiconductor device with a silicide layer, which can secure a contact margin, and a method of manufacturing the highly integrated semiconductor device. The highly...
|