Patents in Class 257/412

Matches 1 - 50 out of 665

Match	Document	Document Title
1	7622387	Gate electrode silicidation process A fully-silicided gate electrode is formed from silicon and a metal by depositing at least two layers of silicon with the metal layer therebetween. One of the silicon layers may be amorphous...
2	7615831	Structure and method for fabricating self-aligned metal contacts A semiconductor structure including at least one transistor is provided which has a stressed channel region that is a result of having a stressed layer present atop a gate conductor that includes a...
3	7615803	Method for manufacturing transistor and image display device using the same A method for manufacturing a transistor includes forming a semiconductor layer on a substrate, a first insulation film on the semiconductor layer, and a gate electrode on the first insulation film....
4	7605414	MOS transistors having low-resistance salicide gates and a self-aligned contact between them A method for forming a self-aligned contact between two MOS transistors is described. The method supports the use of low-resistivity suicides for the formation of contacts in nanometer applications...
5	7598536	Semiconductor device having load resistor and method of fabricating the same A semiconductor device includes a semiconductor substrate having a resistor region, an isolation layer disposed in the resistor region, the isolation layer defining active regions, first conductive...
6	7592674	Semiconductor device with silicide-containing gate electrode and method of fabricating the same There is provided a semiconductor device which is capable of solving a problem of threshold control in CMOS transistor, accompanied with combination of a gate insulating film having a high...
7	7585756	Semiconductor device and method of manufacturing the same A MOS transistor includes a substrate, source/drain regions formed at portions of the substrate, and a channel region formed between the source/drain regions. The MOS transistor further includes a...
8	7576399	Semiconductor device and method of manufacture thereof A dielectric material layer is formed over a workpiece, a metal layer is formed over the dielectric material layer, and a semiconductive material layer is formed over the metal layer. The workpiece...
9	7576397	Semiconductor device A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode...
10	7573106	Semiconductor device and manufacturing method therefor A method of manufacturing a semiconductor device comprises forming a gate insulation film on a semiconductor substrate; forming a first gate electrode and a second gate electrode on the gate...
11	7566937	MOS transistor including multi-work function metal nitride gate electrode, COMS integrated circuit device including same, and related methods of manufacture Disclosed is a MOS transistor including a multi-work function metal nitride gate electrode. The MOS transistor comprises a semiconductor substrate and a central gate electrode formed on the...
12	7564081	finFET structure with multiply stressed gate electrode A semiconductor structure and its method of fabrication include a semiconductor fin located over a substrate. A gate electrode is located over the semiconductor fin. The gate electrode has a first...
13	7560331	Method for forming a silicided gate A gate is silicided through its sides while limiting silicidation through the top of the gate. A blocking layer may be formed over the gate layer, and the sidewalls of the gate layer are exposed. A...
14	7554161	HfAlO₃films for gate dielectrics A dielectric film containing HfAlO 3 and a method of fabricating such a dielectric film produce a reliable gate dielectric having an equivalent oxide thickness thinner than attainable using SiO 2...
15	7545009	Word lines for memory cells Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material overlying the silicon-containing material...
16	7541650	Gate electrode structures Gate electrode structures used in field effect transistors and integrated circuits and methods of manufacture are disclosed. Improved work function and threshold modulation are provided by the...
17	7531881	Semiconductor devices having transistors with different gate structures and methods of fabricating the same A semiconductor device has two transistors of different structure from each other. One of transistors is P-type and the other is N-type. One of the transistors includes a gate structure in which a...
18	7528451	CMOS gate conductor having cross-diffusion barrier A gate conductor is provided for a transistor pair including an n-type field effect transistor (“NFET”) having an NFET active semiconductor region and a p-type field effect transistor...
19	7528450	Semiconductor device having NMOSFET and PMOSFET and manufacturing method therefor A element isolation insulating film is formed around the device regions in the silicon substrate. The device regions are formed an n-type diffusion layer region, a p-type diffusion layer region, a...
20	7521346	Method of forming HfSiN metal for n-FET applications A compound metal comprising HfSiN which is a n-type metal having a workfunction of about 4.0 to about 4.5, preferably about 4.3, eV which is thermally stable on a gate stack comprising a high k...
21	7514753	Semiconductor device A semiconductor device comprises n-type and p-type semiconductor devices formed on the substrate, the n-type device including an n-channel region formed on the substrate, n-type source and drain...
22	7514732	Image pickup apparatus and image pickup system having plural semiconductor regions of a same conductivity type, with one of the semiconductor regions having a higher impurity concentration than and providing a potential to another of the semiconductor regions A solid-state image pickup apparatus with little or no difference in the dark currents between adjacent photoelectric conversion elements and providing a high sensitivity and a low dark current...
23	7514360	Thermal robust semiconductor device using HfN as metal gate electrode and the manufacturing process thereof This invention relates to a semiconductor device making use of a highly thermal robust metal electrode as gate material. In particular, the development of Hafnium Nitride as a metal gate electrode...
24	7511350	Nickel alloy silicide including indium and a method of manufacture therefor The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other...
25	7508075	Self-aligned poly-metal structures A semiconductor structure is provided comprising a self-aligned poly-metal stack formed over a semiconductor substrate where the interface between an oxidation barrier placed over the stack and an...
26	7508074	Etch stop layer in poly-metal structures In accordance with one embodiment of the present invention, a semiconductor structure is provided comprising a poly-metal stack formed over a semiconductor substrate where the interface between an...
27	7504691	Power trench MOSFETs having SiGe/Si channel structure Devices, methods, and processes that improve immunity to transient voltages and reduce parasitic impedances. Immunity to unclamped inductive switching events is improved. For example, a...
28	7501668	Semiconductor memory devices having contact pads with silicide caps thereon An integrated circuit device having a semiconductor substrate includes a gate structure on the semiconductor substrate. Source/drain regions are on opposite sides of the gate structure. A contact...
29	7501333	Work function adjustment on fully silicided (FUSI) gate A fully silicided gate with a selectable work function includes; a gate dielectric over the substrate; and a first metal silicide layer over the gate dielectric, and a second metal silicide layer...
30	7498641	Partial replacement silicide gate A method of forming fully silicide gates having uniform gate silicide thickness is presented. A gate dielectric is formed over a substrate. A silicon-containing layer is formed over the gate...
31	7495299	Semiconductor device The following steps are carried out: forming a gate electrode on a semiconductor substrate with a gate insulating film interposed therebetween, forming a dummy gate electrode on the semiconductor...
32	7495298	Insulating buffer film and high dielectric constant semiconductor device and method for fabricating the same A semiconductor device includes: an n-transistor including a first gate insulating film made of a high-dielectric-constant material and a first gate electrode fully silicided with a metal, the...
33	7485934	Integrated semiconductor structure for SRAM cells A semiconductor structure includes a semiconductor substrate having a first device area and a second device area. A gate layer is formed across the first device area and the second device area on...
34	7473975	Fully silicided metal gate semiconductor device structure A method for forming a semiconductor device structure, comprising the steps of independently forming source/drain surface metal silicide layers and a fully silicided metal gate in a polysilicon...
35	7473626	Control of poly-Si depletion in CMOS via gas phase doping A method to control the poly-Si depletion effect in CMOS structures utilizing a gas phase doping process which is capable of providing a high concentration of dopant atoms at the gate...
36	7470605	Method for fabrication of a MOS transistor Disclosed is a method for fabricating a MOS transistor. The present method includes the steps of: (a) forming a gate electrode including a gate insulating layer and a polysilicon gate conductive...
37	7462554	Method for forming semiconductor device with modified channel compressive stress A method for forming a semiconductor device provides for forming a gate region on top of a substrate. Gate sidewall liners are formed on opposed sides of the gate region, the sidewall liners having...
38	7459758	Transistor structure and method for making same A gate structure in a transistor and method for fabricating the structure. A gate structure is formed on a substrate. The gate structure includes three layers: an oxide layer, a nitride layer and a...
39	7453127	Double-diffused-drain MOS device with floating non-insulator spacers A double-diffused-drain metal-oxide-semiconductor device has a gate structure overlying a semiconductor substrate, a pair of insulator spacers on the sidewalls of the gate structure respectively,...
40	7446381	Semiconductor memory device and method for fabricating the same A semiconductor memory device has a memory region which is formed on a semiconductor substrate and in which a plurality of memory cells each including a memory transistor are arranged as a matrix...
41	7446380	Stabilization of flatband voltages and threshold voltages in hafnium oxide based silicon transistors for CMOS The present invention provides a metal stack structure that stabilizes the flatband voltage and threshold voltages of material stacks that include a Si-containing conductor and a Hf-based...
42	7439596	Transistors for semiconductor device and methods of fabricating the same The present invention discloses a transistor for a semiconductor device capable of preventing the generation of a depletion capacitance in a gate pattern due to the diffusion of impurity ions. The...
43	7439140	Formation of standard voltage threshold and low voltage threshold MOSFET devices Wells are formed in a substrate where standard Vt and low Vt devices of both a first and second type are to be fabricated. Wells defining the locations of first type standard Vt devices are masked,...
44	7436034	Metal oxynitride as a pFET material A compound metal comprising MO x N y which is a p-type metal having a workfunction of about 4.75 to about 5.3, preferably about 5, eV that is thermally stable on a gate stack comprising a high k...
45	7435652	Integration schemes for fabricating polysilicon gate MOSFET and high-K dielectric metal gate MOSFET Multiple integration schemes for manufacturing dual gate semiconductor structures are disclosed. By employing the novel integration schemes, polysilicon gate MOSFETs and high-k dielectric metal...
46	7432570	Semiconductor device and manufacturing method thereof A semiconductor device includes a substrate, a p-channel MIS transistor formed on an n-type well on the substrate, having a first gate dielectric and a first gate electrode formed thereon and...
47	7432567	Metal gate CMOS with at least a single gate metal and dual gate dielectrics A complementary metal oxide semiconductor (CMOS) structure including at least one nFET and at least one pFET located on a surface of a semiconductor substrate is provided. In accordance with the...
48	7432566	Method and system for forming dual work function gate electrodes in a semiconductor device A method is provided for forming dual work function gate electrodes. A dielectric layer is provided outwardly of a substrate. A metal layer is formed outwardly of the dielectric layer. A...
49	7429777	Semiconductor device with a gate electrode having a laminate structure A semiconductor device includes a semiconductor substrate having a semiconductor layer, a gate electrode, a source region, a drain region, an element separation insulating film layer and a wiring....
50	7429770	Semiconductor device and manufacturing method thereof A technique capable of reducing threshold voltage and reducing high-temperature heat treatment after forming a gate electrode is provided. An n-type MIS transistor or a p-type MIS transistor is...

Matches 1 - 50 out of 665

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