|
Match
|
Document |
Document Title |
|
|
7427573 |
Forming composite metal oxide layer with hafnium oxide and titanium oxide
A metal oxide alloy layer comprises a first layer including a first metal oxide and having a first thickness, and a second layer formed on the first layer, the second layer including a second metal...
|
|
|
7426140 |
Bandgap engineered split gate memory
Memory cells comprising: a semiconductor substrate having a source region and a drain region disposed below a surface of the substrate and separated by a channel region; a tunnel dielectric...
|
|
|
7423326 |
Integrated circuits with composite gate dielectric
CMOS gate dielectric made of high-k metal silicates by passivating a silicon surface with nitrogen compounds prior to high-k dielectric deposition. Optionally, a silicon dioxide monolayer may be...
|
|
|
7422953 |
Semiconductor device and method of manufacturing the same
There is provided a method of manufacturing a semiconductor device, including forming a structure including a first layer containing Si and a metal oxide layer in contact with the first layer, the...
|
|
|
7420256 |
Nonvolatile semiconductor memory device having a gate stack and method of manufacturing the same
A nonvolatile semiconductor memory device includes a semiconductor substrate having a source region and a drain region, and a gate stack formed on the semiconductor substrate between and in contact...
|
|
|
7417291 |
Method for manufacturing semiconductor integrated circuit device
Disclosed is a technique for reducing the leak current by reducing contamination of metal composing a polymetal gate of a MISFET. Of a polycrystalline silicon film, a WN film, a W film, and a cap...
|
|
|
7414288 |
Semiconductor device having display device
A semiconductor integrated circuit having a high withstand voltage TFT and a TFT which is capable of operating at high speed in a circuit of thin film transistors (TFT) and methods for fabricating...
|
|
|
7413955 |
Transistor for memory device and method for manufacturing the same
Disclosed is a transistor for a memory device realizing both a step-gated asymmetry transistor and a fin transistor in a cell and a method for manufacturing the same. The transistor has an active...
|
|
|
7408187 |
Low-voltage organic transistors on flexible substrates using high-gate dielectric insulators by room temperature process
A transistor device includes a transparent substrate. A high K dielectric is formed on the transparent substrate and transferred onto a flexible substrate. An organic transistor is formed on the...
|
|
|
7405454 |
Electronic apparatus with deposited dielectric layers
An atomic layer deposited dielectric layer and a method of fabricating such a dielectric layer produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using...
|
|
|
7402873 |
Semiconductor integrated circuit device having deposited layer for gate insulation
A method for manufacturing a semiconductor integrated circuit device including a first field effect transistor having a gate insulating film formed over a first element forming region of a main...
|
|
|
7400019 |
Insulating film and electronic device
An insulating film comprising: a first barrier layer; a well layer provided; and a second barrier layer is proposed. The first barrier layer consists of a material having a first bandgap and a...
|
|
|
7397094 |
Semiconductor device and manufacturing method thereof
To provide a semiconductor device that enables to suppress a defect density of a gate insulating film of an MISFET, gain a sufficient electric characteristic thereof, and make an Equivalent Oxide...
|
|
|
7385265 |
High dielectric constant MOSFET device
A semiconductor device has an MIS (metal-insulating film-semiconductor) structure, and a film mainly containing Al, O, and N atoms is used on a semiconductor. Alternatively, a semiconductor device...
|
|
|
7385264 |
Method of forming semiconductor device and semiconductor device
The present invention provides a semiconductor device having an improved silicon oxide film as a gate insulation film of a Metal Insulator Semiconductor structure and a method of making the same.
|
|
|
7382013 |
Dielectric thin film, dielectric thin film device, and method of production thereof
To provide a dielectric thin with a high dielectric constant, a low leakage current, and stable physical properties and electrical properties and to provide a thin film capacitor or other thin film...
|
|
|
7378706 |
Semiconductor device and method of manufacturing the same
An insulating film provided below a floating gate electrode includes a first insulating film located at both end portions below the floating gate electrode, and a second insulating film sandwiched...
|
|
|
7374984 |
Method of forming a thin film component
Embodiments of methods, apparatuses, devices, and/or systems for forming a thin film component are described.
|
|
|
7372114 |
Semiconductor device, and method of fabricating the same
A silicon oxynitride film is manufactured using SiH 4 , N 2 O and H 2 by plasma CVD, and it is applied to the gate insulating film ( 1004 in FIG. 1 A) of a TFT. The characteristics of the...
|
|
|
7372113 |
Semiconductor device and method of manufacturing the same
Disclosed is a semiconductor device comprising a semiconductor substrate, a gate electrode, a first insulating film formed between the semiconductor substrate and the gate electrode, and a second...
|
|
|
7372112 |
Semiconductor device, process for producing the same and process for producing metal compound thin film
A high dielectric gate insulating film having the structure that a high-nitrogen layer, a low-nitrogen layer, and a high-nitrogen layer are layered in this order from a silicon-substrate side.
|
|
|
7365403 |
Semiconductor topography including a thin oxide-nitride stack and method for making the same
A semiconductor topography is provided which includes a silicon dioxide layer with a thickness equal to or less than approximately 10 angstroms and a silicon nitride layer arranged upon the silicon...
|
|
|
7361960 |
Semiconductor device and method of manufacturing the same
A first insulator film and a first polysilicon film are formed on first and second element regions of a semiconductor substrate. The first insulator film and first polysilicon film are removed from...
|
|
|
7358578 |
Field effect transistor on a substrate with (111) orientation having zirconium oxide gate insulation and cobalt or nickel silicide wiring
Diffusion layers 2 - 5 are formed on a silicon substrate 1 , and gate dielectric films 6, 7 and gate electrodes 8, 9 are formed on these diffusion layers 2 - 5 so as to be MOS transistors....
|
|
|
7352033 |
Twin MONOS array for high speed application
The invention provides a metal bit structure of Twin MONOS memory cell with large channel width and its operational method for high-speed applications using a metal bit array.
|
|
|
7352000 |
Organic thin film transistor with polymeric interface
Provided is an organic thin film transistor comprising a polymeric layer interposed between a gate dielectric and an organic semiconductor layer. Various homopolymers, copolymers, and functional...
|
|
|
7348644 |
Semiconductor device and method of manufacturing semiconductor device
Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger...
|
|
|
7342290 |
Semiconductor metal contamination reduction for ultra-thin gate dielectrics
A bilayer dielectric structure for substantially reducing or eliminating metal contaminants formed during subsequent polysilicon deposition is provided. The bilayer dielectric structure includes an...
|
|
|
7342266 |
Field effect transistors with dielectric source drain halo regions and reduced miller capacitance
A field effect transistor (FET) device includes a gate conductor and gate dielectric formed over an active device area of a semiconductor substrate. A drain region is formed in the active device...
|
|
|
7339239 |
Vertical NROM NAND flash memory array
Memory devices, arrays, and strings are described that facilitate the use of NROM memory cells in NAND architecture memory strings, arrays, and devices. NROM NAND architecture memory embodiments of...
|
|
|
7332773 |
Vertical device 4F2 EEPROM memory
EEPROM memory devices and arrays are described that facilitate the use of vertical floating gate memory cells and select gates in NOR or NAND high density memory architectures. Memory embodiments...
|
|
|
7329914 |
Charge trapping memory device with two separated non-conductive charge trapping inserts and method for making the same
A charge trapping memory device with two separated non-conductive charge trapping inserts is disclosed. The charge trapping memory device has a silicon substrate with two junctions. A gate oxide...
|
|
|
7326995 |
Trench MIS device having implanted drain-drift region and thick bottom oxide
A trench MIS device is formed in a P-epitaxial layer that overlies an N+ substrate. In one embodiment, the device includes a thick oxide layer at the bottom of the trench and an N-type drain-drift...
|
|
|
7323756 |
Method of composite gate formation
Methods for forming a nitride barrier film layer in semiconductor devices such as gate structures, and barrier layers, semiconductor devices and gate electrodes are provided. The nitride layer is...
|
|
|
7323755 |
Method of composite gate formation
Methods for forming a nitride barrier film layer in semiconductor devices such as gate structures, and barrier layers, semiconductor devices and gate electrodes are provided. The nitride layer is...
|
|
|
7312499 |
Semiconductor storage device and manufacturing method therefor, semiconductor device, portable electronic equipment and IC card
A semiconductor storage device includes a field effect transistor which has a gate insulator, a gate electrode and a pair of source/drain diffusion regions on a semiconductor substrate. The device...
|
|
|
7312494 |
Lanthanide oxide / hafnium oxide dielectric layers
Dielectric layers containing a hafnium oxide hafnium oxide layer arranged as one or more monolayers and a lanthanide oxide layer and a method of fabricating such a dielectric layer produce a...
|
|
|
7312127 |
Incorporating dopants to enhance the dielectric properties of metal silicates
The present invention provides a method of forming a high-k dielectric layer on a semiconductor wafer. A metal silicate dielectric layer is initially deposited on the wafer. A dopant having...
|
|
|
7304346 |
Flash memory cell transistor and method for fabricating the same
A flash memory cell transistor and a method for fabricating the same compensates a work function difference of a pMOS and a nMOS with a triple gate insulating film by using electron density trapped...
|
|
|
7304340 |
Semiconductor storage elements, semiconductor device manufacturing methods therefor, portable electronic equipment and IC card
A semiconductor storage element has a memory function body on opposite sides of a gate electrode formed on a semiconductor substrate. Each end of source/drain regions is located in the...
|
|
|
7301219 |
Electrically erasable programmable read only memory (EEPROM) cell and method for making the same
An asymmetrically doped memory cell has first and second N+ doped junctions on a P substrate. A composite charge trapping layer is disposed over the P substrate and between the first and the second...
|
|
|
7300838 |
Semiconductor device and method of manufacturing semiconductor device
Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger...
|
|
|
7291891 |
In-solid nuclear spin quantum calculation device
A voltage is applied across gate electrodes ( 103 A) and ( 103 B) in a two-dimensional electronic system ( 101 ) placed under a magnetic field, and the polarity of an electric current passed...
|
|
|
7282774 |
Semiconductor device and method for manufacturing semiconductor device
A semiconductor device comprising a semiconductor substrate, a gate dielectrics formed on the semiconductor substrate and including a silicon oxide film containing a metallic element, the silicon...
|
|
|
7282773 |
Semiconductor device with high-k dielectric layer
A semiconductor device comprises a substrate including isolation regions and active regions, and a high-k dielectric layer proximate the substrate. The high-k dielectric layer comprises a mixture...
|
|
|
7282762 |
4F2 EEPROM NROM memory arrays with vertical devices
NROM EEPROM memory devices and arrays are described that facilitate the use of vertical NROM memory cells and select gates in NOR or NAND high density memory architectures. Memory embodiments of...
|
|
|
7282752 |
MOSFET with a thin gate insulating film
A semiconductor device comprises: a p-type semiconductor substrate ( 1 ); an insulating film ( 3 ); a gate electrode ( 2 ) formed an the substrate via the insulating film; and an n-type...
|
|
|
7273815 |
Etch features with reduced line edge roughness
A method for forming a feature in a layer with reduced line edge roughening is provided. A photoresist layer is formed over the layer. The photoresist layer is patterned to form photoresist...
|
|
|
7271458 |
High-k dielectric for thermodynamically-stable substrate-type materials
Excellent capacitor-voltage characteristics with near-ideal hysteresis are realized in a capacitive-like structure that uses an electrode substrate-type material with a high-k dielectric layer...
|
|
|
7271450 |
Dual-gate structure and method of fabricating integrated circuits having dual-gate structures
A method of fabricating a dual-gate on a substrate and an integrated circuit having a dual-gate structure are provided. A first high-K dielectric layer is formed in a first area defined for a first...
|