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5237196 |
Semiconductor device and method for manufacturing the same
A poly-Si film is formed on a first insulating film overlying a semiconductor substrate. A second insulating film is formed on the poly-Si film. The poly-Si film comprises a layered structure of a...
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5237193 |
Lightly doped drain MOSFET with reduced on-resistance
Construction method and apparatus for lightly doped drain MOSFET that has low or minimum drift on-state resistance and maintains high voltage blocking in the off-state. Temperature sensitivity of...
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5229633 |
High voltage lateral enhancement IGFET
A method of manufacturing a semiconductor device including both an enhancement (1) insulated gate field effect transistor (IGFET) and a depletion (2) mode IGFET is described. Impurities are...
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5225704 |
Field shield isolation structure for semiconductor memory device and method for manufacturing the same
In a DRAM having stacked capacitor cells, elements are isolated by field shield isolating structure. The field shield isolating structure is formed surrounding both X and Y directions of the memory...
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5223735 |
Semiconductor integrated circuit device in which circuit functions can be remedied or changed and the method for producing the same
A semiconductor integrated circuit device in which circuit functions can be remedied or changed by severing at least a portion of a circuit pattern and a method for producting such semiconductor...
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5221851 |
Controlled-turn-off high-power semiconductor component
In a large-area controlled-turn-off high-power semiconductor component containing a multiplicity of finely structured individual components, a semiconductor device (12) is formed by a multiplicity...
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5216272 |
High withstanding voltage MIS transistor
A high withstanding voltage MIS transistor, including an offset region and a double offset region in a region of a semiconductor substrate. The region of the semiconductor substrate has a first...
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5204545 |
Structure for preventing field concentration in semiconductor device and method of forming the same
There is provided p diffusion regions (18a, 18b) in the surface of an end portion of the n island (7) formed on the p - substrate (12). The insulation film (14) is formed on the n island (7) to...
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5200637 |
MOS transistor and differential amplifier circuit with low offset
A MOS transistor includes a gate electrode layer formed on an insulation layer which is formed on an element formation region defined by a field insulation layer formed on a P-type semiconductor...
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5187552 |
Shielded field-effect transistor devices
Field-effect transistor devices are provided having a relatively substantial capability to withstand reverse bias voltages. This capability is provided through providing shields in these devices...
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5181090 |
High voltage CMOS devices
A semiconductor memory and method of manufacture which are particularly useful for a high breakdown voltage EEPROM wherein high breakdown voltage transistors which are employed in a relatively...
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5168340 |
Semiconductor integrated circuit device with guardring regions to prevent the formation of an MOS diode
This invention relates to a semiconductor integrated circuit device wherein guardring regions are formed between a first element region and a second element region so as to surround the first...
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5164806 |
Element isolating structure of semiconductor device suitable for high density integration
An element isolating structure employed for isolating the elements of a semiconductor substrate has an impurity region having a concentration lower than that of a source/drain and a channel stop...
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5162888 |
High DC breakdown voltage field effect transistor and integrated circuit
A field effect transistor device formed on an integrated circuit chip substrate and driven by the on-chip voltages having a well region formed in the substrate, and source and drain regions one of...
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5162883 |
Increased voltage MOS semiconductor device
The present invention relates to an increased operating voltage MOS semiconductor device. The device has a channel forming area between a source and extended drain area, a gate insulating film over...
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5144388 |
Semiconductor device having a plurality of FETs formed in an element area
According to this invention, in an element region formed in a semiconductor substrate, a plurality of regions for constituting one electrode of source and drain electrodes of an FET are formed. A...
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5144389 |
Insulated gate field effect transistor with high breakdown voltage
An MIS FET has an off-set gate structure in which a gate electrode and a drain region. The drain region is formed of an n type impurity region of a high concentration and has a pn junction region...
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5140392 |
High voltage MOS transistor and production method thereof, and semiconductor device having high voltage MOS transistor and production method thereof
A high voltage MOS transistor includes a semiconductor substrate (1) of a first semiconductor type, a gate electrode (14) formed on the semiconductor substrate via a gate oxide layer (13), first...
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5138409 |
High voltage semiconductor device having silicon-on-insulator structure with reduced on-resistance
A high-voltage metal-oxide-semiconductor transistor device having a semiconductor-on-insulator structure comprises a substrate, an insulator layer provided on the substrate, a semiconductor layer...
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5130767 |
Plural polygon source pattern for mosfet
A high power MOSFET has a plurality of closely packed polygonal sources spaced from one another on one surface of a semiconductor body. An elongated gate electrode is exposed in the spacing between...
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5128730 |
Semiconductor device and a circuit suitable for use in an intelligent power switch
A semiconductor device and a circuit suitable for use in an intelligent power switch include an insulated gate field effect transistor (IGFET) (T2) and a power semiconductor switch (T1). The...
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5124763 |
Insulated-gate type integrated circuit
A P-well region is provided in a semiconductor substrate of N-type. A P-channel MOSFET is arranged in the N-type substrate while an N-channel MOSFET is arranged in the P-well region. The drain...
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5113230 |
Semiconductor device having a conductive layer for preventing insulation layer destruction
On a semiconductor substrate between the source region and drain region, there is provided a gate electrode, through an insulation layer. There is further provided a conductive layer partially...
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5109266 |
Semiconductor integrated circuit device having high breakdown-voltage to applied voltage
A semiconductor integrated circuit device according to the present invention has a field plate disposed between the element isolation region which surrounds a semiconductor active element and an...
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5101248 |
Semiconductor device
An electrically erasable and programmable non-volatile semiconductor having a selection transistor, a memory transistor, and a logic transistor. The selection transistor has a first gate insulating...
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5095343 |
Power MOSFET
A VDMOS device includes a wafer of semiconductor material having first and second opposed major surfaces. A drain region of a first conductivity type extends along the one major surface. A...
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5089871 |
Increased voltage MOS semiconductor device
The present invention relates to an increased operating voltage MOS semiconductor device. The device has a channel forming area between a source and extended drain area, a gate insulating film over...
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5087954 |
MOS-type integrated circuit
In a MOS-type integrated circuit, a source and a gate of a double diffusion MOSFET of an n-channel type and a drain and a gate of a double diffusion MOSFET of a p-channel type are in an island...
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5086332 |
Planar semiconductor device having high breakdown voltage
A planar semiconductor device having a high breakdown voltage includes a semiconductor layer of a first conductivity type and a first semiconductor region of a second conductivity type selectively...
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5086322 |
Input protection circuit and output driver circuit comprising MIS semiconductor device
An MIS transistor comprises first and second concave grooves (17, 17) opposing to each other with a gate electrode (4, 39) provided therebetween. Source and drain regions (8a, 8b, 31, 34) are...
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5072265 |
P-channel insulation gate type bipolar transistor
A p-channel insulation gate type bipolar transistor, wherein the thickness and specific resistivity of the p + layer and p - layer, respectively, are constrained so as to avoid avalanche...
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5072267 |
Complementary field effect transistor
Complementary field effect transistors are provided wherein double-diffusion MOS FETs including an N-channel and a P-channel are formed on one and the same semiconductor substrate. These two...
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5072268 |
MOS gated bipolar transistor
A high voltage transistor includes a substrate of a first conductivity type. Within the substrate is a well region of a second conductivity type. A source region is within the substrate and adjoins...
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5070377 |
Semiconductor device and method of manufacturing the same
An N drift region (42) is provided in its surface with a P + well region (43) of a square ring shape and a P region (51) formed in the center of the square ring. The P region (51) is relatively...
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5055896 |
Self-aligned LDD lateral DMOS transistor with high-voltage interconnect capability
Our invention is an annular-shaped or rectangular-shaped lateral DMOS device which overcomes the problems of field crowding caused by a high voltage drain interconnect line creating an increased...
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5049953 |
Schottky tunnel transistor device
A semiconductor device includes a semiconductor substrate of a first conductivity type, in which a drain region is formed in the substrate, and a gate electrode is formed on the surface of the...
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5047820 |
Semi self-aligned high voltage P channel FET
An improved process to fabricate a high breakdown voltage MOSFET is disclosed. The process self-aligns the channel to the source and drain and semi self-aligns the gate electrode to the channel....
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5045913 |
Bit stack compatible input/output circuits
In accordance with the teachings of this invention a method for positioning components of input/output circuits is provided. These components are positioned on a semiconductor substrate. The...
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5034790 |
MOS transistor with semi-insulating field plate and surface-adjoining top layer
A lateral MOS transistor includes a semi-insulating field plate adjacent the surface of the device, over the drift region and extending laterally from the drain electrode toward the gate and source...
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5031010 |
Semiconductor memory device and method of manufacturing the same
In a semiconductor memory device having a floating gate structure, the floating gate electrode is composed of 2 to 10 silicon grains. With the floating gate electrode, the insulation film, formed...
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5028548 |
Method of manufacturing a planar semiconductor device having a guard ring structure
A method of manufacturing a semiconductor device of the "planar" type comprising a highly doped substrate having a doping concentration c o and an epitaxial surface layer having a carrier...
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5025296 |
Center tapped FET
A FET structure has first and second active areas separated by an inactive area with a gate bus located thereon. Gate fingers extend from the gate bus between source and drain contacts on the...
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5023678 |
High power MOSFET and integrated control circuit therefor for high-side switch application
A lateral conduction high power MOSFET chip with integrated control circuits in disclosed for high-side switching applications. A first surface field reduction region disposed between drain and...
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5021851 |
NMOS source/drain doping with both P and As
A process for forming N-channel MOS sources and drains, by implanting both phosphorus and arsenic. The high diffusivity of phosphorus causes it to diffuse in advance of the bulk of the arsenic, so...
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5019882 |
Germanium channel silicon MOSFET
An alloy layer comprising germanium and silicon is grown on top of a silicon substrate. The alloy layer is kept thin enough for proper pseudomorphic, dislocation free growth. A layer of silicon is...
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5017996 |
Semiconductor device and production method thereof
This invention relates to a BiMOS IC, such as BiCMOS IC, and production method thereof. The present invention forms an impurity layer for preventing field concentration in a bipolar transistor by...
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5012312 |
Semiconductor integrated circuit and a process for producing the same
The impurity concentration in a channel stopper in contact with a second fine active area is selected to be lower than the impurity concentration in a first active area that is wider than the...
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5003372 |
High breakdown voltage semiconductor device
A semiconductor device having a grooved field plate(s), a grooved field limiting ring(s) or a combination of a grooved field plate(s) and grooved field limiting ring(s) is disclosed. The grooved...
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5003362 |
Integrated circuit with high-impedance well tie
An integrated circuit which includes a series resistor in the well tie. This resistor permits the wall to be used for clamping, without large current consumption due to the parastic bipolar device...
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5001540 |
Thin-film transistor operable at high voltage and a method for manufacturing the same
There are disclosed a structure and a manufacturing method of a MOS-type thin-film field effect transistor composed of a substrate having an insulating main surface, a gate electrode formed on the...
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