Matches 251 - 300 out of 468 < 1 2 3 4 5 6 7 8 9 10 >
Match Document Document Title
5998837 Trench-gated power MOSFET with protective diode having adjustable breakdown voltage  
A power MOSFET includes a trenched gate which defines a plurality of MOSFET cells. A protective diffusion is created, preferably in an inactive cell, so as to form a PN junction diode that is...
5986315 Guard wall to reduce delamination effects within a semiconductor die  
A method of forming a guard wall for a semiconductor die is described. A dielectric layer is deposited over a semiconductor substrate. The dielectric layer is patterned to form a guard wall opening...
5969387 Lateral thin-film SOI devices with graded top oxide and graded drift region  
A lateral thin-film Silicon-On-Insulator (SOI) device includes a lateral semiconductor device such as a diode or MOSFET provided in a thin semiconductor film on a thin buried oxide. The lateral...
5969392 Thermal ink jet printheads with power MOS driver devices having enhanced transconductance  
A high voltage MOS transistor, for use in a thermal ink jet printhead, is fabricated with a single, uniformly thick layer of polysilicon that serves as a field plate over the drift region and a...
5959330 Semiconductor device and method of manufacturing same  
After a field oxide film is formed on a P-type semiconductor substrate, ion implantation of boron is carried out with respect to a whole surface of the substrate so that a channel stopper layer is...
5932892 High-voltage transistor  
In an active matrix electroluminescent display, a pixel containing a grounded conductive electric field shield between an EL cell and the switching electronics for the EL cell. In a method of...
5929485 High voltage insulated gate type bipolar transistor for self-isolated smart power IC  
On a surface of one device region defined at a surface of a P-type silicon substrate, a gate electrode is formed on a thermal oxidation layer. An N-type source diffusion layer is formed at the...
5920094 Semiconductor device on SOI substrate  
Disclosed herein is a semiconductor device and a method of fabricating the same. The semiconductor device includes a SOI substrate comprising a handling wafer, a buried insulating layer and a...
5905294 High rated voltage semiconductor device with floating diffusion regions  
A field-effect semiconductor device has a gate pad at the outside of an area of a semiconductor element and island regions of a conductivity type opposite that of a substrate of the device at...
5898201 Low resistance, high breakdown voltage, power mosfet  
A metal oxide semiconductor field effect transistor power device with a lightly doped silicon substrate includes a source region and a drain region. At least one field implanted island region is...
5895238 Doping technique for MOS devices  
A method for manufacturing a semiconductor device having impurity doped regions serving as source and drain and a semiconductor device obtained by the application of the same method are disclosed....
5883413 Lateral high-voltage DMOS transistor with drain zone charge draining  
In many circuits in which a current is switched off, a high voltage appears at the drain electrode of a transistor, in particular in the case of an inductive load. When a lateral high-voltage DMOST...
5872369 Solid-state antenna switch and field-effect transistor  
A field-effect transistor has a covering electrode overlying at least part of the transistor's channel. The covering electrode is formed on an insulating layer that covers the source, gate, and...
5852314 Thin epitaxy resurf integrated circuit containing high voltage p-channel and n-channel devices with source or drain not tied to ground  
N-channel LDMOS and p-channel MOS devices for high voltage integrated in a BiCMOS integrated circuit and exploiting a RESURF condition are provided with a buried region of the same type of...
5838050 Hexagon CMOS device  
A CMOS device containing a plurality of hexagon cells over a semiconductor substrate is disclosed. Each hexagon cell includes a hexagonal ring gate, a drain diffusion region and a source diffusion...
5831320 High voltage metal oxide silicon field effect transistor  
A manufacturing method of high voltage MOSFET includes a process forming the first and second conductive wells in a semiconductor substrate; process forming drift areas in the first and second...
5831318 Radhard mosfet with thick gate oxide and deep channel region  
A process for producing a radiation resistant power MOSFET is disclosed. The gate oxide is formed toward the end of the processing and is not exposed to substantial thermal cycling. The gate oxide...
5811864 Planarized integrated circuit product and method for making it  
A planarized integrated circuit and method for making it are disclosed. The method includes forming portions of a transistor structure that extend to an elevation on an integrated circuit substrate...
5811854 One piece semiconductor device having a power fet and a low level signal element with laterally spaced buried layers  
A composite semiconductor device comprised of a power MOS FET and a low level signal element. The MOS FET includes an n type buried layer embedded between p type substrate and n type epitaxial...
5801407 Semiconductor integrated circuit using standardized analog cells  
An analog-circuit block, which is fabricated on a chip of a semiconductor integrated circuit, is configured by a plurality of analog cells each having a desired function such as the function of an...
5796145 Semiconductor device composed of MOSFET having threshold voltage control section  
A semiconductor device includes a MOSFET which has a source and drain region of a first conductivity type, and an ion implanted channel section, and a pair of threshold control sections having a...
5773865 Semiconductor memory and semiconductor device having SOI structure  
A semiconductor memory and device comprising a plurality of N-channel and P-channel transistor regions, a first and a second field shield region, and an oxide isolation region. The first field...
5770880 P-collector H.V. PMOS switch VT adjusted source/drain  
A PMOS device has an n-type body 12 and a triple source drain diffusion. A first drain region 14 is heavily p-doped to provide ohmic contact to the drain. A lightly doped drain region 16 extends to...
5767550 Integrated zener diode overvoltage protection structures in power DMOS device applications  
In one embodiment, modifications to the polysilicon gate, body, source, and contact masks of a DMOS process add a source-body monocrystalline gate protection diode under the gate pad by implanting...
5767547 High voltage thin film transistor having a linear doping profile  
The present invention is directed to a thin film transistor having a linear doping profile between the gate and drain regions. This is constructed in a particular manner in order to achieve a thin...
5763926 Semiconductor device having a Bi-CMOS transistor including an n-channel MOS transistor  
In a semiconductor device and a method of manufacturing the same according to the invention, a p-type diffusion region for electrically connecting a back gate region and an electrode layer together...
5760441 Metal oxide semiconductor device  
A p-type high concentration doped region is formed in a p-type semiconductor substrate between a n-type doped region as part of an input protection circuit and another n-type doped region as part...
5757060 Contamination guard ring for semiconductor integrated circuit applications  
The guard ring is a barrier which prevents contaminates from diffusing through a window opening through insulating layers to adjacent semiconductor devices. The guard ring is formed surrounding a...
5751042 Internal ESD protection circuit for semiconductor devices  
An internal electrostatic discharge (ESD) protection circuit for semiconductor devices defines a structure for protecting adjacent n-channel devices. The first n-channel device includes a pair of...
5747853 Semiconductor structure with controlled breakdown protection  
A power semiconductor device having internal circuits characterized by an electrical breakdown during one mode of operation is implemented with a protective circuit. The electrical breakdown is...
5731612 Insulated gate field effect transistor structure having a unilateral source extension  
An insulated gate field effect transistor (IGFET) structure (10) includes a source region (14) and a drain region (16) formed in an impurity well (13). A channel region (18) separates the source...
5723886 N channel MOSFET with anti-radioactivity  
The invention provides an n-channel MOS field effect transistor with an improved anti-radioactivity. Such transistor includes a p-type silicon substrate. An isolation oxide film is selectively...
5714787 Semiconductor device with a reduced element isolation region  
In a semiconductor device and a method for manufacturing the semiconductor device, a width of an element isolation region is reduced by a field-shield. A silicon oxide film of a side wall of a...
5686754 Polysilicon field ring structure for power IC  
A polysilicon field ring structure is used to eliminate any type of unwanted surface current leakage in an integrated power chip having high voltage and low voltage areas and enclosed in a plastic...
5682054 Rectifying transfer gate device  
A rectifying transfer gate device having two transistors with a common drain region of a first conductivity. A doped region of a second conductivity opposite the first conductivity is positioned...
5661312 Silicon carbide MOSFET  
A silicon carbide MOSFET (10) is formed to have a high breakdown voltage. A breakdown enhancement layer (20) is formed between a channel region (14) and a drift layer (12). The breakdown...
5652458 Structure of a high voltage transistor in a semiconductor device and method of manufacturing the same  
The present invention discloses a structure of a transistor in a semiconductor device and a method of manufacturing the same. The present invention manufactures a high voltage transistor by etching...
5650658 Integration of high voltage lateral MOS devices in low voltage CMOS architecture using CMOS-compatible process steps  
Region forming steps or interconnect-forming steps through which low voltage CMOS devices are formed in a semiconductor wafer are also employed to simultaneously form one or more regions or layers...
5650657 Protection from short circuits between P and N wells  
A method of manufacture of a MOSFET device with a predetermined light positive or negative doping comprises forming a first mask upon said substrate. Dopant of a predetermined positive or negative...
5648671 Lateral thin-film SOI devices with linearly-graded field oxide and linear doping profile  
A lateral thin-film silicon-on-insulator (SOI) device includes a lateral semiconductor device such as a diode or MOSFET provided in a thin semiconductor film on a thin buried oxide. The lateral...
5648673 Semiconductor device having metal silicide film on impurity diffused layer or conductive layer  
A semiconductor device and a method of fabricating such a semiconductor device in which a silicon nitride film constituting a protective film for ion implantation is used for improving the device...
5646431 Surface breakdown reduction by counter-doped island in power mosfet  
A metal oxide semiconductor field effect transistor with a lightly doped silicon substrate includes an oppositely doped well and oppositely doped source region and oppositely doped drain region...
5641989 Semiconductor device having field-shield isolation structures and a method of making the same  
A semiconductor device includes a semiconductor substrate of a first conductivity type, a plurality of spaced field-shield isolation structures formed on a surface of the substrate and extending...
5635743 Semiconductor device having an increased withstand voltage against an inverse surge voltage  
It is the object of the invention to provide a semiconductor device with a high-voltage breakdown characteristic against an overvoltage surge from an inductance load. The semiconductor device...
5633521 Enhancement of breakdown voltage in MOSFET semiconductor device  
The present invention provides a MOSFET semiconductor device having a higher breakdown voltage. The MOSFET semiconductor device includes a p-type substrate having an n-type drain region, an n - ...
5627385 Lateral silicon carbide transistor  
A lateral silicon carbide transistor (10) utilizes a modulated channel region (18) to form an accumulation region that facilitates a low on-resistance. A doped region of the channel layer forms a...
5614752 Semiconductor device containing external surge protection component  
A semiconductor device that includes at least one MOS transistor that is formed on a semiconductor substrate, in which there is a structure for protecting circuit elements such as transistors from...
5598021 MOS structure with hot carrier reduction  
An MOS structure is disclosed which is provided with a trench in the substrate adjacent the channel region of the substrate, i.e., adjacent the area of the substrate over which the gate oxide and...
5598010 Semiconductor integrated circuit device having dummy pattern effective against micro loading effect  
A semiconductor integrated circuit device has a test component associated with a dummy test pattern for evaluating corresponding circuit components of the integrated circuit, and the test component...
5583365 Fully depleted lateral transistor  
The breakdown characteristics of a lateral transistor integrated in an epitaxial layer of a first type of conductivity grown on a substrate of an opposite type of conductivity and comprising a...
Matches 251 - 300 out of 468 < 1 2 3 4 5 6 7 8 9 10 >